📄 fdi_mpll.c
字号:
/*
* Compare status to header valid or header allocated.
* In the case of packet data, also allow allocating
* for the active Packet Group Table header.
*/
if (HDR_STATE(HDR_VALID, pHdr->status) ||
#if (PACKET_DATA == TRUE)
((FDI_Pckt.ID == identifier) &&
(FDI_Pckt.type == type) &&
(identifier != WORDMAX) &&
HDR_STATE(HDR_VALID_HDR, pHdr->status)) ||
#endif /* PACKET_DATA */
HDR_STATE(HDR_ALLOCATED, pHdr->status))
{
/*
* status valid; compare attribute for grp table, single or
* multi instance
*/
if ((NIBBLE_LOW(pHdr->type_attribute) != ATTR_SEQ_TABLE) &&
(NIBBLE_LOW(pHdr->type_attribute) != ATTR_DATA_FRAG))
{
/* attribute valid; compare type and id */
if ((NIBBLE_HIGH(pHdr->type_attribute) == type) &&
(pHdr->identifier == identifier))
{
*hdr_data_ptr = *pHdr;
status = HW_ERR_NONE;
break;
}
}
}
/* increment offset pointer by size of UNIT_HEADER */
pHdr++;
}
/* update header offset return value */
*hdr_offset_ptr = ((DWORD) pHdr & (DWORD)(FDV_BLOCK_SIZE - 1));
/* if suspended, resume */
if (suspended)
{
/* E5.0.480 START */
CurrentFlashState = SET_PARTITION_STATE((DWORD) flash_ptr,
HW_STATE_STATUS);
*flash_ptr = FLASH_COMMAND_STATUS;
if (*flash_ptr & FLASH_STATUS_WRITE_SUSPENDED)
{
RESUME_WRITE_SUSPENDED_FLASH(flash_ptr);
}
else
{
*flash_ptr = FLASH_COMMAND_RESUME;
}
/* E5.0.480 END */
}
/* restore flash state */
CurrentFlashState = preempted_state;
flash_ptr = (FLASH_DATA_PTR) GET_PARTITION_ADDRESS(CurrentFlashState);
switch (GET_PARTITION_STATE(CurrentFlashState))
{
case HW_STATE_READ:
*flash_ptr = FLASH_COMMAND_READ;
break;
case HW_STATE_STATUS:
*flash_ptr = FLASH_COMMAND_STATUS;
break;
default:
break;
}
return status;
}
#if (BLOCK_LOCK_SUPPORT == TRUE)
/*#############################################################################
### FlashDevLock
###
### DESCRIPTION:
### Performs one of the following operations on the flash hardware:
### lock a block, lock down a block, unlock a block, or read the lock
### status of a block.
###
### PARAMETERS:
### IN: block_status_ptr (FLASH_DATA_PTR) - A pointer to a buffer to
### store the lock status of a block.
### address (DWORD) - The starting address within flash to perform
### the lock operation on.
### command (HW_CMD) - The lock-related command to issue: lock
### (HW_CMD_LOCK), lock down (HW_CMD_LOCKDOWN), unlock
### (HW_CMD_UNLOCK), or read the block's lock status
### (HW_CMD_READLOCKSTATUS).
### OUT: block_status_ptr - Contains the contents of the block's lock
### status if the command issued was HW_CMD_READLOCKSTATUS;
### otherwise, the contents are unknown.
###
### RETURNS:
### If the flash hardware is not CFI-compliant, the address is not the
### starting address of a block, or the command issued is invalid, the
### function returns HW_ERR_PARAM. If the flash hardware is not ready,
### the function returns HW_ERR_NOTRDY. If the flash hardware is
### suspended, the function returns HW_ERR_SUSPEND. Finally, if all the
### parameters are correct and the flash hardware is able to perform the
### command, the function returns HW_ERR_NONE.
###
*/
HW_ERROR FlashDevLock(FLASH_DATA_PTR block_status_ptr,
DWORD address, HW_CMD command)
{
volatile FLASH_DATA_PTR flash_ptr = (FLASH_DATA_PTR) address;
FLASH_DATA status_reg;
DWORD key0, key1;
HW_ERROR retval;
/**/
DISABLE_INTERRUPTS(key0, key1);
status_reg = PtrLowLvlReadStat(flash_ptr);
ENABLE_INTERRUPTS(key0, key1);
if ((status_reg & FLASH_STATUS_READY) != FLASH_STATUS_READY)
{
retval = HW_ERR_NOTRDY;
}
else if (status_reg &
(FLASH_STATUS_WRITE_SUSPENDED | FLASH_STATUS_ERASE_SUSPENDED))
{
retval = HW_ERR_SUSPEND;
}
else
{
HARDWARE_PRECONDITION;
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlLock(flash_ptr, block_status_ptr, command);
ENABLE_INTERRUPTS(key0, key1);
HARDWARE_POSTCONDITION;
}
return retval;
}
#endif /* BLOCK_LOCK_SUPPORT */
#if (ENABLE_PR != FDI_NONE)
/*#############################################################################
### FlashDevProtectReg
###
### DESCRIPTION:
### Reads/writes the protection registers and lock. When the configuration
### is paired 16-bit parts, the user will address the matching registers
### as a single 32-bit register, instead of addresssing them as two 16-bit
### registers on a 32-bit bus.
###
### PARAMETERS:
### IN: factory_reg_ptr (FLASH_DATA_PTR) - A pointer to the buffer to
### contain the factory programmed protection registers.
### user_reg_ptr (FLASH_DATA_PTR) - A pointer to the buffer to
### contain the user programmed protection registers, or the data
### to program if the command is HW_CMD_WRITE.
### lock_reg_ptr (FLASH_DATA_PTR) - A pointer to the buffer to
### contain the protection lock register.
### command (HW_CMD) The protection register related command to
### issue: write protection lock register (HW_CMD_WRITE_PR_LOCK),
### read protection lock register (HW_CMD_READ_PR_LOCK), write
### protection register (HW_CMD_WRITE_PR), or read protection
### registers (HW_CMD_READ_PR).
### register_num (BYTE) - The user register number to write to if
### the command is HW_CMD_WRITE_PR.
### lock_flag (BYTE) - A non-zero value tells the function to lock
### the protection registers upon a successful write to the
### protection register.
### OUT: factory_reg_ptr - The contents of the factory programmed
### protection registers if the command issued was HW_CMD_READ_PR;
### otherwise, the contents are unknown.
### user_reg_ptr - The contents of the user programmed protection
### registers if the command issued was HW_CMD_READ_PR; otherwise,
### the contents are unknown.
### lock_reg_ptr - The contents of the protection lock reigster
### if the command was HW_CMD_READ_PR_LOCK; otherwise, the contents
### are unknown.
###
### RETURNS:
### If the flash hardware is not ready, the funciton returns HW_ERR_NOTRDY.
### If the flash hardware is suspended, the function returns
### HW_ERR_SUSPEND. If the incorrect protection lock register is specifed
### for a read, the function returns HW_ERR_PARAM. If the maximum time
### limit expired or if an error occurred during programming, the function
### returns HW_ERR_WRITE. Finally, if the command was successfully issued,
### the function returns HW_ERR_NONE.
###
*/
HW_ERROR FlashDevProtectReg(FLASH_DATA_PTR factory_reg_ptr,
FLASH_DATA_PTR user_reg_ptr,
FLASH_DATA_PTR lock_reg_ptr,
HW_CMD command,
BYTE register_num,
BYTE lock_flag)
{
FLASH_DATA pr_lock_vals[] =
{
FLASH_PR_LOCK0_VALUE, FLASH_PR_LOCK1_VALUE, FLASH_PR_LOCK2_VALUE,
FLASH_PR_LOCK3_VALUE, FLASH_PR_LOCK4_VALUE, FLASH_PR_LOCK5_VALUE,
FLASH_PR_LOCK6_VALUE, FLASH_PR_LOCK7_VALUE, FLASH_PR_LOCK8_VALUE,
FLASH_PR_LOCK9_VALUE, FLASH_PR_LOCK10_VALUE, FLASH_PR_LOCK11_VALUE,
FLASH_PR_LOCK12_VALUE, FLASH_PR_LOCK13_VALUE, FLASH_PR_LOCK14_VALUE,
FLASH_PR_LOCK15_VALUE, FLASH_PR_LOCK16_VALUE
};
volatile FLASH_DATA_PTR flash_ptr =
(FLASH_DATA_PTR) PARAMETER_PARTITION_START_ADDRESS;
FLASH_DATA data;
HW_ERROR retval = HW_ERR_NONE;
DWORD key0, key1;
DWORD data_amt, i;
DISABLE_INTERRUPTS(key0, key1);
data = PtrLowLvlReadStat(flash_ptr);
ENABLE_INTERRUPTS(key0, key1);
/* check to see if flash is suspended */
/* Begin E.5.1.867 */
if ((data &
(FLASH_STATUS_WRITE_SUSPENDED | FLASH_STATUS_ERASE_SUSPENDED)) &&
((command == HW_CMD_WRITE_PR) || (command == HW_CMD_WRITE_PR_LOCK)))
{
retval = HW_ERR_SUSPEND;
}
/* End E.5.1.867 */
/* check to see if flash is ready for protection register operation */
else if ((data & FLASH_STATUS_READY) != FLASH_STATUS_READY)
{
retval = HW_ERR_NOTRDY;
}
/* OK to perform operation */
else
{
/* set pointer to appropriate lock register */
flash_ptr += GET_PR_LOCK_REG(register_num);
switch (command)
{
case HW_CMD_WRITE_PR:
/*
* need to set flash pointer to appropriate block and the
* appropriate size for the protection register bank
*/
flash_ptr++;
if (!register_num)
{
flash_ptr += FLASH_PR_64BIT_SIZE;
data_amt = FLASH_PR_64BIT_SIZE;
}
else
{
flash_ptr += (FLASH_PR_128BIT_SIZE * (register_num - 1));
data_amt = FLASH_PR_128BIT_SIZE;
}
/* write data to protection register */
for (i = 0; i < data_amt; i++, flash_ptr++)
{
HARDWARE_PRECONDITION;
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, user_reg_ptr + i,
command);
ENABLE_INTERRUPTS(key0, key1);
HARDWARE_POSTCONDITION;
if (retval != HW_ERR_NONE)
{
break;
}
}
if ((lock_flag) && (retval == HW_ERR_NONE))
{
flash_ptr = (FLASH_DATA_PTR) PARAMETER_PARTITION_START_ADDRESS;
flash_ptr += GET_PR_LOCK_REG(register_num);
data = pr_lock_vals[register_num];
HARDWARE_PRECONDITION;
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, &data,
HW_CMD_WRITE_PR_LOCK);
ENABLE_INTERRUPTS(key0, key1);
HARDWARE_POSTCONDITION;
}
break;
case HW_CMD_READ_PR:
flash_ptr++;
/*
* if protection register bank #0 is specified, read both
* user and factory values
*/
if (!register_num)
{
data_amt = FLASH_PR_64BIT_SIZE;
for (i = 0; i < data_amt; i++, flash_ptr++)
{
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, factory_reg_ptr + i,
command);
retval =
PtrLowLvlProtectReg((flash_ptr + FLASH_PR_64BIT_SIZE),
user_reg_ptr + i, command);
ENABLE_INTERRUPTS(key0, key1);
}
}
/* otherwise, all data goes into the user registers */
else
{
flash_ptr += (FLASH_PR_128BIT_SIZE * (register_num - 1));
data_amt = FLASH_PR_128BIT_SIZE;
for (i = 0; i < data_amt; i++, flash_ptr++)
{
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, user_reg_ptr + i,
command);
ENABLE_INTERRUPTS(key0, key1);
}
}
break;
case HW_CMD_WRITE_PR_LOCK:
data = pr_lock_vals[register_num];
HARDWARE_PRECONDITION;
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, &data, command);
ENABLE_INTERRUPTS(key0, key1);
HARDWARE_POSTCONDITION;
break;
case HW_CMD_READ_PR_LOCK:
DISABLE_INTERRUPTS(key0, key1);
retval = PtrLowLvlProtectReg(flash_ptr, &data, command);
ENABLE_INTERRUPTS(key0, key1);
*lock_reg_ptr = data;
break;
default:
retval = HW_ERR_PARAM;
}
}
return retval;
}
#endif /* ENABLE_PR != FDI_NONE */
#if (PACKET_DATA == TRUE)
#if (BUFFER_SIZE > 0)
/*#############################################################################
### FlashDevWritePacket
###
### DESCRIPTION:
### Allows the Data Manager to write packets to flash. Unlike
### FlashDevWrite(), this function will not align the data if the data
### is not aligned. However, it will check to see if the addresses are
### aligned if PARAM_CHECK (found in FDI_Type.h) is set to TRUE.
###
### PARAMETERS:
### IN: buffer_ptr (BYTE_PTR) - Source buffer of the data to be written.
### address (DWORD) - Flash data fragment start address for the
### write.
### size (DWORD) - Size of the buffer to be written, in bytes.
### OUT:
###
### RETURNS:
### If PARAM_CHECK is set to TRUE and the addresses are not aligned,
### the function returns HW_ERR_PARAM. If an error occurred when writing
### any data, the function returns HW_ERR_WRITE. Otherwise, the function
### returns HW_ERR_NONE.
###
*/
HW_ERROR FlashDevWritePacket(BYTE_PTR buffer_ptr, DWORD address, DWORD size)
{
volatile FLASH_DATA_PTR flash_ptr = (FLASH_DATA_PTR) address;
FLASH_DATA_PTR ram_ptr = (FLASH_DATA_PTR) buffer_ptr;
DWORD preempted_state;
BYTE suspended = ⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -