test_s.s

ARM嵌入式系统开发--软件设计与优化随书源代码。开发环境asm+c

;// ____________________________________________________________________
;//
;// Copyright (c) 2003, Andrew N. Sloss, Dominic Symes, Chris Wright
;// All rights reserved.
;// ____________________________________________________________________
;// 
;// NON-COMMERCIAL USE License
;// 
;// Redistribution and use in source and binary forms, with or without 
;// modification, are permitted provided that the following conditions 
;// are met: 
;//
;// 1. For NON-COMMERCIAL USE only.
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;// 2. Redistributions of source code must retain the above copyright 
;//    notice, this list of conditions and the following disclaimer. 
;//
;// 3. Redistributions in binary form must reproduce the above 
;//    copyright notice, this list of conditions and the following 
;//    disclaimer in the documentation and/or other materials provided 
;//    with the distribution. 
;//
;// 4. All advertising materials mentioning features or use of this 
;//    software must display the following acknowledgement:
;//
;//    This product includes software developed by Andrew N. Sloss,
;//    Chris Wright and Dominic Symes. 
;//
;//  THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS ``AS IS'' AND ANY 
;//  EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
;//  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 
;//  PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE CONTRIBUTORS BE 
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;//
;// Chapter 5
;// ADS1.1 compiler ouput - annotated

        AREA    ch04, CODE, READONLY
        
        EXPORT  checksum_v1_s
        EXPORT  checksum_v2_s
        EXPORT  checksum_v3_s
        EXPORT  checksum_v4_s
        EXPORT  checksum_v5_s
        EXPORT  checksum_v6_s
        EXPORT  checksum_v7_s
        EXPORT  checksum_v8_s
        EXPORT  checksum_v9_s
        EXPORT  checksum_v10_s
        EXPORT  queue_bytes_v1_s
        EXPORT  queue_bytes_v2_s
        EXPORT  uint_to_hex_s
        EXPORT  getxy_v1_s
        EXPORT  getxy_v2_s
        EXPORT  scale_s
        EXPORT  sat_correlate_v1_s
        EXPORT  sat_correlate_v2_s
        EXPORT  sat_correlate_v3_s
        EXPORT  str_tolower_s
        
        IMPORT  add_v3
        IMPORT  clip1
        IMPORT  dostageA
        IMPORT  dostageB
        IMPORT  dostageC
        IMPORT  get_next_packet
        IMPORT  __rt_udiv
        
;// Section 5.2 - variable types

checksum_v1_s
        MOV     r2,r0             ; r2 = data
        MOV     r0,#0             ; sum = 0
        MOV     r1,#0             ; i = 0
checksum_v1_loop
        LDR     r3,[r2,r1,LSL #2] ; r3 = data[i]
        ADD     r1,r1,#1          ; r1 = i+1
        AND     r1,r1,#0xff       ; i = (char)r1
        CMP     r1,#0x40          ; compare i, 64
        ADD     r0,r3,r0          ; sum += r3
        BCC     checksum_v1_loop  ; if (i<64) loop
        MOV     pc,r14            ; return sum
        
checksum_v2_s
        MOV     r2,r0             ; r2 = data
        MOV     r0,#0             ; sum = 0
        MOV     r1,#0             ; i = 0
checksum_v2_loop
        LDR     r3,[r2,r1,LSL #2] ; r3 = data[i]
        ADD     r1,r1,#1          ; r1++
        CMP     r1,#0x40          ; compare i, 64
        ADD     r0,r3,r0          ; sum += r3
        BCC     checksum_v2_loop  ; if (i<64) goto loop
        MOV     pc,r14            ; return sum
        
checksum_v3_s
        MOV     r2,r0             ; r2 = data
        MOV     r0,#0             ; sum = 0
        MOV     r1,#0             ; i = 0
checksum_v3_loop
        ADD     r3,r2,r1,LSL #1   ; r3 = &data[i]
        LDRH    r3,[r3,#0]        ; r3 = data[i]
        ADD     r1,r1,#1          ; i++
        CMP     r1,#0x40          ; compare i, 64
        ADD     r0,r3,r0          ; r0 = sum + r3
        MOV     r0,r0,LSL #16
        MOV     r0,r0,ASR #16     ; sum = (short)r0
        BCC     checksum_v3_loop  ; if (i<64) goto loop
        MOV     pc,r14            ; return sum
        
checksum_v4_s
        MOV     r2,#0             ; sum = 0
        MOV     r1,#0             ; i = 0
checksum_v4_loop
        LDRSH   r3,[r0],#2        ; r3 = *(data++)
        ADD     r1,r1,#1          ; i++
        CMP     r1,#0x40          ; compare i, 64
        ADD     r2,r3,r2          ; sum += r3
        BCC     checksum_v4_loop  ; if (sum<64) goto loop
        MOV     r0,r2,LSL #16
        MOV     r0,r0,ASR #16     ; r0 = (short)sum
        MOV     pc,r14            ; return r0
        
add_v1_s
        ADD     r0,r0,r1,ASR #1   ; r0 = (int)a + ((int)b>>1)
        MOV     r0,r0,LSL #16
        MOV     r0,r0,ASR #16     ; r0 = (short)r0
        MOV     pc,r14            ; return r0

add_v1_gcc        
        MOV     r0, r0, LSL #16
        MOV     r1, r1, LSL #16
        MOV     r1, r1, ASR #17   ; r1 = (int)a
        ADD     r1, r1, r0, ASR #16 ; r1 += (int)b
        MOV     r1, r1, LSL #16
        MOV     r0, r1, ASR #16   ; r0 = (short)r1
        MOV     pc, lr            ; return r0

add_v2_s
        MOV     r1,r1,LSL #16
        MOV     r0,r0,LSL #16
        MOV     r0,r0,ASR #16
        MOV     r1,r1,ASR #16
        B       add_v3
        
average_v1_s
        ADD     r0,r0,r1          ; r0 = a+b
        ADD     r0,r0,r0,LSR #31  ; if (r0<0) r0++
        MOV     r0,r0,ASR #1      ; r0 = r0>>1
        MOV     pc,r14            ; return r0
        
average_v2_s
        ADD     r0,r0,r1
        MOV     r0,r0,LSR #1
        MOV     pc,r14
        
;// Section 5.3 - looping
        
checksum_v5_s
        MOV     r2,r0             ; r2 = data
        MOV     r0,#0             ; sum = 0
        MOV     r1,#0             ; i = 0
checksum_v5_loop
        LDR     r3,[r2],#4        ; r3 = *(data++)
        ADD     r1,r1,#1          ; i++
        CMP     r1,#0x40          ; compare i, 64
        ADD     r0,r3,r0          ; sum += r3
        BCC     checksum_v5_loop  ; if (i<64) goto loop
        MOV     pc,r14            ; return sum
        
checksum_v6_s
        MOV     r2,r0             ; r2 = data
        MOV     r0,#0             ; sum = 0
        MOV     r1,#0x40          ; i = 64
checksum_v6_loop
        LDR     r3,[r2],#4        ; r3 = *(data++)
        SUBS    r1,r1,#1          ; i-- and set flags
        ADD     r0,r3,r0          ; sum += r3
        BNE     checksum_v6_loop  ; if (i!=0) goto loop
        MOV     pc,r14            ; return sum
        
checksum_v7_s
        MOV     r2,#0             ; sum = 0
        CMP     r1,#0             ; compare N, 0
        BEQ     checksum_v7_end   ; if (N==0) goto end
checksum_v7_loop
        LDR     r3,[r0],#4        ; r3 = *(data++)
        SUBS    r1,r1,#1          ; N-- and set flags
        ADD     r2,r3,r2          ; sum += r3
        BNE     checksum_v7_loop  ; if (N!=0) goto loop
checksum_v7_end
        MOV     r0,r2             ; r0 = sum
        MOV     pc,r14            ; return r0
        
checksum_v8_s
        MOV     r2,#0             ; sum = 0
checksum_v8_loop
        LDR     r3,[r0],#4        ; r3 = *(data++)
        SUBS    r1,r1,#1          ; N-- and set flags
        ADD     r2,r3,r2          ; sum += r3
        BNE     checksum_v8_loop  ; if (N!=0) goto loop
        MOV     r0,r2             ; r0 = sum
        MOV     pc,r14            ; return r0
        
checksum_v9_s
        MOV     r2,#0             ; sum = 0
checksum_v9_loop
        LDR     r3,[r0],#4        ; r3 = *(data++)
        SUBS    r1,r1,#4          ; N-=4 & set flags
        ADD     r2,r3,r2          ; sum += r3
        LDR     r3,[r0],#4        ; r3 = *(data++)
        ADD     r2,r3,r2          ; sum += r3
        LDR     r3,[r0],#4        ; r3 = *(data++)
        ADD     r2,r3,r2          ; sum += r3
        LDR     r3,[r0],#4        ; r3 = *(data++)
        ADD     r2,r3,r2          ; sum += r3
        BNE     checksum_v9_loop  ; if (N!=0) goto loop
        MOV     r0,r2             ; r0 = sum
        MOV     pc,r14            ; return r0
        
checksum_v10_s
        MOV     r3,#0
        MOVS    r2,r1,LSR #2
        BEQ     {pc} + 0x2c  ; 0x22c
        LDR     r12,[r0],#4
        SUBS    r2,r2,#1
        ADD     r3,r12,r3
        LDR     r12,[r0],#4
        ADD     r3,r12,r3
        LDR     r12,[r0],#4
        ADD     r3,r12,r3
        LDR     r12,[r0],#4
        ADD     r3,r12,r3
        BNE     {pc} - 0x24  ; 0x204
        ANDS    r1,r1,#3
        BEQ     {pc} + 0x14  ; 0x244
        LDR     r2,[r0],#4
        SUBS    r1,r1,#1
        ADD     r3,r2,r3
        BNE     {pc} - 0xc  ; 0x234
        MOV     r0,r3
        MOV     pc,r14
        
;// Section 5.4 - Register allocation
        
;// Section 5.5 - function calls
        
queue_bytes_v1_s
        STR      r14,[r13,#-4]!   ; save lr on the stack
        LDR      r12,[r13,#4]     ; r12 = N
queue_v1_loop
        LDRB     r14,[r3],#1      ; r14 = *(data++)
        STRB     r14,[r2],#1      ; *(Q_ptr++) = r14
        CMP      r2,r1            ; if (Q_ptr == Q_end)
        MOVEQ    r2,r0            ;   { Q_ptr = Q_start; }