sand.s

ARM嵌入式系统开发--软件设计与优化随书源代码。开发环境asm+c

; *****************************************************************************
; *
; * Sandstone initialize 1  
; *
; * First phase of initialization is broken into 2 sections. 
; *
; * Section 1 - initializes the SYSTEM register of the 
; *             microcontroller
; *
; * Section 2 - allows the segment display to be used. 
; *             Initialization is complete when the 0 appears 
; *             on the display.
; *
; *****************************************************************************

; -- local settings

SEG_MASK	EQU	(0x1fc00)
nSEG_MASK	EQU 	~SEG_MASK

sandstone_init1

; -- Section 1 : Place the SYSTEM register to address 0x3ff00000. Disable 
; -- both the cache and write-buffer on the microcontroller.

	LDR	r3, =SYSCFG
	LDR	r4, =0x03FFFFA0   
	STR	r4, [r3]	  	

; -- Section 2 : Initialize the hardware to use the segment display.
                           	        
	LDR 	r2, =SEG_MASK
	LDR 	r3, =IOPMOD	
	LDR 	r4, [r3]
	ORR	r4, r4, r2
	STR	r4, [r3]

	LDR 	r3, =IOPDATA	
	LDR 	r4, [r3]
	ORR	r4, r4, r2
	STR	r4, [r3]

	LDR 	r2,=nSEG_MASK

; -- To show hardware is configured correctly display 0 on 
; -- the segment display. 

	LDR	r5,data_dis0
	BL	_e7t_setSegmentDisplay

; -- Continue to the next stage 

	B 	sandstone_memory

; -- Data Section 

data_dis0 	
	DCD 	0x00017c00

; *****************************************************************************
; *
; * Remap memory. First change the segment display to show 1 and then 
; * start to initialize memory.
; *
; * ROM -> 0x01800000-0x01880000
; * SRAM Bank 1 -> 0x00000000->0x00040000
; * SRAM Bank 2 -> 0x00040000->0x00080000
; *
; *****************************************************************************
	
sandstone_memory

; -- Set segment display to show 1

	LDR 	r5,data_dis1 
	BL	_e7t_setSegmentDisplay

; -- configure the memory 

	B 	sandstone_memorycode

; * Data Section for segment display 

data_dis1 	DCD 0x00001800

sandstone_memorycode

; -- Code for initializing memory. 
; -- This code maps the reset ROM away from address zero. It is 
; -- assummed that bank 1 control register is set to 0x60 up on 
; -- powerup

	LDR	sp,=0x3fec000 

	LDR   r3, =ROMCON1
	LDR   r3, [r3]
	CMP   r3, #0x0060

; -- Error handler should be placed here 

	MRS   r3, cpsr
	BIC   r3, r3, #0x1F
	ORR   r3, r3, #0xD3 
	MSR   cpsr_fc, r3

; -- Configure the System Manger to remap flashROM
; -- The Memory Bank Control Registers must be set using store 
; -- multpiles. Set up a stack in internal sram to preserve the 
; -- original register contents.

	MOV	r3, sp
	LDR	sp, =0x03FE2000
	STR	r3, [sp, #-4]!		; preserve previous sp on 
					; new stack ...............
	STMFD	sp!, {r0-r12,lr}
	LDR	lr, =sandstone_init2
	LDR	r4, =0x1800000
	ADD	lr,lr,r4

; -- Load in the target values into the control registers

   	ADRL    r0, memorymaptable_str
	LDMIA   r0, {r1-r12}
	LDR	r0, =EXTDBWTH

; -- remap and jump to ROM code

	STMIA   r0, {r1-r12}
	MOV	pc, lr

memorymaptable_str
	DCD rEXTDBWTH	; ROM0(Half), ROM1(Word), ROM1(Word), rest Disabled
	DCD rROMCON0	; 0x1800000 ~ 0x1880000, RCS0, 4Mbit, 4cycle
	DCD rROMCON1	; 0x0000000 ~ 0x0040000, RCS1, 256KB, 2cycle
   	DCD rROMCON2	; 0x0040000 ~ 0x0080000, RCS2, 256KB, 2cycle
	DCD rROMCON3	; 
	DCD rROMCON4	; 
	DCD rROMCON5	; 
	DCD rDRAMCON0   ; 
	DCD rDRAMCON1	; 
	DCD rDRAMCON2	; 
	DCD rDRAMCON3	; 
	DCD rREFEXTCON  ;

	ALIGN


; *****************************************************************************
; *
; * Intialize Communication Hardware
; * This code initializes the serial port and then outputs a 
; * Sandstone banner to that port.
; *
; *****************************************************************************
	
sandstone_init2

	LDR 	r5,data_dis4 
	BL	_e7t_setSegmentDisplay

	B 	sandstone_serialcode

; -- Data Section for segment display

data_dis4 	DCD 0x00019800

sandstone_serialcode

; -- equivalent to *(volatile unsigned *) (UART0_BASE + UCON) = 0;

   	LDR 	r1, =UART0_BASE
   	ADD 	r1, r1,#UCON
   	MOV 	r2, #0
   	STR 	r2, [r1]

; -- equivalent to *(volatile unsigned *) (UART0_BASE + ULCON) = (ULCR8bits);

	LDR 	r1, =UART0_BASE
   	ADD 	r1, r1,#ULCON
   	MOV 	r2, #ULCR8bits
   	STR 	r2, [r1]

; -- equivalent to *(volatile unsigned *) (UART0_BASE + UCON) = UCRRxM | UCRTxM;

	LDR 	r1, =UART0_BASE
   	ADD 	r1, r1, #UCON
   	MOV 	r2, #(UCRRxM | UCRTxM)
   	STR 	r2, [r1]
	
; -- equivalent to *(volatile unsigned *) (UART0_BASE + UBRDIV) = baud;

	LDR 	r1, =UART0_BASE
   	ADD 	r1, r1, #UBRDIV
   	MOV 	r2, #(BAUD_9600)
   	STR 	r2, [r1]

; -- Print Banner

	ADRL	r0,sandstone_banner

print_loop
print_wait
	
; -- equivalent to GET_STATUS(p)	(*(volatile unsigned  *)((p) + USTAT))

	LDR	r3,=UART0_BASE
	ADD	r3,r3,#USTAT
	LDR	r4,[r3]
	
; -- equivalent to TX_READY(s)    	((s) & USRTxHoldEmpty)	

	MOV	r5, #USRTxHoldEmpty
	AND	r4,r4,r5
	CMP	r4,#0
	BEQ	print_wait
			
; -- equivalent to PUT CHAR (*(unsigned  *)((p) + UTXBUF) = (unsigned )(c))

	LDR 	r3,=UART0_BASE
	ADD	r3,r3,#UTXBUF
	STR	r1,[r3]

	LDRB	r1,[r0]
	ADD	r0,r0,#1
	CMP 	r1,#0
	BNE	print_loop	

	B 	sandstone_load_and_boot 

; -- Data Section : Text banner

sandstone_banner
	DCB	"\n\r*\n\r"
	DCB 	"\n\rSandstone Firmware (0.01)\n\r"
	DCB	"- platform ......... e7t\n\r"
	DCB	"- status ........... alive\n\r"
	DCB     "- memory ........... remapped\n\r"
	DCB	"\n\r+ booting payload ...",0

; *****************************************************************************
; *
; * Copying and passing control over to the Payload
; * This occurs in two sections. The first copies the payload to
; * address 0x0000000 and the second section pass control over to 
; * the payload by updating the PC directly.
; *
; *****************************************************************************

	ALIGN 4

sandstone_load_and_boot

; -- Section 1 : Copy payload to address 0x00000000

	MOV	r13,#0

	LDR	r12,payload_start_address
	LDR	r14,payload_end_address

block_copy	
	LDMIA	r12!,{r0-r11}
	STMIA   r13!,{r0-r11}
	CMP	r12,r14
	BLE	block_copy
	
; -- Section 2 : Relingish control over to the payload

	MOV	pc,#0

     LTORG
     
; -- Data Section : Payload information inserted at build time.

payload_start_address
	DCD     startAddress
payload_end_address
	DCD     endAddress
	
; * -- _e7t_setSegmentDisplay ------------------------------------------
; *
; * Description : set the segment display on the E7T platform 
; * 
; * Parameters	: register r5 - contains the new value...
; * Return    	: none...
; * Notes	: none...
; *

_e7t_setSegmentDisplay

	LDR 	r2,=nSEG_MASK
	LDR 	r3,=IOPDATA	
	LDR 	r4,[r3]
	AND 	r4,r4,r2
	STR 	r4,[r3]
	LDR 	r5,data_dis1 
	ORR 	r4,r4,r5
	STR 	r4,[r3]	
	MOV 	pc,lr

startAddress
     INCBIN ../../payload/slos.bin
endAddress
	END