mpu.s

ARM嵌入式系统开发--软件设计与优化随书源代码。开发环境asm+c

   MCR p15, 0, r3, c5, c0, 3  ; set ext access permissions

   MOV r0, #0                 ; success
   MOV pc, lr                 ; region set return

;-----------------
; Set Cache and Buffer for Instruction and Data Regions
; mpuRegionCB(unsigned region, unsigned CB)
;-----------------   

mpuRegionCB
   CMP r0, #0x7               ; check if region is in range
   CMPLE r1, #0x7             ; check if CCB in range
   BHI  OutOfRange            ; jump to the error handler
   MOV r2, #1                 ; set bit mask 1 bit

setBuffer
   MRC p15, 0, r3, c3, c0, 0  ; get buffer info
   BIC r3, r3, r2, lsl r0     ; clear buffer bit
   BIC r12, r1, #0x6          ; clear I D cache part of CB   
   ORR r3, r3, r12, lsl r0    ; set buffer bit
   MCR p15, 0, r3, c3, c0, 0  ; set buffer bit for region

setDCache
   MRC p15, 0, r3, c2, c0, 0  ; get D cache info
   BIC r3, r3, r2, lsl r0     ; clear D cache bit
   MOV r1, r1, lsr #1         ; drop buffer bit move D cache in position
   BIC r12, r1, #0x2          ; clear I cache part of CB   
   ORR r3, r3, r1, lsl r0     ; set D cache bit
   MCR p15, 0, r3, c2, c0, 0  ; set D cache for region

setICache
   MRC p15, 0, r3, c2, c0, 1  ; get I cache info
   BIC r3, r3, r2, lsl r0     ; clear I cache bit
   MOV r1, r1, lsr #1         ; drop D cache bit move I cache in position
   ORR r3, r3, r1, lsl r0     ; set I cache bit
   MCR p15, 0, r3, c2, c0, 1  ; set I cache for region


  MOV r0, #0                 ; success
  MOV pc, lr                 ; return

;-----------------
; Enable Region
; int mpuRegionEnable(unsigned region, unsigned enable)
;-----------------

mpuRegionEnable
   CMP r0, #7                 ; check if region is in range
   CMPLE r1, #1
   BHI  OutOfRange            ; ERROR handler

   MOV r2, r0                 ; r3 = region
   MOV r0, #0                 ; set function success
   MOV     r12, pc            ; Load address of jump table
   LDR     pc, [r12,r2,LSL#2] ; Jump to the routine
EnableJumpTable
   DCD     enableRegion0
   DCD     enableRegion1
   DCD     enableRegion2
   DCD     enableRegion3
   DCD     enableRegion4
   DCD     enableRegion5
   DCD     enableRegion6
   DCD     enableRegion7

enableRegion0                 ; set region 0 enable
   MRC p15, 0, r3, c6, c0, 0  ; get D region 0 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c0, 0  ; set D region 0 enable

   MRC p15, 0, r3, c6, c0, 1  ; get region 0 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set I enable or disable region 
   MCR p15, 0, r3, c6, c0, 1  ; set I region 0 enable
   MOV pc, lr                 ; region set return

enableRegion1                 ; define D region disables region
   MRC p15, 0, r3, c6, c1, 0  ; get D region 1 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c1, 0  ; set D region 1 enable

   MRC p15, 0, r3, c6, c1, 1  ; get I region 1 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c1, 1  ; set I region 1 enable
   MOV pc, lr                 ; region set return

enableRegion2                 ; define region disables region
   MRC p15, 0, r3, c6, c2, 0  ; get D region 2 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c2, 0  ; set D region 2 enable

   MRC p15, 0, r3, c6, c2, 1  ; get I region 2 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c2, 1  ; set I region 2 enable
   MOV pc, lr                 ; region set return

enableRegion3                 ; define region disables region
   MRC p15, 0, r3, c6, c3, 0  ; get D region 3 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c3, 0  ; set D region 3 enable

   MRC p15, 0, r3, c6, c3, 1  ; get region 3 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c3, 1  ; set I region 3 enable
   MOV pc, lr                 ; region set return

enableRegion4                 ; define region disables region
   MRC p15, 0, r3, c6, c4, 0  ; get D region 4 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c4, 0  ; set D  region 4 enable

   MRC p15, 0, r3, c6, c4, 1  ; get I region 4 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c4, 1  ; set I region 4 enable
   MOV pc, lr                 ; region set return

enableRegion5                 ; define region disables region
   MRC p15, 0, r3, c6, c5, 0  ; get D region 5 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c5, 0  ; set region 5 enable

   MRC p15, 0, r3, c6, c5, 1  ; get I region 5 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c5, 1  ; set I region 5 enable
   MOV pc, lr                 ; region set return

enableRegion6                 ; define region disables region
   MRC p15, 0, r3, c6, c6, 0  ; get D region 6 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c6, 0  ; set D region 6 enable

   MRC p15, 0, r3, c6, c6, 1  ; get I region 6 base and size
   BIC r3, r3, #1             ; clear I region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c6, 1  ; set I region 6 enable
   MOV pc, lr                 ; region set return

enableRegion7                 ; define region disables region
   MRC p15, 0, r3, c6, c7, 0  ; get D region 7 base and size
   BIC r3, r3, #1             ; clear D region enable       
   ORR r3, r3, r1             ; set enable or disable D region 
   MCR p15, 0, r3, c6, c7, 0  ; set D region 7 enable

   MRC p15, 0, r3, c6, c7, 1  ; get I region 7 base and size
   BIC r3, r3, #1             ; clear I region enable       
   ORR r3, r3, r1             ; set enable or disable I region 
   MCR p15, 0, r3, c6, c7, 1  ; set I region 7 enable
   MOV pc, lr                 ; region set return

OutOfRange
   B OutOfRange               ; loop at error for debugging

ErrorControl
   b ErrorControl
ErrorPermission               ; Error Permission =4
   b ErrorPermission          ; debug test
   ADD r0, r0, #1
ErrorSize                     ; Error  Size = 3
   ADD r0, r0, #1
ErrorAddress                  ; Error  Address unaligned = 2
   ADD r0, r0, #1
ErrorRegion                   ; Error  Region not valid = 1
   ADD r0, r0, #1
   MOV pc, lr

; /* -------------------------------------------------------
;  *
;  * Change Region 2 (called from the context switch)
;  * 
;  * fn: mpuRegionDefine (region, PCB[0], PCB[1]);
;  * fn: mpuRegionStdAccess (region, PCB[2]);
;  * fn: mpuRegionCB (region, PCB[3]);
;  * fn: mpuRegionEnable (region, PCB[4]);
;  * 
;  * -------------------------------------------------------
;  */

mpuScheduleRegion2

; /* -------------------------------------------------------
;  *
;  * Change Region 2 (called from the context switch) to a 
;  * new task...
;  * 
;  * Register r0 points to the new identifier...
;  *
;  * fn: mpuRegionDefine (region2, PCB[0], PCB[1]);
;  * fn: mpuRegionStdAccess (region2, PCB[2]);
;  * fn: mpuRegionCB (region2, PCB[3]);
;  * fn: mpuRegionEnable (region2, PCB[4]);
;  * 
;  * -------------------------------------------------------
;  */

     STMFD    sp!,{r0-r4,r12,lr}   ; save context
     LDR      r1,=MpuPCB_Table
     LDR      r4,[r1,r0,LSL#2]     ; r4= new PCB address
  
; --------------------------------------------------------
; define the new region ... 
; --------------------------------------------------------

     MOV     r0,#2                 ; parameter 1 region2
     LDR     r1,[r4]               ; parameter 2 RegionTable[0]
     LDR     r2,[r4,#4]            ; parameter 3 RegionTable[1]
     BL      mpuRegionDefine  	 

; --------------------------------------------------------
; define standard access permissions ...
; --------------------------------------------------------

     MOV     r0,#2                 ; parameter 1 region2
     LDR     r1,[r4,#8]            ; parameter 2 RegionTable[2]
     BL      mpuRegionStdAccess       

; --------------------------------------------------------
; cache and write through ...
; --------------------------------------------------------

     MOV     r0,#2                 ; parameter 1 region2
     LDR     r1,[r4,#12]           ; parameter 2 RegionTable[3]
     BL      mpuRegionCB          

; --------------------------------------------------------
; enable new region ...
; --------------------------------------------------------

     MOV     r0,#2                 ; parameter 1 region2
     LDR     r1,[r4,#16]           ; parameter 2 RegionTable[4]
     BL      mpuRegionEnable          

; --------------------------------------------------------
; restore context and return to scheduler ...
; --------------------------------------------------------  

     LDMFD   sp!,{r0-r4,r12,pc}
     END