📄 startup.asm
字号:
popa ; pop GP registers
pop ds ; pop segment registers
pop es
pop fs
pop gs
add esp,8 ; drop exception number and error code
iret
; the stack is always 32 bits wide in 32-bit pmode
; the push will zero-extend (sign-extend?) the byte to 32 bits
isr0:
push byte 0
push byte 0
jmp fault1 ; zero divide (fault)
isr1:
push byte 0
push byte 1
jmp fault1 ; debug/single step
isr2:
push byte 0
push byte 2
jmp fault1 ; non-maskable interrupt (trap)
isr3:
push byte 0
push byte 3
jmp fault1 ; INT3 (trap)
isr4:
push byte 0
push byte 4
jmp fault1 ; INTO (trap)
isr5:
push byte 0
push byte 5
jmp fault1 ; BOUND (fault)
isr6:
push byte 0
push byte 6
jmp fault1 ; invalid opcode (fault)
isr7:
push byte 0
push byte 7
jmp fault1 ; coprocessor not available (fault)
isr8:
nop
nop
push byte 8
jmp fault1 ; double fault (abort w/ error code)
isr9:
push byte 0
push byte 9
jmp fault1 ; coproc segment overrun (abort; 386/486SX only)
isr0A:
nop
nop
push byte 0Ah
jmp fault1 ; bad TSS (fault w/ error code)
isr0B:
nop
nop
push byte 0Bh
jmp fault1 ; segment not present (fault w/ error code)
isr0C:
nop
nop
push byte 0Ch
jmp fault1 ; stack fault (fault w/ error code)
isr0D:
nop
nop
push byte 0Dh
jmp fault1 ; GPF (fault w/ error code)
isr0E:
nop
nop
push byte 0Eh
jmp fault1 ; page fault
isr0F:
push byte 0
push byte 0Fh
jmp fault1 ; reserved
isr10:
push byte 0
push byte 10h
jmp fault1 ; FP exception/coprocessor error (trap)
isr11:
push byte 0
push byte 11h
jmp fault1 ; alignment check (trap; 486+ only)
isr12:
push byte 0
push byte 12h
jmp fault1 ; machine check (Pentium+ only)
isr13:
push byte 0
push byte 13h
jmp fault1
isr14:
push byte 0
push byte 14h
jmp fault1
isr15:
push byte 0
push byte 15h
jmp fault1
isr16:
push byte 0
push byte 16h
jmp fault1
isr17:
push byte 0
push byte 17h
jmp fault1
isr18:
push byte 0
push byte 18h
jmp fault1
isr19:
push byte 0
push byte 19h
jmp fault1
isr1A:
push byte 0
push byte 1Ah
jmp fault1
isr1B:
push byte 0
push byte 1Bh
jmp fault1
isr1C:
push byte 0
push byte 1Ch
jmp fault1
isr1D:
push byte 0
push byte 1Dh
jmp fault1
isr1E:
push byte 0
push byte 1Eh
jmp fault1
isr1F:
push byte 0
push byte 1Fh
jmp fault1
; isr20 through isr2F are hardware interrupts. The 8259 programmable
; interrupt controller (PIC) chips must be reprogrammed to make these work.
isr20:
push byte 0
push byte 20h
jmp fault1 ; IRQ 0/timer interrupt
isr21:
push byte 0
push byte 21h
jmp fault1 ; IRQ 1/keyboard interrupt
isr22:
push byte 0
push byte 22h
jmp fault1
isr23:
push byte 0
push byte 23h
jmp fault1
isr24:
push byte 0
push byte 24h
jmp fault1
isr25:
push byte 0
push byte 25h
jmp fault1
isr26:
push byte 0
push byte 26h
jmp fault1 ; IRQ 6/floppy interrupt
isr27:
push byte 0
push byte 27h
jmp fault1
isr28:
push byte 0
push byte 28h
jmp fault1 ; IRQ 8/real-time clock interrupt
isr29:
push byte 0
push byte 29h
jmp fault1
isr2A:
push byte 0
push byte 2Ah
jmp fault1
isr2B:
push byte 0
push byte 2Bh
jmp fault1
isr2C:
push byte 0
push byte 2Ch
jmp fault1
isr2D:
push byte 0
push byte 2Dh
jmp fault1 ; IRQ 13/math coprocessor interrupt
isr2E:
push byte 0
push byte 2Eh
jmp fault1 ; IRQ 14/primary ATA ("IDE") drive interrupt
isr2F:
push byte 0
push byte 2Fh
jmp fault1 ; IRQ 15/secondary ATA drive interrupt
; syscall software interrupt
isr30:
push byte 0
push byte 30h
jmp fault1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
[SECTION .data]
; 32 ring 0 interrupt gates
idt:
times 48 dw 0, SYS_CODE_SEL, 8E00h, 0
; one ring 3 interrupt gate for syscalls (INT 30h)
dw 0 ; offset 15:0
dw SYS_CODE_SEL ; selector
db 0 ; (always 0 for interrupt gates)
db 0EEh ; present,ring 3,'386 interrupt gate
dw 0 ; offset 31:16
idt_end:
idt_ptr:
dw idt_end - idt - 1 ; IDT limit
dd idt ; linear adr of IDT (set above)
; we don't use the TSS for task-switching, but we still need it to store
; the kernel (ring 0) stack pointer while user (ring 3) code is running
; (also need it for the I/O permission bitmap)
tss:
dw 0, 0 ; back link
tss_esp0:
dd 0 ; ESP0
dw SYS_DATA_SEL, 0 ; SS0, reserved
dd 0 ; ESP1
dw 0, 0 ; SS1, reserved
dd 0 ; ESP2
dw 0, 0 ; SS2, reserved
dd 0 ; CR3
dd 0, 0 ; EIP, EFLAGS
dd 0, 0, 0, 0 ; EAX, ECX, EDX, EBX
dd 0, 0, 0, 0 ; ESP, EBP, ESI, EDI
dw 0, 0 ; ES, reserved
dw 0, 0 ; CS, reserved
dw 0, 0 ; SS, reserved
dw 0, 0 ; DS, reserved
dw 0, 0 ; FS, reserved
dw 0, 0 ; GS, reserved
dw 0, 0 ; LDT, reserved
dw 0, 103 ; debug, IO permission bitmap base
; null descriptor. gdt_ptr could be put here to save a few
; bytes, but that can be confusing.
gdt:
dw 0 ; limit 15:0
dw 0 ; base 15:0
db 0 ; base 23:16
db 0 ; type
db 0 ; limit 19:16, flags
db 0 ; base 31:24
; descriptor for task-state segment (TSS)
TSS_SEL equ $-gdt
gdt1:
dw 103
dw 0
db 0
db 89h ; ring 0 available 32-bit TSS
db 0
db 0
; ring 0 kernel code segment descriptor. Segmentation is deprecated
; by setting the segment limits to 4Gig - 1 and the segment bases to 0.
SYS_CODE_SEL equ $-gdt
gdt2:
dw 0FFFFh
dw 0
db 0
db 9Ah ; present,ring 0,code,non-conforming,readable
db 0CFh
db 0
; ring 0 kernel data segment descriptor
SYS_DATA_SEL equ $-gdt
gdt3:
dw 0FFFFh
dw 0
db 0
db 92h ; present,ring 0,data,expand-up,writable
db 0CFh
db 0
; ring 3 user code segment descriptor
USER_CODE_SEL equ ($-gdt) | 3
dw 0FFFFh
dw 0
db 0
db 0FAh ; present,ring 3,code,non-conforming,readable
db 0CFh
db 0
; ring 3 user data segment descriptor
USER_DATA_SEL equ ($-gdt) | 3
dw 0FFFFh
dw 0
db 0
db 0F2h ; present,ring 3,data,expand-up,writable
db 0CFh
db 0
; linear data segment descriptor
LINEAR_DATA_SEL equ $-gdt
dw 0FFFFh
dw 0
db 0
db 92h ; present,ring 0,data,expand-up,writable
db 0CFh
db 0
; linear code segment descriptor
LINEAR_CODE_SEL equ $-gdt
dw 0FFFFh
dw 0
db 0
db 9Ah ; present,ring 0,code,non-conforming,readable
db 0CFh
db 0
gdt_end:
gdt_ptr:
dw gdt_end - gdt - 1 ; GDT limit
dd gdt ; linear adr of GDT (set above)
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
[SECTION .bss]
; /------- START OF 4K BOOT DATA
EXPORT _conv_mem_size ; conventional memory size (bytes)
resd 1
EXPORT _ext_mem_size ; extended memory size (bytes)
resd 1
EXPORT _init_ramdisk_adr ; where the initial RAM disk is loaded
resd 1
EXPORT _init_ramdisk_size ; size of initial RAM disk
resd 1
; kernel command line
times (1024 - 4) resd 1 ; padding to 4K
; \------- END OF 4K BOOT DATA
; task #0 page directory and tables
;
; *** WARNING ***: page tables must be aligned to page (4K) boundaries:
; 1. make sure the linker script aligns the BSS to a page boundary
; 2. make sure the bootloader loads the kernel to a page boundary
; 3. make sure that anything placed before the page tables in the BSS
; (i.e. the boot data) is a multiple of 4K in size.
kernel_page_dir:
times 1024 resd 1 ; kernel page dir
kernel_page_table:
times 1024 resd 1 ; page table for mapping kernel memory
ram_page_table:
times 1024 resd 1 ; page table for identity-mapping <=4 meg RAM
; task #0 kernel stack
resd 1024
stack:
EXPORT _kvirt_to_phys
resd 1
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