isr.c

飞利浦公司usb2.0芯片isp1581的通用驱动代码

/*
   //*************************************************************************
   //
   //                  P H I L I P S   P R O P R I E T A R Y
   //
   //           COPYRIGHT (c)   2000 BY PHILIPS SINGAPORE.
   //                     --  ALL RIGHTS RESERVED  --
   //
   // Project:		ISP1581 EVA board
   // File Name:	ISR.C
   // Author:		Qian Jiang
   // Created:		Sept. 1, 2000
   // Modified:
   // Revision:		0.0
   //
   //*************************************************************************
*/
/*
//*************************************************************************
//
1 Feb 2002 -- Jiang Qian

	More qualification of HighSpeed configuration during interrupt.
	Reason, it is asserted when resume from high speed suspend.

13, Jan 2002 -- Jiang Qian
	DMA EOT process :
		ISP1581 ES6 add a bit of "ODD" indicating odd bytes in last DMA strobe

//*************************************************************************
*/
#include <stdio.h>
#include <string.h>
#include <dos.h>

#include "BasicTyp.h"
#include "common.h"

#include "USB200.h"

#include "HAL4Sys.h"
#include "ISP1581.h"

#include "isr.h"
#include "mainloop.h"
#include "verify.h"
#include "chap_9.h"
#include "iso.h"
/*
//*************************************************************************
//  Public static data
//*************************************************************************
*/

extern ISP1581FLAGS     bISP1581flags;
extern CONTROL_XFER ControlData;

extern IO_REQUEST idata ioRequest;
extern unsigned long dmaBuffer;
extern unsigned long ioBuffer; // V2.1
extern unsigned long isoBuffer; // V2.1
extern GLOBE_VARIABLE globe_variable;

extern ULONG Hal4Sys_ClockTicks;
extern USB_TESTPACKET  bTestPacket;

ULONG Isr_Clock = 0;

/*
//*************************************************************************
//  Private static data
//*************************************************************************
*/

void interrupt (*OldUsbIsr)();


/*
//*************************************************************************
//  ISR Subroutine
//*************************************************************************
*/
void interrupt usb_isr(void)
{
	Isr_Clock = Hal4Sys_ClockTicks;
	Hal4Sys_ControlISP1581Interrupt(FALSE);
	fn_usb_isr();
	outportb(0x20, 0x20);
//	Hal4Sys_ControlISP1581Interrupt(TRUE);
}


void fn_usb_isr(void)
{
	USHORT   int_low, int_high;
	unsigned char nosetup;

	bISP1581flags.bits.At_IRQL1 = 1;

	int_low = ISP1581_ReadInterruptRegisterLow();
	int_high = ISP1581_ReadInterruptRegisterHigh();

	if(int_low != 0 || int_high != 0)
	{
		if(int_low & int_busreset)
		{
			ISP1581_IntClearl(int_busreset);
			if(int_low & int_hs_stat)
			{
				bISP1581flags.bits.ConnectSpeed = HighSpeed;
//				bISP1581flags.bits.ConnectSpeed = FullSpeed;
				Isr_BusReset();
				textattr(0x09);
				cprintf("HIGHSPEED BUSRESET");
				textattr(0x07);
				int_low &= ~int_hs_stat;
				ISP1581_IntClearl(int_hs_stat);
			}
			else
			{
				bISP1581flags.bits.ConnectSpeed = FullSpeed;
				Isr_BusReset();
				textattr(0x04);
				cprintf("FULLSPEED BUSRESET");
				textattr(0x07);
			}
		}

		if(int_low & int_hs_stat)
		{
//			bISP1581flags.bits.ConnectSpeed = FullSpeed;
			ISP1581_IntClearl(int_hs_stat);
//			ISP1581_ConfigEndpoint();
			if(bISP1581flags.bits.ConnectSpeed == FullSpeed)
			{
				bISP1581flags.bits.ConnectSpeed = HighSpeed;
				textattr(0x09);
				cprintf("SET HIGHSPEED");
				Isr_BusReset();
			}
			else
			{
				textattr(0x09);
				cprintf("HIGHSPEED RESTORED");
			}
			textattr(0x07);
		}
		else if(int_low & int_susp){
				Isr_SuspendChange();
			}
		else if(int_low & int_resume){
				Isr_Resume();
			}
		else if(int_low & int_dma){
				Isr_DmaEot();
			}

		else if(int_low & (int_sof|int_psof)){
				Isr_SOF();
			}
		else {
				if(int_low & int_ep0set)
				{
					nosetup = 0x0;
				}
				else
				{
					nosetup = 0x1;
				}


				if(int_low & int_ep1rx)
					Isr_Ep01rxDone();
				if(int_low & int_ep1tx)
					Isr_Ep01txDone();
				if(int_low & int_ep2rx)
					Isr_Ep02rxDone();
				if(int_low & int_ep2tx)
					Isr_Ep02txDone();
				if(int_high & int_ep3rx)
					Isr_Ep03rxDone();
				if(int_high & int_ep3tx)
					Isr_Ep03txDone();
	// *************************** Control pipe *******************************
				if(int_low & int_ep0tx)
					Isr_Ep00TxDone(nosetup);

				if(int_low & int_ep0rx)     /*Keep Control Out of EP0 at Highest priority*/
					Isr_Ep00RxDone(nosetup);

				if(nosetup == 0)
					Isr_EP0Setup();
	//**************************** not used endpoints*************************
	/*			if(int_high & int_ep4rx)
					Isr_Ep04rxDone();
				if(int_high & int_ep4tx)
					Isr_Ep04txDone();
				if(int_high & int_ep5rx)
					Isr_Ep05rxDone();
				if(int_high & int_ep5tx)
					Isr_Ep05txDone();
				if(int_high & int_ep6rx)
					Isr_Ep06rxDone();
				if(int_high & int_ep6tx)
					Isr_Ep06txDone();
				if(int_high & int_ep7rx)
					Isr_Ep07rxDone();
				if(int_high & int_ep7tx)
					Isr_Ep07txDone();
*/		}
	}
	bISP1581flags.bits.At_IRQL1 = 0;
}

void Isr_SuspendChange(void)
{
	bISP1581flags.bits.suspend = 1;
	ISP1581_IntClearl(int_susp);
}

void Isr_Resume(void)
{
	ISP1581_UnlockDevice();
	textattr(0x06);
	cprintf("USB_RESUME ");
	textattr(0x07);
	bISP1581flags.bits.suspend = 0;
	ISP1581_IntClearl(int_resume);
}

void Isr_DmaEot(void)
{
//	unsigned short dmaeot_reason, dma_width16;
	unsigned short dmaeot_reason;
#ifdef debug
	unsigned short dma_width16;
	unsigned short isp1581_dma_counter_remains;
#endif
	dmaeot_reason =	ISP1581_GetDMAInt();
#ifdef dma_on_local
#ifdef debug
//			cprintf(" dma_on_local eot ");
#endif
	Local_dma_cfg(dma_ctl_rst);
#endif
//	isp1581_dma_counter_remains =  ISP1581_GetDMACounterLow();
// DMA_ODD bit process, test if the definition works fine;
//	dma_width16 = ISP1581_GetDMAConfig() & dmacfg_width16;
#ifdef debug
	dma_width16 = ISP1581_GetDMAConfig() & dmacfg_width16;
	isp1581_dma_counter_remains =  ISP1581_GetDMACounterLow();
	cprintf("\r\noddint %x ", dmaeot_reason);
	if(isp1581_dma_counter_remains)
	{
		debug_out(debug_code_eot_nz);
		cprintf(" +Counter=%04u ", isp1581_dma_counter_remains);
	}// outport trigger for LA.
	else
	{
		debug_out(debug_code_eot);
		cprintf(" -Counter=%04u ", isp1581_dma_counter_remains);
	}
	
	if(globe_variable.xfer_dir == 0)
	{
		if (globe_variable.scantransfer_length_odd)
		{
			if (dmaeot_reason & dmaint_oddint) // transfer set odd
				cprintf(" odd/odd ");
			else
			{
				cprintf(" odd/even\r\n");
				key2go();
			}
		}
		else
		{
			if (dmaeot_reason & dmaint_oddint) // transfer set odd
			{
				cprintf(" even/odd\r\n");
				key2go();
			}
			else
				cprintf(" even/even ");
		}
	}
#endif
	ISP1581_SetDMAInt(dmaeot_reason);//clear DMA interrupt ;
	ISP1581_IntClearl(int_dma);
	bISP1581flags.bits.dma_state = DMA_IDLE;
#ifdef debug1
	cprintf("dma_state EOT %x ",bISP1581flags.bits.dma_state);
#endif
}

//true iso
void Isr_SOF(void)
{
}

void Isr_EP0Setup(void)
{
		// Getting Setup Packet
		ISP1581_IntClearl(int_ep0set);
		switch( bISP1581flags.bits.DCP_state )
		{
		case USBFSM4DCP_SETUPPROC:
		case USBFSM4DCP_DATAOUT:
		case USBFSM4DCP_DATAIN:
		case USBFSM4DCP_REQUESTPROC:
		case USBFSM4DCP_REQUESTPROC1:
			ControlData.Abort = TRUE;
		case USBFSM4DCP_CONTROLREADHANDSHAKE:
		case USBFSM4DCP_STALL :
		case USBFSM4DCP_IDLE :
		case USBFSM4DCP_CONTROLOUTDONE:
			bISP1581flags.bits.DCP_state = USBFSM4DCP_SETUPPROC;
#ifdef debug
			cprintf("\n\r^_^%hx", bISP1581flags.bits.DCP_state);
#endif
			break;
		default:
			cprintf("Fatal Error , Getting Setup Packet from UNKOWN state! =x%hx\n", bISP1581flags.bits.DCP_state);
			bISP1581flags.bits.DCP_state = USBFSM4DCP_SETUPPROC;
			cprintf("Error recoverd to state =x%hx", bISP1581flags.bits.DCP_state);
			break;
		} /* not a setup packet, just a Data Out Packet */

			SetupToken_Handler();
}

void Isr_Ep00RxDone(unsigned char nosetup)
{
	UCHAR       i;
	unsigned short len;

	switch (bISP1581flags.bits.DCP_state)
	{
	case USBFSM4DCP_DATAOUT:
		// Normal Path
		// Data out Stage of In Control Write Transfer.
#ifdef debug
//		cprintf("dataout? ^_^%x",bISP1581flags.bits.DCP_state);
#endif
		if(ControlData.wLength >= ControlData.wCount)
			len = ControlData.wLength - ControlData.wCount;
		else
			len = 0x0;

		i =	ISP1581_ReadControlEndpoint(ControlData.dataBuffer + ControlData.wCount, len);
		ControlData.wCount += i;

		if(ControlData.wCount <= ControlData.wLength && i <= EP0_PACKET_SIZE)
		{
			if( i != EP0_PACKET_SIZE && ControlData.wCount <= ControlData.wLength)	// valid control out length
			{
				bISP1581flags.bits.CONTROL_HANDLE_DONE = 1;
				bISP1581flags.bits.DCP_state = USBFSM4DCP_REQUESTPROC;
#ifdef debug
				cprintf("^_^%hx", bISP1581flags.bits.DCP_state);
#endif
			} /* else  in state of USBFSM4DCP_DATAOUT */
			ISP1581_IntClearl(int_ep0rx);
		}
		else	// too much data out than expected
		{
			if(nosetup)
			{
				ISP1581_StallEP0InControlWrite();
				bISP1581flags.bits.DCP_state = USBFSM4DCP_STALL;
#ifdef debug
				cprintf("^_^%hxCONTROLOUTNOSETUP", bISP1581flags.bits.DCP_state);
#endif
			}
			ISP1581_IntClearl(int_ep0rx);
		}
		break;
	case USBFSM4DCP_CONTROLREADHANDSHAKE:
		bISP1581flags.bits.DCP_state = USBFSM4DCP_IDLE;
#ifdef debug
		cprintf("^_^%hx1", bISP1581flags.bits.DCP_state);
#endif
		ISP1581_IntClearl(int_ep0rx);
	case USBFSM4DCP_IDLE:
		/*
		// it may or may not be zero Length Packet in the STATUS stage of Get Command,
		*/
		/*
		// According to USB1.1 8.5.2.1
		// Any Length Pkt issued by host is taken as valid status stage
		*/
		bISP1581flags.bits.DCP_state = USBFSM4DCP_IDLE;
#ifdef debug
		cprintf("^_^%hx1", bISP1581flags.bits.DCP_state);
#endif
		/* ISP1581 has Ack it in hardware, otherwise I cannot receive this interrupt*/
		if(nosetup)
			ISP1581_IntClearl(int_ep0rx);
		break;

	case USBFSM4DCP_STALL:
		/*
		// After STALL,Except SETUP Token, No other token is allowed
		*/
		/* !!!Make sure FAll THRU!!! */
		// jiang qian, already stalled been stalled.
		if(nosetup)
			ISP1581_IntClearl(int_ep0rx);

		break;
	case USBFSM4DCP_SETUPPROC:
		/*
		//In SETUPPROC, no Data-out phase shall occur.
		*/
		/* !!!Make sure FAll THRU!!! */
	case USBFSM4DCP_REQUESTPROC:

		/* !!!Make sure FAll THRU!!! */
	case USBFSM4DCP_DATAIN:
	default:
		/*
		// Anyway Stall it
		*/
		cprintf("Fatal Error: State = %x\n",bISP1581flags.bits.DCP_state);
//			cprintf("brequest, x%xh, bmrequest x%xh \n",ControlData.DeviceRequest.bRequest, ControlData.DeviceRequest.bmRequestType);
		if(nosetup)
		{
			ISP1581_StallEP0InControlWrite();
			bISP1581flags.bits.DCP_state = USBFSM4DCP_STALL;
#ifdef debug
			cprintf("^_^%hxUNEXPECTEDCONTROLOUT", bISP1581flags.bits.DCP_state);
#endif
			//			key2go();
		}
		break;
	}
	return ;
}