isp1581.c

飞利浦公司usb2.0芯片isp1581的通用驱动代码

#ifdef debug
	if(j > len)
	{
		cprintf("read pkt length %x longer than required length %x !\n", j,len);
	}
#endif
	/* Clear Buffer */
/*      if(pktno != pktno1)
	{
		key = 0;
		cprintf("press 'G' or 'g' to go");
		while(key != 'g' && key != 'G')
		{
			if(bioskey(1))
			key = (bioskey(0)&0xff);
		}// error been read
		pktno = pktno1;
	}
*///    cprintf("\r\n");
	pktno ++;
	
#ifdef debug
	textattr(0x01);
	cprintf(".");//("~%04x",pktno1);
	textattr(0x07);
#endif
	return j;
}

//USHORT ISP1581_ReadISOEndpoint(UCHAR bEPIndex, unsigned short far * buf, USHORT len)
USHORT ISP1581_ReadISOEndpoint(UCHAR bEPIndex, unsigned short far * buf)
{
	USHORT i, j, c;
	unsigned char key, d, e;

#ifdef debug
	static unsigned short pktno=0, pktno1;
#endif
	static unsigned short pktno1;

//	static unsigned char f;
//	static unsigned short wtogglestall=0x0008;

	ISP1581_SetEPIndex(bEPIndex);
	outport(aport, rega_dcount);
	j = inport(dport);

	outport(aport, rega_dport);
	pktno1 = inport(dport);
	*buf = pktno1;
	buf++;
	for(i=2; i<j; i=i+2, buf++ )
	{
		c = inport(dport);
		*buf = c;
	}

#ifdef debug
	textattr(0x01);
	cprintf("~%04x",pktno1);
	textattr(0x07);
#endif
	return j;
}

USHORT ISP1581_WriteControlEndpoint(UCHAR * buf, USHORT len)
{
	USHORT i;
	USHORT  c;

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	ISP1581_SetEPIndex(EPINDEX4EP07OUT);// work around for es4, write in endpoint corrupts out endpoint data
	ISP1581_SetEPIndex(EPINDEX4CONTROL_IN);

//	if(len & 0x1)
//	{
		outport(aport, rega_dcount);
		outport(dport, len);
#ifdef debug
//		cprintf("short pkt odd bytes");
//	}
/*	textattr(0x03);
	cprintf("CONLEN%x#",len);
	textattr(0x07);
*/
#endif
	outport(aport, rega_dport);

	/* Write Buffer */
	for(i=0; i<len; i=i+2, buf++ )
	{
		c = *buf;
		buf++;
		c += (USHORT)(*buf << 8);
		outport(dport, c);
#ifdef debug
/*		textattr(0x03);
		cprintf("%04x#",c);
		textattr(0x07);
*/
#endif
	}

#ifdef debug
	/* Validate Buffer */
/*      if((len < EP0_PACKET_SIZE) && ((len & 0x1) == 0))
      {
              outport(aport, rega_epctlfc);
              outport(dport, epctlfc_venp | 0xff00);
			  cprintf("short control pkt, %x", len);
      }

	  if(len >= EP0_PACKET_SIZE)
		cprintf("64 bytes control pkt");
*/
#endif
	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();

	return len;
}

void ISP1581_WriteBulkEndpoint(UCHAR bEPIndex, unsigned short far * buf, USHORT len)
{
	USHORT  i, c, d, e;
	unsigned char key, f;
//	static unsigned short pktno=0, pktno1;
	static unsigned short pktno1;
#ifdef test_datatogglebitofstall
	static unsigned short wtogglestall=0x0008;
#endif

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	ISP1581_SetEPIndex(EPINDEX4EP07OUT);// work around for es4, write in endpoint corrupts out endpoint data
	ISP1581_SetEPIndex(bEPIndex);
//stall test
#ifdef test_datatogglebitofstall
	if(*buf == wtogglestall)
	{
		ISP1581_SetEndpointStatus(bEPIndex, epctlfc_stall);
		bISP1581flags.bits.BULKIN_EP1_STALL = 1;
		switch(bISP1581flags.bits.ConnectSpeed)	
		{
			case HighSpeed:
			{
				if(wtogglestall == 0x0010)
					wtogglestall = 0x0008;
				else
					wtogglestall = 0x0010;
			return;
			}
			case FullSpeed:
			{
				if(wtogglestall == 0x0003)
					wtogglestall = 0x0002;
				else
					wtogglestall = 0x0003;
				return;
			}
		}
	}
#endif
	if(len < globe_variable.maxepsize_bulk)
	{
		outport(aport, rega_dcount);
		outport(dport, len);
	}

	outport(aport, rega_dport);
	// print packet number for comparision
	if(len != 0)
	{
		outport(dport, *buf);

		pktno1 = *buf;

#ifdef debug
		textattr(0x02);
	//	cprintf("\r\n~%04x",*buf);
		cprintf(".");//("~%04x",*buf);
		textattr(0x07);
#endif
		buf++;
	}

	for(i=2; i<len; i += 2, buf++ )
	{
		c = *buf;
#ifdef debug
/*		e = (unsigned char)c;
		d = (unsigned char)(c >> 8);
		if( ( (e==f+1) && (d==e+1) ) || (i<=4) )
		{
			cprintf("%02x%02x",e,d);
		}
		else
		{
			textattr(0x87);
			cprintf("%02x%02x",e,d);
			textattr(0x07);
		}
		f = d;
*/
#endif
		outport(dport, c);
	}

/*	if(pktno != pktno1)
	{
		key = 0;
		cprintf("press 'G' or 'g' to go");
		while(key != 'g' && key != 'G')
		{
			if(bioskey(1))
			key = (bioskey(0)&0xff);
		}// error been read
		pktno = pktno1;
	}
//      cprintf("\r\n");
	pktno ++;
*/
/* Validate Buffer */
/*	if(len < globe_variable.maxepsize_bulk)
	{
		outport(aport, rega_epctlfc);
		outport(dport, epctlfc_venp | 0xff00);
	}
*/
	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

void ISP1581_WriteISOEndpoint(UCHAR bEPIndex, unsigned short far * buf, USHORT len)
{
	USHORT  i, c, d, e;
	unsigned char key, f;
//	static unsigned short pktno=0, pktno1;
	static unsigned short pktno1;
//	static unsigned short wtogglestall=0x0008;

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	ISP1581_SetEPIndex(EPINDEX4EP07OUT);// work around for es4, write in endpoint corrupts out endpoint data
	ISP1581_SetEPIndex(bEPIndex);

	if (len < 256)
	{
		outport(aport, rega_dcount);
		outport(dport, len);
	}

	outport(aport, rega_dport);
	// print packet number for comparision
	if(len != 0)
	{
		outport(dport, *buf);
		pktno1 = *buf;
#ifdef debug
		textattr(0x02);
	//	cprintf("\r\n~%04x",*buf);
		cprintf("~%04x",*buf);
		textattr(0x07);
#endif
		buf++;
	}

	for(i=2; i<len; i += 2, buf++ )
	{
		c = *buf;
		outport(dport, c);
	}

//	if(len < 256)
//	{
//		outport(aport, rega_epctlfc);
//		outport(dport, epctlfc_venp | 0xff00);
//	}

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

UCHAR ISP1581_GetIntConfig(void)
{
	UCHAR i;
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intcfg);
	i = (unsigned char)inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();

	return i;
}

void ISP1581_SetIntConfig(unsigned char IntConfig)
{
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intcfg);
	outport(dport, IntConfig);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

USHORT ISP1581_GetIntEnableLow(void)
{
	USHORT i;
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intmask_low); // assigned interrupt register address;
	i = inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
	return i;
}

void ISP1581_SetIntEnableLow(USHORT int_vector)
{

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intmask_low); // assigned interrupt register address;
	outport(dport, int_vector);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

USHORT ISP1581_GetIntEnableHigh(void)
{
	USHORT i;
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intmask_high); // assigned interrupt register address;
	i = inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
	return i;
}

void ISP1581_SetIntEnableHigh(USHORT int_vector)
{

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_intmask_high); // assigned interrupt register address;
	outport(dport, int_vector);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

USHORT ISP1581_ReadInterruptRegisterLow(void)
{
	USHORT i = 0;
	
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_interrupt_low);
	i = inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();

	return i;
}

USHORT ISP1581_ReadInterruptRegisterHigh(void)
{
	USHORT i = 0;
	
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_interrupt_high);
	i = inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();

	return i;
}

void ISP1581_IntClearl(USHORT wIntlow)
{
	outport(aport, rega_interrupt_low);
	outport(dport, wIntlow);
}

void ISP1581_IntClearh(USHORT wInthigh)
{
	outport(aport, rega_interrupt_high);
	outport(dport, wInthigh);
}

UCHAR ISP1581_GetEndpointStatus(UCHAR bEPIndex)
{
	UCHAR c;

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	ISP1581_SetEPIndex(bEPIndex);

	outport(aport, rega_epctlfc);
	c = (unsigned char)inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();

	return c;
}

void ISP1581_SetEndpointStatus(UCHAR bEPIndex, UCHAR bStalled)
{
	UCHAR endp;

	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	// debug, setting stall;
#ifdef debug
	if(bStalled == epctlfc_stall)
	{
		debug_out(debug_code_stall);
		cprintf("\r\nWrite EPStatus, EP%02X=%x", bEPIndex,bStalled);
	}
#endif
	ISP1581_SetEPIndex(bEPIndex);

	outport(aport, rega_epctlfc);
	outport(dport, (bStalled | 0xff00));

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

void ISP1581_SetDMAConfig(USHORT wDMACnfg)
{
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_dmacfg);
	outport(dport, wDMACnfg);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

USHORT ISP1581_GetDMAConfig(void)
{
	USHORT i;
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_dmacfg);
	i = inport(dport);

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
	return i;
}

void ISP1581_SetDMAHDCfg(unsigned char dmahdcfg)
{
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_dmahdcfg);
	outport(dport, ((unsigned short)dmahdcfg | 0xff00));

	if(bISP1581flags.bits.At_IRQL1 == 0)
		LowerIRQL();
}

unsigned char ISP1581_GetDMAHDCfg(void)
{
	unsigned char i;
	if(bISP1581flags.bits.At_IRQL1 == 0)
		RaiseIRQL();

	outport(aport, rega_dmahdcfg);
	i = (unsigned char)inport(dport);