📄 readme.txt
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Offset Interrupted Stack Frame Non-Interrupt Stack Frame
0x00 1 0
0x02 d0 d2
0x06 d1 d3
0x0A d2 d4
0x0E d3 d5
0x12 d4 d6
0x16 d5 d7
0x1A d6 a2
0x1E d7 a3
0x22 a0 a4
0x26 a1 a5
0x2A a2 a6
0x2E a3 Saved SR
0x30 unused
0x32 a4 Return PC
0x36 a5
0x3A a6
0x3E Reserved 6 bytes
0x44 Interrupted SR
0x46 Interrupted PC
7. Improving Performance
The distribution version of ThreadX is built without any compiler
optimizations. This makes it easy to debug because you can trace or set
breakpoints inside of ThreadX itself. Of course, this costs some
performance. To make it run faster, you can change the BUILD_TX.BAT file to
enable all compiler optimizations. In addition, you can eliminate the
ThreadX basic API error checking by compiling your application code with the
symbol TX_DISABLE_ERROR_CHECKING defined.
8. Interrupt Handling
ThreadX provides complete and high-performance interrupt handling for 68xxx
targets. There are a certain set of requirements that are defined in the
following sub-sections:
8.1 Initial Interrupt Vectors
All ISRs (except for the highest-priority level ISRs) must have their entry
between the labels:
__tx_initialize_ISR_start:
my_example_ISR:
[your ISR processing here]
__tx_initialize_ISR_end:
This is required because a lower-priority interrupt can get interrupted
before ThreadX knows about it. Hence, it could get saved as part of an
executing thread抯 context instead of actually being processed once the
nested interrupt is finished. It is possible, however, to simply have
your front-ISR processing in this area simply lockout interrupts and jump
to the actual ISR processing somewhere else, e.g.:
my_example_ISR_1:
move.w %SR,-(%A7) ; Save SR
ori.w #$0700,%SR ; Lockout interrupts
jmp _my_ISR_processing ; Jump to actual ISR processing
8.2 Managed ISRs
Managed ISRs are ones where ThreadX is performing all of the register
saving and restoring and thread preemption if necessary. Such interrupts must
conform to the following template:
my_example_ISR_2:
move.w %SR,-(%A7) ; Save SR
ori.w #$0700,%SR ; Lockout interrupts
jsr _tx_thread_context_save ; Save current system context
; Your ISR processing here. NOTE: Only Green Hills Compiler scratch
; registers (d0,d1,a0, and a1) can be used in the assembly portion of
; your ISR. If your ISR is written in C, the compiler ensures that it
; does not corrupt any of the preserved registers. When your ISR
; completes its processing, it should return and jump to the
; ThreadX context restore function.
Jmp _tx_thread_context_restore ; This does not return!
8.3 Fast Interrupts
For high-frequency interrupts, it may be impractical to call context save
and restore on each interrupt occurrence. ThreadX supports such ISRs
providing that they do not corrupt any registers, their entrance is in the
designated ISR area, and they jump to _tx_thread_preempt_check when
finished. The following is a good example of fast ISR processing:
my_fast_ISR:
; Perform your fast, assembly language ISR processing being careful to
; save/restore any registers used. It is also assumed that this
; processing is within the ISR area mentioned before.
move.w %SR,-(%A7) ; Save SR
ori.w #$0700,%SR ; Lockout interrupts
jmp _tx_thread_preempt_check ; Check for thread preemption caused
; by higher-priority interrupts
; that might have happened during
; this processing
Of course, if the fast ISR is also the highest-priority, a simple RTE can be
used in place of the three instruction sequence to check for preemption.
9. Revision History
12/02/1999 ThreadX update of 68332/Green Hills port and new Generic Code. The
following files were changed for version G3.0f.3.0a:
TX_API.H Added tx_eh_globals field in thread control block for
thread safe libraries and added logic to bring in
the event logging constants.
TX_EL.H Added file to build for event logging constants.
TX_GHS.H Added file to build for thread-safe library support.
TX_PORT.H Changed version ID and added stack filling constant.
TX_EFS.C Added optimization for setting event flags with only
one thread suspended.
TX_EL.C Added file to build for event logging constants.
TX_GHS.C Added file to library for thread-safe C library support
and stack analysis services.
TX_ILL.ASM Added optional event logging code to track interrupts.
TX_TC.C Added thread-safe library support, optional
stack filling for debugging, and corrected a problem
associated with un-initialized thread timer blocks.
TX_TD.C Added thread-safe library support.
TX_TIMIN.ASM Added optional event logging code to track interrupts.
TX_TSB.ASM Changed initial stack pointer to guarantee long word
alignment.
TX_TS.ASM Removed pad word in solicited context restore.
TX_TSR.ASM Added pad word in solicited context frame for long
word stack alignment
TXE_TMCH.C Removed code to allow timer change calls from ISRs.
TXE_EFG.C Removed code to allow getting event flags from ISRs.
DEMO.BLD Modified demo build options.
DEMO_EL.BLD Added file for building event logging demonstration.
DEMO_EL.LNK Added file for linking event logging demonstration.
BUILD_AP.BAT Modified compiler options.
BUILD_TX.BAT Added library safe support and changed extensions of
assembly files.
BUILD_TXE.BAT Added file for event log build.
TX_*.C Added event logging to all thread state change
services and to all kernel calls.
TX*.C Changed comments and copyright header.
TX*.H Changed comments and copyright header.
TX*.ASM Changed comments, copyright header, and changed
extensions to .68 to utilize the Green Hills preprocessor
for conditional event log logic.
09/07/1999 Initial ThreadX version for 68332 using Green Hills.
Copyright(c) 1996-2000 Express Logic, Inc.
Express Logic, Inc.
11440 West Bernardo Court
Suite 366
San Diego, CA 92127
www.expresslogic.com
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