📄 delay_t0.lst
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44 =1 //
45 =1 // Take care with Dallas devices
46 =1 // - Timers default to *12* osc ticks unless CKCON is modified
47 =1 // - If using generic code on a Dallas device, use 12 here
48 =1 #define OSC_PER_INST (12)
49 =1
50 =1 //------------------------------------------------------------------
51 =1 // SHOULD NOT NEED TO EDIT THE SECTIONS BELOW
52 =1 //------------------------------------------------------------------
53 =1 typedef unsigned char tByte;
54 =1 typedef unsigned int tWord;
55 =1 typedef unsigned long tLong;
56 =1
C51 COMPILER V6.10 DELAY_T0 04/18/2001 16:48:06 PAGE 6
57 =1 // Misc #defines
58 =1 #ifndef TRUE
59 =1 #define FALSE 0
60 =1 #define TRUE (!FALSE)
61 =1 #endif
62 =1
63 =1 #define RETURN_NORMAL (bit) 0
64 =1 #define RETURN_ERROR (bit) 1
65 =1
66 =1
67 =1 //------------------------------------------------------------------
68 =1 // Interrupts
69 =1 // - see Chapter 13.
70 =1 //------------------------------------------------------------------
71 =1
72 =1 // Generic 8051/52 timer interrupts (used in most schedulers)
73 =1 #define INTERRUPT_Timer_0_Overflow 1
74 =1 #define INTERRUPT_Timer_1_Overflow 3
75 =1 #define INTERRUPT_Timer_2_Overflow 5
76 =1
77 =1 // Additional interrupts (used in shared-clock schedulers)
78 =1 #define INTERRUPT_EXTERNAL_0 0
79 =1 #define INTERRUPT_EXTERNAL_1 2
80 =1 #define INTERRUPT_UART_Rx_Tx 4
81 =1 #define INTERRUPT_CAN_c515c 17
82 =1
83 =1 //------------------------------------------------------------------
84 =1 // Error codes
85 =1 // - see Chapter 14.
86 =1 //------------------------------------------------------------------
87 =1
88 =1 #define ERROR_SCH_TOO_MANY_TASKS (1)
89 =1 #define ERROR_SCH_CANNOT_DELETE_TASK (2)
90 =1
91 =1 #define ERROR_SCH_WAITING_FOR_SLAVE_TO_ACK (3)
92 =1 #define ERROR_SCH_WAITING_FOR_START_COMMAND_FROM_MASTER (3)
93 =1
94 =1 #define ERROR_SCH_ONE_OR_MORE_SLAVES_DID_NOT_START (4)
95 =1 #define ERROR_SCH_LOST_SLAVE (5)
96 =1
97 =1 #define ERROR_SCH_CAN_BUS_ERROR (6)
98 =1
99 =1 #define ERROR_I2C_WRITE_BYTE (10)
100 =1 #define ERROR_I2C_READ_BYTE (11)
101 =1 #define ERROR_I2C_WRITE_BYTE_AT24C64 (12)
102 =1 #define ERROR_I2C_READ_BYTE_AT24C64 (13)
103 =1 #define ERROR_I2C_DS1621 (14)
104 =1
105 =1 #define ERROR_USART_TI (21)
106 =1 #define ERROR_USART_WRITE_CHAR (22)
107 =1
108 =1 #define ERROR_SPI_EXCHANGE_BYTES_TIMEOUT (31)
109 =1 #define ERROR_SPI_X25_TIMEOUT (32)
110 =1 #define ERROR_SPI_MAX1110_TIMEOUT (33)
111 =1
112 =1 #define ERROR_ADC_MAX150_TIMEOUT (44)
113 =1
114 =1 #endif
115 =1
116 =1 /*------------------------------------------------------------------*-
117 =1 ---- END OF FILE -------------------------------------------------
118 =1 -*------------------------------------------------------------------*/
C51 COMPILER V6.10 DELAY_T0 04/18/2001 16:48:06 PAGE 7
25
26 // ------ Private constants ----------------------------------------
27
28 // Timer preload values for use in simple (hardware) delays
29 // - Timers are 16-bit, manual reload ('one shot').
30 //
31 // NOTE: These values are portable but timings are *approximate*
32 // and *must* be checked by hand if accurate timing is required.
33 //
34 // Define Timer 0 / Timer 1 reload values for ~1 msec delay
35 // NOTE: Adjustment made to allow for function call overheard etc.
36 #define PRELOAD01 (65536 - (tWord)(OSC_FREQ / (OSC_PER_INST * 1063)))
37 #define PRELOAD01H (PRELOAD01 / 256)
38 #define PRELOAD01L (PRELOAD01 % 256)
39
40 /*------------------------------------------------------------------*-
41
42 Hardware_Delay_T0()
43
44 Function to generate N millisecond delay (approx).
45
46 Uses Timer 0 (easily adapted to Timer 1).
47
48 -*------------------------------------------------------------------*/
49 void Hardware_Delay_T0(const tWord N)
50 {
51 1 tWord ms;
52 1
53 1 // Configure Timer 0 as a 16-bit timer
54 1 TMOD &= 0xF0; // Clear all T0 bits (T1 left unchanged)
55 1 TMOD |= 0x01; // Set required T0 bits (T1 left unchanged)
56 1
57 1 ET0 = 0; // No interupts
58 1
59 1 // Delay value is *approximately* 1 ms per loop
60 1 for (ms = 0; ms < N; ms++)
61 1 {
62 2 TH0 = PRELOAD01H;
63 2 TL0 = PRELOAD01L;
64 2
65 2 TF0 = 0; // clear overflow flag
66 2 TR0 = 1; // start timer 0
67 2
68 2 while (TF0 == 0); // Loop until Timer 0 overflows (TF0 == 1)
69 2
70 2 TR0 = 0; // Stop Timer 0
71 2 }
72 1 }
73
74 /*------------------------------------------------------------------*-
75 ---- END OF FILE -------------------------------------------------
76 -*------------------------------------------------------------------*/
C51 COMPILER V6.10 DELAY_T0 04/18/2001 16:48:06 PAGE 8
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION _Hardware_Delay_T0 (BEGIN)
;---- Variable 'N' assigned to Register 'R6/R7' ----
; SOURCE LINE # 49
; SOURCE LINE # 50
; SOURCE LINE # 54
0000 5389F0 ANL TMOD,#0F0H
; SOURCE LINE # 55
0003 438901 ORL TMOD,#01H
; SOURCE LINE # 57
0006 C2A9 CLR ET0
; SOURCE LINE # 60
;---- Variable 'ms' assigned to Register 'R4/R5' ----
0008 E4 CLR A
0009 FD MOV R5,A
000A FC MOV R4,A
000B ?C0001:
000B C3 CLR C
000C ED MOV A,R5
000D 9F SUBB A,R7
000E EC MOV A,R4
000F 9E SUBB A,R6
0010 5016 JNC ?C0006
; SOURCE LINE # 61
; SOURCE LINE # 62
0012 758CFC MOV TH0,#0FCH
; SOURCE LINE # 63
0015 758A54 MOV TL0,#054H
; SOURCE LINE # 65
0018 C28D CLR TF0
; SOURCE LINE # 66
001A D28C SETB TR0
001C ?C0004:
; SOURCE LINE # 68
001C 308DFD JNB TF0,?C0004
001F ?C0005:
; SOURCE LINE # 70
001F C28C CLR TR0
; SOURCE LINE # 71
0021 0D INC R5
0022 BD0001 CJNE R5,#00H,?C0007
0025 0C INC R4
0026 ?C0007:
0026 80E3 SJMP ?C0001
; SOURCE LINE # 72
0028 ?C0006:
0028 22 RET
; FUNCTION _Hardware_Delay_T0 (END)
C51 COMPILER V6.10 DELAY_T0 04/18/2001 16:48:06 PAGE 9
NAME CLASS MSPACE TYPE OFFSET SIZE
==== ===== ====== ==== ====== ====
AC . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D6H 1
T0 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B4H 1
T1 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B5H 1
EA . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AFH 1
T2 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0090H 1
tLong. . . . . . . . . . . . . . . . . TYPEDEF ----- U_LONG ----- 4
tByte. . . . . . . . . . . . . . . . . TYPEDEF ----- U_CHAR ----- 1
P0_0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0080H 1
P1_0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0090H 1
P0_1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0081H 1
FL . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D1H 1
P2_0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A0H 1
P1_1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0091H 1
P0_2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0082H 1
tWord. . . . . . . . . . . . . . . . . TYPEDEF ----- U_INT ----- 2
P3_0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B0H 1
P2_1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A1H 1
P1_2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0092H 1
P0_3 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0083H 1
P3_1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B1H 1
P2_2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A2H 1
P1_3 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0093H 1
P0_4 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0084H 1
P3_2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B2H 1
P2_3 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A3H 1
P1_4 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0094H 1
P0_5 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0085H 1
EXF2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CEH 1
RD . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B7H 1
P3_3 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B3H 1
P2_4 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A4H 1
P1_5 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0095H 1
P0_6 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0086H 1
P3_4 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B4H 1
P2_5 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A5H 1
P1_6 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0096H 1
P0_7 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0087H 1
P3_5 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B5H 1
ES . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ACH 1
P2_6 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A6H 1
P1_7 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0097H 1
P3_6 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B6H 1
P2_7 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A7H 1
P3_7 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B7H 1
RI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0098H 1
CY . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D7H 1
INT0 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B2H 1
INT1 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B3H 1
TI . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0099H 1
PS . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BCH 1
T2EX . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0091H 1
OV . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D2H 1
C_T2 . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00C9H 1
WR . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B6H 1
RCLK . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CDH 1
TCLK . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CCH 1
TMOD . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0089H 1
C51 COMPILER V6.10 DELAY_T0 04/18/2001 16:48:06 PAGE 10
NAME CLASS MSPACE TYPE OFFSET SIZE
==== ===== ====== ==== ====== ====
IE0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0089H 1
IE1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008BH 1
CP_RL2 . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00C8H 1
ET0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A9H 1
_Hardware_Delay_T0 . . . . . . . . . . PUBLIC CODE PROC 0000H -----
N. . . . . . . . . . . . . . . . . . * REG * DATA U_INT 0006H 2
ms . . . . . . . . . . . . . . . . . * REG * DATA U_INT 0004H 2
ET1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ABH 1
TF0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008DH 1
ET2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00ADH 1
TF1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008FH 1
TF2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CFH 1
RB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009AH 1
TH0. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008CH 1
EX0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00A8H 1
IT0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 0088H 1
EX1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00AAH 1
TB8. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009BH 1
IT1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008AH 1
P. . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D0H 1
SM0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009FH 1
TL0. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 008AH 1
SM1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009EH 1
SM2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009DH 1
PT0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B9H 1
RS0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D3H 1
PT1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BBH 1
RS1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D4H 1
PT2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BDH 1
TR0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008CH 1
TR1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 008EH 1
TR2. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CAH 1
PX0. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B8H 1
PX1. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00BAH 1
EXEN2. . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00CBH 1
REN. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 009CH 1
RXD. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B0H 1
TXD. . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00B1H 1
F0 . . . . . . . . . . . . . . . . . . ABSBIT ----- BIT 00D5H 1
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 41 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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