pci_test.c

本程序是在Ti的dm642上通过PCI和主机通信的测试程序

            pMemBuf[i] = Taddr+i;

        // The count must be in complete UINT32.
        PCI64_MemWrite32( hPci, (UINT32)Taddr,
                                (UINT32)SDRAM_LENGTH_SMALL/sizeof(UINT32),
                                (UINT32*)pMemBuf );


        ZeroMemory( pMemBuf, SDRAM_LENGTH_SMALL+10 );

        PCI64_MemRead32( hPci, (UINT32)Taddr,
                               (UINT32)SDRAM_LENGTH_SMALL/sizeof(UINT32),
                               (UINT32*)pMemBuf );

        for(i=0;i<SDRAM_LENGTH_SMALL/sizeof(UINT32); i++ )
            if( pMemBuf[i] != Taddr+i )
                Error++;

        if( Error )
            printf("Failed data increment test, base addr 0x%08lx\n",Taddr);

        Taddr += SDRAM_LENGTH_SMALL;
    }
    printf("\n");
    if( pMemBuf != NULL )
        free( pMemBuf );

    return( Error );

}

/*F***************************************************************************
* NAME:  AssertDspReset()
*
* DESCRIPTION:  Put DSP in reset via the WARMREST bit.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32
AssertDspReset( PCI64_HANDLE hPci )
{
    UINT32 RegHdcr;
    INT32  Error;

    Error = PCI64_RegRead32( hPci,PCI64_HDCR,1,&RegHdcr );
    if( Error )
        return( Error );

    RegHdcr |= HDCR_WARMRESET;

    Error = PCI64_RegWrite32( hPci,PCI64_HDCR,1,&RegHdcr );
    
    Sleep(2);

    return( Error );
}
/*F***************************************************************************
* NAME: AssertDspInt() 
*
* DESCRIPTION:  Generate DSPINT.  If DSP is in reset then this will release
*               reset and start code exection from address 0x00000000.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32 
AssertDspInt( PCI64_HANDLE hPci )
{
    UINT32 RegHdcr;
    INT32  Error;

    Error = PCI64_RegRead32( hPci,PCI64_HDCR,1,&RegHdcr );
    if( Error )
        return( Error );

    RegHdcr |= HDCR_DSPINT;

    Error = PCI64_RegWrite32( hPci,PCI64_HDCR,1,&RegHdcr );
    
    return( Error );
}
/*F***************************************************************************
* NAME: IsPciBootMode 
*
* DESCRIPTION:  Tests for PCI boot mode.  If not in PCI boot mode then
*               should NOT attempt doing PCI boot.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    1 - PCI Boot mode enabled
*    0 - PCI Boot mode disabled
*
*F***************************************************************************/
INT32
IsPciBootMode( PCI64_HANDLE hPci )
{
    UINT32 RegHdcr = 0;

    PCI64_RegRead32( hPci,PCI64_HDCR,1,&RegHdcr );
    return( ( RegHdcr & HDCR_PCIBOOT ) ? 1:0 );
}

/*F***************************************************************************
* NAME:  EmifInit()
*
* DESCRIPTION:  Init the EMIF.  Just handles EMIF-A.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32 EmifInit( PCI64_HANDLE hPci )
{

    UINT32 EmifA[12] = { 0x00092078UL,        // GCTL     - 0x01800000
                         0xF3A88E02UL,        // CE1      - 0x01800004
                         0xFFFFFFDEUL,        // CE0      - 0x01800008
                         // Address split 3
                         0x22a28a22UL,        // CE2      - 0x01800010
                         0x22a28a42UL,        // CE3      - 0x01800014
                         0x57115000UL,        // SDRAMCTL - 0x01800018
                         0x0000081bUL,        // SDRAMTIM - 0x0180001c
                         0x000a8529UL,        // SDRAMEXT - 0x01800020
                         // Address split 9
                         0x00000002UL,        // CE1ECCTL - 0x01800044
                         0x00000002UL,        // CE0ECCTL - 0x01800048
                         // Address split 
                         0x00000002UL,        // CE2ECCTL - 0x01800050
                         0x00000073UL,        // CE3ECCTL - 0x01800054
                        };

    PCI64_RegWrite32( hPci, 0x01800000UL, 3, &EmifA[0]  );
    PCI64_RegWrite32( hPci, 0x01800010UL, 5, &EmifA[3]  );
    PCI64_RegWrite32( hPci, 0x01800048UL, 2, &EmifA[8]  );
    PCI64_RegWrite32( hPci, 0x01800050UL, 2, &EmifA[10] );
    return(0);
}

/*F***************************************************************************
* NAME:  PrintEEPROM( PCI64_HANDLE hPci )
*
* DESCRIPTION:  Sliding data test.  Tests walking 1/0 accross the data bus.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32
PrintEEPROM( PCI64_HANDLE hPci )
{
	INT32      Error = 0;
	UINT32     Value = 1;

    INT32      Delay;

    UINT32     EECntl;
    UINT32     EEAddress;
    UINT32     EEData;

    INT32      NumToRead;

    NumToRead = sizeof( PCI64_EEPROM_CONFIG )/sizeof(UINT32);
    EEAddress   = 0;

    PCI64_RegRead32( hPci,PCI64_EECTL,1,&EECntl );
    EECntl = (EECntl >> 3 ) &7;

    if( EECntl == 0 )
    {
        printf("No EEPROM present\n");
        return(0);
    }

    while( NumToRead-- )
    {
        // Write the address
        PCI64_RegWrite32( hPci,PCI64_EEADD,1,&EEAddress );

        // Write the "read" command
        EECntl    = 2;
        PCI64_RegWrite32( hPci,PCI64_EECTL,1,&EECntl );
        
        // Wait for "READY"
        Delay = 1000;
        do
        {
            PCI64_RegRead32( hPci,PCI64_EECTL,1,&EECntl );
            if( EECntl & 4 )
                break;
        }while( Delay-- );

        if( Delay > 0 )
        {
          PCI64_RegRead32( hPci,PCI64_EEDAT,1,&EEData );  
          printf("EEAddress = 0x%04x, EEData = 0x%04x\n",EEAddress, EEData );
        }
        EEAddress++;
    }
    return(0);

}

/*F***************************************************************************
* NAME:  TestIsrLoopBack( PCI64_HANDLE hPci )
*
* DESCRIPTION:  Test PCI interrupts from DSP to host.
*         
* PARMETERS:
*
* NOTES: We are generating PINTA by writing to the DSP INTREQ and
*        INTRST bits from the PCI side.  This is cheating but allows
*        us to test for presence of PINTA pin without running DSP
*        test code.
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32 
TestIsrLoopBack( PCI64_HANDLE hPci )
{
    PCI64_INTR_CNTL IntCntl;
    UINT32          Hsr;
    UINT32          Rstsrc;
    INT32           Error    = 0;
    INT32           IntLoop  = 10;
    INT32           IntCount = 0;
    INT32           Timeout  = 1000;
    
    PCI64_RegRead32( hPci,PCI64_RSTSRC,
                             sizeof(PCI64_INTR_CNTL)/sizeof(UINT32),
                             (UINT32*)&IntCntl );

 
    PCI64_RegRead32( hPci,PCI64_HSR,1,&Hsr );

    printf("HSR    = 0x%08lx\n",Hsr );
    printf("RSTSRC = 0x%08lx\n",IntCntl.Rstsrc );
    printf("PMDCSR = 0x%08lx\n",IntCntl.Pmdcsr );
    printf("PCIIS  = 0x%08lx\n",IntCntl.Pciis  );
    printf("PCIIEN = 0x%08lx\n",IntCntl.Pciien );


    // Clear any pending interrupt
    Hsr |= HSR_INTSRC;
    PCI64_RegWrite32( hPci,PCI64_HSR,1,&Hsr );


    // Enable PINTA
    Hsr &= ~HSR_INTAM;
    PCI64_RegWrite32( hPci,PCI64_HSR,1,&Hsr );

    // Clear any pending interrupt sources
    PCI64_RegWrite32( hPci,PCI64_PCIIS,1,&IntCntl.Pciis );


    // Generate a PINTA from the host side
    Rstsrc = IntCntl.Rstsrc;

    Rstsrc |= RSTSRC_INTREQ;

    do
    {

        Timeout = 1000;

        Rstsrc =  RSTSRC_INTREQ;
        Error = PCI64_RegWrite32( hPci,PCI64_RSTSRC,1,&Rstsrc );

        Rstsrc = RSTSRC_INTRST;
        PCI64_RegWrite32( hPci,PCI64_RSTSRC,1,&Rstsrc );

        while( gIntsSeen == IntCount )
        {        
            Sleep(1);
            if( --Timeout == 0 )
                break;
        }

        IntCount++;

        //
        if( Hsr & HSR_INTSRC )
        {
            Hsr |= HSR_INTSRC;
            PCI64_RegWrite32( hPci,PCI64_HSR,1,&Hsr );
        }

    }while( (gIntsSeen < IntLoop) && (Timeout != 0) );

    if( gIntsSeen < IntCount )
    {
        printf("Inerrrupts fail.  Did not see enough\n");
        Error = -1;
    }

    // Disable PINTA and clear outstanding bit
    Hsr = HSR_INTAM | HSR_INTSRC;
    PCI64_RegWrite32( hPci,PCI64_HSR,1,&Hsr );

    return( Error );

}


/*F***************************************************************************
* NAME: main()
*
* DESCRIPTION:  Sample test code.
*         
* PARMETERS:
*
* NOTES: 
*
* RETURN VALUE:
*    0 Success, non-0 for Fail
*
*F***************************************************************************/
int main(int argc, char *argv[])
{
	INT32        Error;
	PCI64_HANDLE MyPci;
    UINT32       FillPattern = 0UL;


    // Open connection to SI6XWDM driver
    printf("Open DM642 PCI channel\n");

	Error = PCI64_Open( 0, &MyPci );
	if( Error )
		goto EXIT_main;

    // If not in PCI boot mode then exit
    if( !IsPciBootMode( MyPci ) )
    {
        printf("Not in PCI boot mode. Skipping test\n");
        goto EXIT_main;
    }

    // Put the DSP in reset to begin the boot mode process
    printf("Assert DSP reset\n");
    Error = AssertDspReset( MyPci );
    if( Error )
        goto EXIT_main;

    // Setup EMIF so we can get to off-chip memory
    printf("Setup DSP EMIF\n");
    EmifInit( MyPci );

    // Get the callback event handle
    Error = 0;
    hCallbackEvent = PCI64_GetCallbackEvent( MyPci );
    if( hCallbackEvent != NULL )
        Error = PCI64_SetupCallbackEvent( MyPci, (void *)Callback);
    else
        Error = -1;

    if( Error )
    {
        printf("Callback event setup failed\n");
        Error = 0;
    }


    // Test the internal SRAM
    printf("Test DSP Internal SRAM\n");
    Error = TestIram( MyPci );


    // Test the external SDRAM
    printf("Test SDRAM \n");
    Error = TestSdram( MyPci );
    if( Error )
        goto EXIT_main;

    // Fill the memory with pattern before loading.  Not required
    // just included for testing.
    PCI64_MemFill32( MyPci, (UINT32)IRAM_BASE,
                            (UINT32)IRAM_LENGTH/sizeof(UINT32),
                                    &FillPattern );

    PrintEEPROM( MyPci );

    // If there is a coff file to load. Load and start execution
    if( argc > 1 )
    {
        printf("Load %s\n",argv[1]);

        Error = PCI64_LoadCoff( MyPci, argv[1] );

        if( Error )
            goto EXIT_main;

        printf("Release DSP from reset\n");
        AssertDspInt( MyPci );
        
        // Let the test code run for 3 seconds before moving on
        Sleep(3000);
    }

   
    printf("Check PCI PINTA signal\n");
    TestIsrLoopBack( MyPci );

EXIT_main:
    // Always close the PCI connection on exit.
    printf("Close DM642 PCI channel\n");
	PCI64_Close( MyPci );
}