📄 pci_test.c
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/*H***************************************************************************
*
* $Archive:: $
* $Revision:: $
* $Date:: $
* $Author:: $
*
* DESCRIPTION:
*
* GLOBALS
*
* PUBLIC FUNCTIONS:
*
* PRIVATE FUNCTIONS:
* USAGE/LIMITATIONS:
*
* NOTES:
*
* (C) Copyright 2003 by Spectrum Digital Incorporated
* All rights reserved
*
*H***************************************************************************/
#define pci_test_c
/*---- compilation control switches ----------------------------------------*/
/*****************************************************************************
* INCLUDE FILES
*****************************************************************************/
/*---- system and platform files -------------------------------------------*/
#ifdef _WIN32
#if (_MSC_VER >= 900 )
#define WIN32_LEAN_AND_MEAN 1
#define INC_OLE2
#define NOSERVICE
#endif
#include <windows.h>
#include <stdio.h>
#endif
#include "sd_pci64.h"
/*---- program files -------------------------------------------------------*/
/*****************************************************************************
* EXTERNAL REFERENCE
*****************************************************************************/
/*---- data declarations ---------------------------------------------------*/
#define IRAM_BASE 0x00000000UL
#define IRAM_LENGTH 0x00040000UL
#define IRAM_ADDR_BITS 16
#define SDRAM_BASE 0x80000000UL
#define SDRAM_LENGTH_SMALL 0x00100000UL
#define SDRAM_LENGTH_FULL 0x02000000UL
#define SDRAM_ADDR_BITS 24
#define PCI64_RSTSRC 0x01C00000UL
#define PCI64_PMDCSR 0x01C00004UL // Not used on C64xx
#define PCI64_PCIIS 0x01C00008UL
#define PCI64_PCIIEN 0x01C0000CUL
#define PCI64_DSPMA 0x01C00010UL
#define PCI64_PCIMA 0x01C00014UL
#define PCI64_PCIMC 0x01C00018UL
#define PCI64_CDSPA 0x01C0001CUL
#define PCI64_CPCIA 0x01C00020UL
#define PCI64_CCNT 0x01C00024UL
#define PCI64_HALT 0x01C00028UL // Not used on C64xx
#define PCI64_EEADD 0x01C20000UL
#define PCI64_EEDAT 0x01C20004UL
#define PCI64_EECTL 0x01C20008UL
#define PCI64_HSR 0x01C1FFF0UL
#define PCI64_HDCR 0x01C1FFF4UL
#define PCI64_DSPP 0x01C1FFF8UL
#define HSR_INTSRC 0x00000001UL
#define HSR_INTAVAL 0x00000002UL
#define HSR_INTAM 0x00000004UL
#define HSR_CFGERR 0x00000008UL
#define HSR_EEREAD 0x00000010UL
#define HDCR_WARMRESET 0x00000001UL
#define HDCR_DSPINT 0x00000002UL
#define HDCR_PCIBOOT 0x00000004UL
#define PCIIS_PWRMGMT 0x00000001UL
#define PCIIS_PCITARGET 0x00000002UL
#define PCIIS_PCIMASTER 0x00000004UL
#define PCIIS_HOSTSW 0x00000008UL
#define PCIIS_PWRLH 0x00000010UL
#define PCIIS_PWRHL 0x00000020UL
#define PCIIS_MASTEROK 0x00000040UL
#define PCIIS_CFGDONE 0x00000080UL
#define PCIIS_CFGERR 0x00000100UL
#define PCIIS_EERDY 0x00000200UL
#define PCIIS_PRSTN 0x00000800UL
#define PCIIS_DMAHALTED 0x00001000UL
#define PCIIEN_PWRMGMT 0x00000001UL
#define PCIIEN_PCITARGET 0x00000002UL
#define PCIIEN_PCIMASTER 0x00000004UL
#define PCIIEN_HOSTSW 0x00000008UL
#define PCIIEN_PWRLH 0x00000010UL
#define PCIIEN_PWRHL 0x00000020UL
#define PCIIEN_MASTEROK 0x00000040UL
#define PCIIEN_CFGDONE 0x00000080UL
#define PCIIEN_CFGERR 0x00000100UL
#define PCIIEN_EERDY 0x00000200UL
#define PCIIEN_PRSTN 0x00000800UL
#define RSTSRC_RSTN 0x00000001UL
#define RSTSRC_PRSTN 0x00000002UL
#define RSTSRC_WARMRST 0x00000004UL
#define RSTSRC_INTREQ 0x00000008UL
#define RSTSRC_INTRST 0x00000010UL
#define RSTSRC_CFGDONE 0x00000020UL
#define RSTSRC_CFGERR 0x00000040UL
/*---- function prototypes -------------------------------------------------*/
/*****************************************************************************
* PUBLIC DECLARATIONS
*****************************************************************************/
/*---- data declarations ---------------------------------------------------*/
typedef struct pci_eeprom_config
{
UINT32 VendorId; //0
UINT32 DeviceId; //1
UINT32 ClassCode_RevisionId; //2
UINT32 ClassCode; //3
UINT32 SubSystemVendorId; //4
UINT32 SubSystemId; //5
UINT32 MaxLatency_MinGrant; //6
UINT32 PCD1_PCD0; //7
UINT32 PCD3_PCD2; //8
UINT32 PDD1_PDD0; //9
UINT32 PDD3_PDD2; //A
UINT32 DataScale; //B
UINT32 Pmc; //C
UINT32 CheckSum; //D
} PCI64_EEPROM_CONFIG;
typedef struct pci_intr_cntl
{
UINT32 Rstsrc;
UINT32 Pmdcsr;
UINT32 Pciis;
UINT32 Pciien;
} PCI64_INTR_CNTL;
/*****************************************************************************
* PRIVATE DECLARATIONS
*****************************************************************************/
/*---- context -------------------------------------------------------------*/
/*---- data declarations ---------------------------------------------------*/
HANDLE hCallbackEvent = NULL;
volatile int gIntsSeen = 0;
/*---- function prototypes -------------------------------------------------*/
/*---- macros --------------------------------------------------------------*/
/*****************************************************************************
* PUBLIC FUNCTION DEFINITIONS
*****************************************************************************/
DWORD WINAPI Callback(LPVOID dummy)
{
if( hCallbackEvent == NULL )
return(-1);
while(1)
{
if(WaitForSingleObject(hCallbackEvent, INFINITE))
printf
(
"\nWaiting for interrupt on Event 0x%x\n",
hCallbackEvent
);
else
printf("\nInterrupt # %d has been generated\n", ++gIntsSeen);
}
return 0;
}
/*F***************************************************************************
* NAME: MEM_SlidingData32()
*
* DESCRIPTION: Sliding data test. Tests walking 1/0 accross the data bus.
*
* PARMETERS:
*
* NOTES:
*
* RETURN VALUE:
* 0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32
MEM_SlidingData32( PCI64_HANDLE hPci, UINT32 Addr, UINT32 Pattern, UINT32 Count )
{
INT32 Error = 0;
UINT32 Value = 1;
UINT32 MemPattern[2];
UINT32 i;
for( i=0; i<Count; i++ )
{
if( Pattern )
{ // Test for sliding 1
MemPattern[0] = Value;
MemPattern[1] = ~Value;
Error = PCI64_MemWrite32( hPci, Addr,
2,
MemPattern );
if( Error )
goto EXIT_MEM_SlidingData32;
Error = PCI64_MemRead32( hPci, Addr,
2,
MemPattern );
if( MemPattern[0] != Value )
Error++;
}
else
{ // Test for sliding 0
MemPattern[0] = ~Value;
MemPattern[1] = Value;
Error = PCI64_MemWrite32( hPci, Addr,
2,
MemPattern );
if( Error )
goto EXIT_MEM_SlidingData32;
Error = PCI64_MemRead32( hPci, Addr,
2,
MemPattern );
if( MemPattern[0] != ~Value )
Error++;
}
Value = Value << 1;
}
EXIT_MEM_SlidingData32:
return( Error );
}
/*F***************************************************************************
* NAME: MEM_SlidingAddr32()
*
* DESCRIPTION: Sliding address test. Slides 1 accross the address bus.
*
* PARMETERS:
*
* NOTES:
*
* RETURN VALUE:
* 0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32
MEM_SlidingAddr32( PCI64_HANDLE hPci,UINT32 DramAddr, UINT32 Count )
{
UINT32 TestAddr;
UINT32 BckgndAddr;
UINT32 TestPattern,NotTestPattern,ReadPattern;
UINT32 i;
UINT32 j;
INT32 Error;
// The address bit must be on an 4 byte boundary for this test.
// We want to have only 1 address bit change and all bytes
// strobes in a word.
TestPattern = 0x87654321;
Error = 0;
for( i=0; i<Count; i++ )
{
TestAddr = DramAddr + (4<<i);
// Write the test pattern
PCI64_MemWrite32( hPci, TestAddr,1,&TestPattern );
// Now write to all the other address bits with compliment data
// to test for disturbance.
for( j=0; j<Count; j++ )
{
BckgndAddr = DramAddr + (4<<j);
if( TestAddr != BckgndAddr )
{
NotTestPattern = ~TestPattern+i;
PCI64_MemWrite32( hPci, BckgndAddr,1,&NotTestPattern );
}
}
PCI64_MemRead32( hPci, TestAddr,1,&ReadPattern );
if( ReadPattern != TestPattern )
Error++;
}
return( Error );
}
/*F***************************************************************************
* NAME: TestIram()
*
* DESCRIPTION: Test on-chip SRAM.
*
* PARMETERS:
*
* NOTES:
*
* RETURN VALUE:
* 0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32 TestIram( PCI64_HANDLE hPci )
{
UINT32 * pMemBuf = NULL;
UINT32 i;
INT32 Error = 0;
Error = MEM_SlidingData32( hPci, IRAM_BASE, 1, 32 );
if( Error )
printf("Failed sliding data test 1\n");
Error = MEM_SlidingData32( hPci, IRAM_BASE, 0, 32 );
if( Error )
printf("Failed sliding data test 0\n");
Error = MEM_SlidingAddr32( hPci, IRAM_BASE, IRAM_ADDR_BITS );
if( Error )
printf("Failed sliding address test\n");
pMemBuf = (UINT32 *)malloc(IRAM_LENGTH+10);
if( pMemBuf == NULL )
return( -1 );
for(i=0;i<IRAM_LENGTH/sizeof(UINT32); i++ )
pMemBuf[i] = i;
// The count must be in complete UINT32.
PCI64_MemWrite32( hPci, (UINT32)IRAM_BASE,
(UINT32)IRAM_LENGTH/sizeof(UINT32),
(UINT32*)pMemBuf );
ZeroMemory( pMemBuf, IRAM_LENGTH+10 );
PCI64_MemRead32( hPci, (UINT32)IRAM_BASE,
(UINT32)IRAM_LENGTH/sizeof(UINT32),
(UINT32*)pMemBuf );
for(i=0;i<IRAM_LENGTH/sizeof(UINT32); i++ )
if( pMemBuf[i] != i )
Error++;
if( Error )
printf("Failed data increment test\n");
if( pMemBuf != NULL )
free( pMemBuf );
return( Error );
}
/*F***************************************************************************
* NAME: TestSdram()
*
* DESCRIPTION: Test off-chip SDRAM
*
* PARMETERS:
*
* NOTES:
*
* RETURN VALUE:
* 0 Success, non-0 for Fail
*
*F***************************************************************************/
INT32 TestSdram( PCI64_HANDLE hPci )
{
UINT32 * pMemBuf = NULL;
UINT32 i;
INT32 Error = 0;
UINT32 Taddr;
Error = MEM_SlidingData32( hPci, SDRAM_BASE, 1, 32 );
if( Error )
printf("Failed sliding data test 1\n");
Error = MEM_SlidingData32( hPci, SDRAM_BASE, 0, 32 );
if( Error )
printf("Failed sliding data test 0\n");
Error = MEM_SlidingAddr32( hPci, SDRAM_BASE, SDRAM_ADDR_BITS );
if( Error )
printf("Failed sliding address test\n");
pMemBuf = (UINT32 *)malloc(SDRAM_LENGTH_SMALL+10);
if( pMemBuf == NULL )
return( -1 );
Taddr = SDRAM_BASE;
while( Taddr < SDRAM_BASE+SDRAM_LENGTH_FULL )
{
printf(".");
for(i=0;i<SDRAM_LENGTH_SMALL/sizeof(UINT32); i++ )
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