randn.fit.qmsg

随机序列发生器,是一个m序列,生成函数都写在里面,位宽为4,可以改变!

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jul 19 10:33:41 2006 " "Info: Processing started: Wed Jul 19 10:33:41 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off randn -c randn " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off randn -c randn" {  } {  } 0}
{ "Info" "IMPP_MPP_AVAILABLE_IO_STANDARD_IN_DEVICE" "EP1C3T100C6 " "Info: Auto device selection -- successful I/O standard check for EP1C3T100C6" {  } {  } 0}
{ "Info" "IMPP_MPP_AVAILABLE_PCI_IO_IN_DEVICE" "EP1C3T100C6 " "Info: Auto device selection -- successful PCI I/O clamp diode check for EP1C3T100C6" {  } {  } 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "randn EP1C3T100C6 " "Info: Automatically selected device EP1C3T100C6 for design randn" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " {  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "10 10 " "Info: No exact pin location assignment(s) for 10 pins of 10 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dout\[0\] " "Info: Pin Dout\[0\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 10 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dout\[0\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Dout[0] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Dout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dout\[1\] " "Info: Pin Dout\[1\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 10 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dout\[1\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Dout[1] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Dout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dout\[2\] " "Info: Pin Dout\[2\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 10 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dout\[2\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Dout[2] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Dout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Dout\[3\] " "Info: Pin Dout\[3\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 10 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Dout\[3\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Dout[3] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Dout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "out " "Info: Pin out not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 11 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "out" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { out } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { out } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk " "Info: Pin clk not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 8 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { clk } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { clk } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Cin\[1\] " "Info: Pin Cin\[1\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 9 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Cin\[1\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Cin[1] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Cin[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Cin\[3\] " "Info: Pin Cin\[3\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 9 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Cin\[3\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Cin[3] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Cin[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Cin\[2\] " "Info: Pin Cin\[2\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 9 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Cin\[2\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Cin[2] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Cin[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "Cin\[0\] " "Info: Pin Cin\[0\] not assigned to an exact location on the device" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 9 -1 0 } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Cin\[0\]" } } } } { "E:/altera/quartus50/randn/db/randn_cmp.qrpt" "" { Report "E:/altera/quartus50/randn/db/randn_cmp.qrpt" Compiler "randn" "UNKNOWN" "V1" "E:/altera/quartus50/randn/db/randn.quartus_db" { Floorplan "E:/altera/quartus50/randn/" "" "" { Cin[0] } "NODE_NAME" } "" } } { "E:/altera/quartus50/randn/randn.fld" "" { Floorplan "E:/altera/quartus50/randn/randn.fld" "" "" { Cin[0] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN 10 " "Info: Automatically promoted signal \"clk\" to use Global clock in PIN 10" {  } { { "randn.v" "" { Text "E:/altera/quartus50/randn/randn.v" 8 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}