smbus_master_f30x.c

c8051f的IIC读取eeprom,有很好的程序结构

//------------------------------------------------------------------------------------
//
// Copyright 2003 Cygnal Integrated Products, Inc.
//
// FILE NAME      : SMBus_Master_F30x.c
// TARGET DEVICE  : C8051F300
// CREATED ON     : 1/30/02
// CREATED BY     : JS
//
// Revision 1.0  
//
// Example software to demonstrate the C8051F30x SMBus interface in Master mode.
// - Interrupt-driven SMBus implementation
// - Only master states defined (no slave or arbitration)
// - 1-byte SMBus data holders used for eac transmit and receive
// - Timer1 used as SMBus clock source
// - Timer2 used by SMBus for SCL low timeout detection
// - SCL frequency defined by <SMB_FREQUENCY> constant
// - Pinout:
//    P0.0 -> SDA (SMBus)
//    P0.1 -> SCL (SMBus)
//    P0.2 -> unused
//    P0.3 -> SW2
//    P0.4 -> unused
//    P0.5 -> unused
//    P0.6 -> unused
//    P0.7 -> C2D (debug interface)
//
//
//------------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------------
#include <c8051f300.h>                       // SFR declarations

//------------------------------------------------------------------------------------
// Global CONSTANTS
//------------------------------------------------------------------------------------

#define  SYSCLK         24500000             // System clock frequency
#define  SMB_FREQUENCY  50000                // Target SCL clock rate

#define  WRITE          0x00                 // SMBus WRITE command
#define  READ           0x01                 // SMBus READ command

// Device addresses (7 bits, lsb is a don't care)
#define  F300_SLAVE     0xF0                 // Device address for slave target

// Status vector - top 4 bits only
#define  SMB_MTSTA      0xE0                 // (MT) start transmitted
#define  SMB_MTDB       0xC0                 // (MT) data byte transmitted
#define  SMB_MRDB       0x80                 // (MR) data byte received
// End status vector definition

//-----------------------------------------------------------------------------------
// Global VARIABLES
//-----------------------------------------------------------------------------------
unsigned char SMB_DATA_IN;                   // Global holder for SMBus data
                                             // All receive data is written here

unsigned char SMB_DATA_OUT;                  // Global holder for SMBus data.
                                             // All transmit data is read from here

unsigned char TARGET;                        // Target SMBus slave address

bit SMB_BUSY;                                // Software flag to indicate when the
                                             // SMB_Read() or SMB_Write() functions
                                             // have claimed the SMBus

bit SMB_RW;                                  // Software flag to indicate the
                                             // direction of the current transfer

// 16-bit SFR declarations
sfr16    TMR2RL   = 0xca;                    // Timer2 reload registers
sfr16    TMR2     = 0xcc;                    // Timer2 counter registers

//------------------------------------------------------------------------------------
// Function PROTOTYPES
//------------------------------------------------------------------------------------

void SMBus_Init (void);
void Timer1_Init (void);
void Timer2_Init (void);
void Port_Init (void);
void SMBus_ISR (void);
void Timer2_ISR (void);
void SMB_Write (void);
void SMB_Read (void);

//------------------------------------------------------------------------------------
// MAIN Routine
//------------------------------------------------------------------------------------
//
// Main routine performs all configuration tasks, then loops forever sending and
// receiving SMBus data to the slave F300_SLAVE.
//
void main (void)
{
   unsigned char i, error;                   // Test counters

   PCA0MD &= ~0x40;                          // WDTE = 0 (watchdog timer enable bit)

   OSCICN |= 0x03;                           // Set internal oscillator to highest
                                             // setting (24500000)
   Port_Init ();                             // Initialize Crossbar and GPIO

   Timer1_Init ();                           // Configure Timer1 for use as SMBus
                                             // clock source

   Timer2_Init ();                           // Configure Timer2 for use with SMBus
                                             // low timeout detect

   SMBus_Init ();                            // Configure and enable SMBus

   EIE1 |= 1;                                // SMBus interrupt enable
   IE |= 0x20;                               // Timer2 interrupt enable
   EA = 1;                                   // Global interrupt enable


// TEST CODE--------------------------------------------------------------------------

   i = 0;                                    // Output data counter
   error = 0;                                // Error counter
   while (1)
   {
      // SMBus Write Sequence
      SMB_DATA_OUT = i++;                    // Define next outgoing byte
      TARGET = F300_SLAVE;                   // Target the F300 Slave for next
                                             // SMBus transfer
      SMB_Write();                           // Initiate SMBus write

      // SMBus Read Sequence
      TARGET = F300_SLAVE;                   // Target the F300 Slave for next
                                             // SMBus transfer
      SMB_Read();

      // Check transfer data
      if(SMB_DATA_IN != SMB_DATA_OUT)        // Received data match transmit data?
         error++;                            // Increment error counter if no match
   }

// END TEST CODE----------------------------------------------------------------------

}

//------------------------------------------------------------------------------------
// Functions
//------------------------------------------------------------------------------------

//------------------------------------------------------------------------------------
// SMB_Write ()
//------------------------------------------------------------------------------------
// Writes a single byte to the slave with address specified by the <TARGET> variable.
// Calling sequence:
// 1) Write target slave address to the <TARGET> variable
// 2) Write outgoing data to the <SMB_DATA_OUT> variable
// 3) Call SMB_Write()
//
void SMB_Write ()
{
   while (SMB_BUSY);                         // Wait for SMBus to be free.
   SMB_BUSY = 1;                             // Claim SMBus (set to busy)
   SMB_RW = 0;                               // Mark this transfer as a WRITE
   STA = 1;                                  // Start transfer
}

//------------------------------------------------------------------------------------
// SMB_Read ()
//------------------------------------------------------------------------------------
// Reads a single byte from the slave with address specified by the <TARGET> variable.
// Calling sequence:
// 1) Write target slave address to the <TARGET> variable
// 2) Call SMB_Write()
// 3) Read input data from <SMB_DATA_IN> variable
//
void SMB_Read ()
{
   while (SMB_BUSY);                         // Wait for bus to be free.
   SMB_BUSY = 1;                             // Claim SMBus (set to busy)
   SMB_RW = 1;                               // Mark this transfer as a READ

   STA = 1;                                  // Start transfer

   while (SMB_BUSY);                         // Wait for transfer to complete
}

//------------------------------------------------------------------------------------
// Initialization Routines
//------------------------------------------------------------------------------------

//------------------------------------------------------------------------------------
// SMBus_Init()