omap2420h4.c

u-boot-1.1.6 源码包

	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D9;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D10 pin configuration, PIN = V10 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D10;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D11 pin configuration, PIN = Y10 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D11;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D12 pin configuration, PIN = W10 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D12;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D13 pin configuration, PIN = R11 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D13;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D14 pin configuration, PIN = V11 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D14;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D15 pin configuration, PIN = W11 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D15;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D16 pin configuration, PIN = P12 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D16;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_D17 pin configuration, PIN = R12 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_D17;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_PCLK pin configuration,   PIN = W6   */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_PCLK;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_VSYNC pin configuration,  PIN = V7  */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_VSYNC;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_HSYNC pin configuration,  PIN = Y6  */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_HSYNC;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* LCD_ACBIAS pin configuration, PIN = W7 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_DSS_ACBIAS;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
}

/****************************************
 * Routine: muxSetupCamera  (ostboot)
 * Description: Setup camera muxing
 *****************************************/
void muxSetupCamera(void)
{
	volatile unsigned char  *MuxConfigReg;

	/* CAMERA_RSTZ  pin configuration, PIN = Y16 */
	/* CAM_RST is connected through the I2C IO expander.*/
	/* MuxConfigReg = (volatile unsigned char *), CONTROL_PADCONF_SYS_NRESWARM*/
	/* *MuxConfigReg = 0x00 ; / * Mode = 0, PUPD=Disabled   */

	/* CAMERA_XCLK  pin configuration, PIN = U3 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_XCLK;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_LCLK  pin configuration, PIN = V5 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_LCLK;
	*MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_VSYNC pin configuration, PIN = U2 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_VS,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_HSYNC pin configuration, PIN = T3 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_HS,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT0 pin configuration, PIN = T4 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D0,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT1 pin configuration, PIN = V2 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D1,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT2 pin configuration, PIN = V3 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D2,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT3 pin configuration, PIN = U4 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D3,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT4 pin configuration, PIN = W2 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D4,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT5 pin configuration, PIN = V4 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D5,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT6 pin configuration, PIN = W3 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D6,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT7 pin configuration, PIN = Y2 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D7,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT8 pin configuration, PIN = Y4 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D8,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* CAMERA_DAT9 pin configuration, PIN = V6 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_CAM_D9,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
}

/****************************************
 * Routine: muxSetupMMCSD (ostboot)
 * Description: set up MMC muxing
 *****************************************/
void muxSetupMMCSD(void)
{
	volatile unsigned char  *MuxConfigReg;

	/* SDMMC_CLKI pin configuration,  PIN = H15 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_CLKI,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_CLKO pin configuration,  PIN = G19 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_CLKO,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_CMD pin configuration,   PIN = H18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_CMD,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
	/* External pull-ups are present. */
	/* *MuxConfigReg |= 0x18 ; #/ PullUDEnable=Enabled, PullTypeSel=PU */

	/* SDMMC_DAT0 pin configuration,  PIN = F20 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT0,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
	/* External pull-ups are present. */
	/* *MuxConfigReg |= 0x18 ; #/ PullUDEnable=Enabled, PullTypeSel=PU */

	/* SDMMC_DAT1 pin configuration,  PIN = H14 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT1,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
	/* External pull-ups are present. */
	/* *MuxConfigReg |= 0x18 ; #/ PullUDEnable=Enabled, PullTypeSel=PU */

	/* SDMMC_DAT2 pin configuration,  PIN = E19 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT2,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
	/* External pull-ups are present. */
	/* *MuxConfigReg |= 0x18 ; #/ PullUDEnable=Enabled, PullTypeSel=PU */

	/* SDMMC_DAT3 pin configuration,  PIN = D19 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT3,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
	/* External pull-ups are present. */
	/* *MuxConfigReg |= 0x18 ; #/ PullUDEnable=Enabled, PullTypeSel=PU */

	/* SDMMC_DDIR0 pin configuration, PIN = F19 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT_DIR0,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_DDIR1 pin configuration, PIN = E20 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT_DIR1,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_DDIR2 pin configuration, PIN = F18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT_DIR2,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_DDIR3 pin configuration, PIN = E18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_DAT_DIR3,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SDMMC_CDIR pin configuration,  PIN = G18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MMC_CMD_DIR,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* MMC_CD pin configuration,      PIN = B3  ---2420IP ONLY---*/
	/* MMC_CD for 2422IP=K1 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SDRC_A14,
				   *MuxConfigReg = 0x03 ; /* Mode = 3, PUPD=Disabled */

	/* MMC_WP pin configuration,      PIN = B4  */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SDRC_A13,
				   *MuxConfigReg = 0x03 ; /* Mode = 3, PUPD=Disabled */
}

/******************************************
 * Routine: muxSetupTouchScreen (ostboot)
 * Description:  Set up touch screen muxing
 *******************************************/
void muxSetupTouchScreen(void)
{
	volatile unsigned char  *MuxConfigReg;

	/* SPI1_CLK pin configuration,  PIN = U18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SPI1_CLK,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SPI1_MOSI pin configuration, PIN = V20 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SPI1_SIMO,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SPI1_MISO pin configuration, PIN = T18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SPI1_SOMI,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* SPI1_nCS0 pin configuration, PIN = U19 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_SPI1_NCS0,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */

	/* PEN_IRQ pin configuration,   PIN = P20 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_MCBSP1_FSR,
				   *MuxConfigReg = 0x03 ; /* Mode = 3, PUPD=Disabled */
}

/****************************************
 * Routine: muxSetupHDQ (ostboot)
 * Description: setup 1wire mux
 *****************************************/
void muxSetupHDQ(void)
{
	volatile unsigned char  *MuxConfigReg;

	/* HDQ_SIO pin configuration,  PIN = N18 */
	MuxConfigReg = (volatile unsigned char *)CONTROL_PADCONF_HDQ_SIO,
				   *MuxConfigReg = 0x00 ; /* Mode = 0, PUPD=Disabled */
}

/***************************************************************
 * Routine: muxSetupGPMC (ostboot)
 * Description: Configures balls which cam up in protected mode
 ***************************************************************/
void muxSetupGPMC(void)
{
	volatile uint8 *MuxConfigReg;
	volatile unsigned int *MCR = (volatile unsigned int *)0x4800008C;

	/* gpmc_io_dir */
	*MCR = 0x19000000;

	/* NOR FLASH CS0 */
	/* signal - Gpmc_clk; pin - J4; offset - 0x0088; mode - 0; Byte-3	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_GPMC_D2_BYTE3,
				   *MuxConfigReg = 0x00 ;

	/* signal - Gpmc_iodir; pin - n2; offset - 0x008C; mode - 1; Byte-3	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_GPMC_NCS0_BYTE3,
				   *MuxConfigReg = 0x01 ;

	/* MPDB(Multi Port Debug Port) CS1 */
	/* signal - gpmc_ncs1; pin - N8; offset - 0x008C; mode - 0; Byte-1	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_GPMC_NCS0_BYTE1,
				   *MuxConfigReg = 0x00 ;

	/* signal - Gpmc_ncs2; pin - E2; offset - 0x008C; mode - 0; Byte-2	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_GPMC_NCS0_BYTE2,
				   *MuxConfigReg = 0x00 ;
}

/****************************************************************
 * Routine: muxSetupSDRC  (ostboot)
 * Description: Configures balls which come up in protected mode
 ****************************************************************/
void muxSetupSDRC(void)
{
	volatile uint8 *MuxConfigReg;

	/* signal - sdrc_ncs1; pin - C12; offset - 0x00A0; mode - 0; Byte-1	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_SDRC_NCS0_BYTE1,
				   *MuxConfigReg = 0x00 ;

	/* signal - sdrc_a12; pin - D11; offset - 0x0030; mode - 0; Byte-2	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_SDRC_A14_BYTE2,
				   *MuxConfigReg = 0x00 ;

	/* signal - sdrc_cke1; pin - B13; offset - 0x00A0; mode - 0; Byte-3	Pull/up - N/A */
	MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_SDRC_NCS0_BYTE3,
				   *MuxConfigReg = 0x00;

	if (get_cpu_type() == CPU_2422) {
		MuxConfigReg = (volatile uint8 *)CONTROL_PADCONF_SDRC_A14_BYTE0,
					   *MuxConfigReg = 0x1b;
	}
}

/*****************************************************************************
 * Routine: update_mux()
 * Description: Update balls which are different beween boards.  All should be
 *              updated to match functionaly.  However, I'm only updating ones
 *              which I'll be using for now.  When power comes into play they
 *              all need updating.
 *****************************************************************************/
void update_mux(u32 btype,u32 mtype)
{
	u32 cpu, base = OMAP2420_CTRL_BASE;
	cpu = get_cpu_type();

	if (btype == BOARD_H4_MENELAUS) {
		if (cpu == CPU_2420) {
			/* PIN = B3,  GPIO.0->KBR5,      mode 3,  (pun?),-DO-*/
			__raw_writeb(0x3, base+0x30);
			/* PIN = B13, GPIO.38->KBC6,     mode 3,  (pun?)-DO-*/
			__raw_writeb(0x3, base+0xa3);
			/* PIN = F1, GPIO.25->HSUSBxx    mode 3,  (for external HS USB)*/
			/* PIN = H1, GPIO.26->HSUSBxx    mode 3,  (for external HS USB)*/
			/* PIN = K1, GPMC_ncs6           mode 0,  (on board nand access)*/
			/* PIN = L2, GPMC_ncs67          mode 0,  (for external HS USB)*/
			/* PIN = M1 (HSUSBOTG) */
			/* PIN = P1, GPIO.35->MEN_POK    mode 3,  (menelaus powerok)-DO-*/
			__raw_writeb(0x3, base+0x9d);
			/* PIN = U32, (WLAN_CLKREQ) */
			/* PIN = Y11, WLAN */
			/* PIN = AA4, GPIO.15->KBC2,     mode 3,  -DO- */
			__raw_writeb(0x3, base+0xe7);
			/* PIN = AA8, mDOC */
			/* PIN = AA10, BT */
			/* PIN = AA13, WLAN */
			/* PIN = M18 GPIO.96->MMC2_WP    mode 3   -DO- */
			__raw_writeb(0x3, base+0x10e);
			/* PIN = N19 GPIO.98->WLAN_INT   mode 3   -DO- */
			__raw_writeb(0x3, base+0x110);
			/* PIN = J15 HHUSB */
			/* PIN = H19 HSUSB */
			/* PIN = W13, P13, R13, W16 ... */
			/* PIN = V12 GPIO.25->I2C_CAMEN  mode 3   -DO- */
			__raw_writeb(0x3, base+0xde);
			/* PIN = W19 sys_nirq->MENELAUS_INT mode 0 -DO- */
			__raw_writeb(0x0, base+0x12c);
			/* PIN = AA17->sys_clkreq        mode 0   -DO- */
			__raw_writeb(0x0, base+0x136);
		} else if (cpu == CPU_2422) {
			/* PIN = B3,  GPIO.0->nc,        mode 3,  set above (pun?)*/
			/* PIN = B13, GPIO.cke1->nc,     mode 0,  set above, (pun?)*/
			/* PIN = F1, GPIO.25->HSUSBxx    mode 3,  (for external HS USB)*/
			/* PIN = H1, GPIO.26->HSUSBxx    mode 3,  (for external HS USB)*/
			/* PIN = K1, GPMC_ncs6           mode 0,  (on board nand access)*/
			__raw_writeb(0x0, base+0x92);
			/* PIN = L2, GPMC_ncs67          mode 0,  (for external HS USB)*/
			/* PIN = M1 (HSUSBOTG) */
			/* PIN = P1, GPIO.35->MEN_POK    mode 3,  (menelaus powerok)-DO-*/
			__raw_writeb(0x3, base+0x10c);
			/* PIN = U32, (WLAN_CLKREQ) */
			/* PIN = AA4, GPIO.15->KBC2,     mode 3,  -DO- */
			__raw_writeb(0x3, base+0x30);
			/* PIN = AA8, mDOC */
			/* PIN = AA10, BT */
			/* PIN = AA12, WLAN */
			/* PIN = M18 GPIO.96->MMC2_WP    mode 3   -DO- */
			__raw_writeb(0x3, base+0x10e);
			/* PIN = N19 GPIO.98->WLAN_INT   mode 3   -DO- */
			__raw_writeb(0x3, base+0x110);
			/* PIN = J15 HHUSB */
			/* PIN = H19 HSUSB */
			/* PIN = W13, P13, R13, W16 ... */
			/* PIN = V12 GPIO.25->I2C_CAMEN  mode 3   -DO- */
			__raw_writeb(0x3, base+0xde);
			/* PIN = W19 sys_nirq->MENELAUS_INT mode 0 -DO- */
			__raw_writeb(0x0, base+0x12c);
			/* PIN = AA17->sys_clkreq        mode 0   -DO- */
			__raw_writeb(0x0, base+0x136);
		}

	} else if (btype == BOARD_H4_SDP) {
		if (cpu == CPU_2420) {
			/* PIN = B3,  GPIO.0->nc         mode 3,  set above (pun?)*/
			/* PIN = B13, GPIO.cke1->nc,     mode 0,  set above, (pun?)*/
			/* Pin = Y11 VLNQ */
			/* Pin = AA4 VLNQ */
			/* Pin = AA6 VLNQ */
			/* Pin = AA8 VLNQ */
			/* Pin = AA10 VLNQ */
			/* Pin = AA12 VLNQ */
			/* PIN = M18 GPIO.96->KBR5       mode 3   -DO- */
			__raw_writeb(0x3, base+0x10e);
			/* PIN = N19 GPIO.98->KBC6       mode 3   -DO- */
			__raw_writeb(0x3, base+0x110);
			/* PIN = J15 MDOC_nDMAREQ */
			/* PIN = H19 GPIO.100->KBC2      mode 3   -DO- */
			__raw_writeb(0x3, base+0x114);
			/* PIN = W13, V12, P13, R13, W19, W16 ... */
			/* PIN = AA17 sys_clkreq->bt_clk_req  mode 0  */
		} else if (cpu == CPU_2422) {
			/* PIN = B3,  GPIO.0->MMC_CD,    mode 3,  set above */
			/* PIN = B13, GPIO.38->wlan_int, mode 3,  (pun?)*/
			/* Pin = Y11 VLNQ */
			/* Pin = AA4 VLNQ */
			/* Pin = AA6 VLNQ */
			/* Pin = AA8 VLNQ */
			/* Pin = AA10 VLNQ */
			/* Pin = AA12 VLNQ */
			/* PIN = M18 GPIO.96->KBR5       mode 3   -DO- */
			__raw_writeb(0x3, base+0x10e);
			/* PIN = N19 GPIO.98->KBC6       mode 3   -DO- */
			__raw_writeb(0x3, base+0x110);
			/* PIN = J15 MDOC_nDMAREQ */
			/* PIN = H19 GPIO.100->KBC2      mode 3   -DO- */
			__raw_writeb(0x3, base+0x114);
			/* PIN = W13, V12, P13, R13, W19, W16 ... */
			/* PIN = AA17 sys_clkreq->bt_clk_req  mode 0 */
		}
	}
}

#if (CONFIG_COMMANDS & CFG_CMD_NAND)
void nand_init(void)
{
    extern flash_info_t flash_info[];

    nand_probe(CFG_NAND_ADDR);
    if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
		print_size(nand_dev_desc[0].totlen, "\n");
    }

#ifdef CFG_JFFS2_MEM_NAND
    flash_info[CFG_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
    flash_info[CFG_JFFS2_FIRST_BANK].size = 1024*1024*2;      /* only read kernel single meg partition */
	flash_info[CFG_JFFS2_FIRST_BANK].sector_count = 1024;   /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
    flash_info[CFG_JFFS2_FIRST_BANK].start[0] = 0x80200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
#endif
}
#endif