📄 tqm5200.c
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#ifdef CONFIG_POST/* * Reads GPIO pin PSC6_3. A keypress is reported, if PSC6_3 is low. If PSC6_3 * is left open, no keypress is detected. */int post_hotkeys_pressed(void){#ifdef CONFIG_STK52XX struct mpc5xxx_gpio *gpio; gpio = (struct mpc5xxx_gpio*) MPC5XXX_GPIO; /* * Configure PSC6_1 and PSC6_3 as GPIO. PSC6 then couldn't be used in * CODEC or UART mode. Consumer IrDA should still be possible. */ gpio->port_config &= ~(0x07000000); gpio->port_config |= 0x03000000; /* Enable GPIO for GPIO_IRDA_1 (IR_USB_CLK pin) = PSC6_3 */ gpio->simple_gpioe |= 0x20000000; /* Configure GPIO_IRDA_1 as input */ gpio->simple_ddr &= ~(0x20000000); return ((gpio->simple_ival & 0x20000000) ? 0 : 1);#else return 0;#endif}#endif#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)void post_word_store (ulong a){ volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); *save_addr = a;}ulong post_word_load (void){ volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); return *save_addr;}#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/#ifdef CONFIG_PS2MULT#ifdef CONFIG_BOARD_EARLY_INIT_Rint board_early_init_r (void){ ps2mult_early_init(); return (0);}#endif#endif /* CONFIG_PS2MULT */#ifdef CONFIG_FO300int silent_boot (void){ vu_long timer3_status; /* Configure GPT3 as GPIO input */ *(vu_long *)MPC5XXX_GPT3_ENABLE = 0x00000004; /* Read in TIMER_3 pin status */ timer3_status = *(vu_long *)MPC5XXX_GPT3_STATUS;#ifdef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* Force silent console mode if S1 switch * is in closed position (TIMER_3 pin status is LOW). */ if (MPC5XXX_GPT_GPIO_PIN(timer3_status) == 0) return 1;#else /* Force silent console mode if S1 switch * is in open position (TIMER_3 pin status is HIGH). */ if (MPC5XXX_GPT_GPIO_PIN(timer3_status) == 1) return 1;#endif return 0;}int board_early_init_f (void){ DECLARE_GLOBAL_DATA_PTR; if (silent_boot()) gd->flags |= GD_FLG_SILENT; return 0;}#endif /* CONFIG_FO300 */int last_stage_init (void){ /* * auto scan for really existing devices and re-set chip select * configuration. */ u16 save, tmp; int restore; /* * Check for SRAM and SRAM size */ /* save original SRAM content */ save = *(volatile u16 *)CFG_CS2_START; restore = 1; /* write test pattern to SRAM */ *(volatile u16 *)CFG_CS2_START = 0xA5A5; __asm__ volatile ("sync"); /* * Put a different pattern on the data lines: otherwise they may float * long enough to read back what we wrote. */ tmp = *(volatile u16 *)CFG_FLASH_BASE; if (tmp == 0xA5A5) puts ("!! possible error in SRAM detection\n"); if (*(volatile u16 *)CFG_CS2_START != 0xA5A5) { /* no SRAM at all, disable cs */ *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 18); *(vu_long *)MPC5XXX_CS2_START = 0x0000FFFF; *(vu_long *)MPC5XXX_CS2_STOP = 0x0000FFFF; restore = 0; __asm__ volatile ("sync"); } else if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0xA5A5) { /* make sure that we access a mirrored address */ *(volatile u16 *)CFG_CS2_START = 0x1111; __asm__ volatile ("sync"); if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0x1111) { /* SRAM size = 512 kByte */ *(vu_long *)MPC5XXX_CS2_STOP = STOP_REG(CFG_CS2_START, 0x80000); __asm__ volatile ("sync"); puts ("SRAM: 512 kB\n"); } else puts ("!! possible error in SRAM detection\n"); } else { puts ("SRAM: 1 MB\n"); } /* restore origianl SRAM content */ if (restore) { *(volatile u16 *)CFG_CS2_START = save; __asm__ volatile ("sync"); } /* * Check for Grafic Controller */ /* save origianl FB content */ save = *(volatile u16 *)CFG_CS1_START; restore = 1; /* write test pattern to FB memory */ *(volatile u16 *)CFG_CS1_START = 0xA5A5; __asm__ volatile ("sync"); /* * Put a different pattern on the data lines: otherwise they may float * long enough to read back what we wrote. */ tmp = *(volatile u16 *)CFG_FLASH_BASE; if (tmp == 0xA5A5) puts ("!! possible error in grafic controller detection\n"); if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) { /* no grafic controller at all, disable cs */ *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 17); *(vu_long *)MPC5XXX_CS1_START = 0x0000FFFF; *(vu_long *)MPC5XXX_CS1_STOP = 0x0000FFFF; restore = 0; __asm__ volatile ("sync"); } else { puts ("VGA: SMI501 (Voyager) with 8 MB\n"); } /* restore origianl FB content */ if (restore) { *(volatile u16 *)CFG_CS1_START = save; __asm__ volatile ("sync"); }#ifdef CONFIG_FO300 if (silent_boot()) { setenv("bootdelay", "0"); disable_ctrlc(1); }#endif return 0;}#ifdef CONFIG_VIDEO_SM501#ifdef CONFIG_FO300#define DISPLAY_WIDTH 800#else#define DISPLAY_WIDTH 640#endif#define DISPLAY_HEIGHT 480#ifdef CONFIG_VIDEO_SM501_8BPP#error CONFIG_VIDEO_SM501_8BPP not supported.#endif /* CONFIG_VIDEO_SM501_8BPP */#ifdef CONFIG_VIDEO_SM501_16BPP#error CONFIG_VIDEO_SM501_16BPP not supported.#endif /* CONFIG_VIDEO_SM501_16BPP */#ifdef CONFIG_VIDEO_SM501_32BPPstatic const SMI_REGS init_regs [] ={#if 0 /* CRT only */ {0x00004, 0x0}, {0x00048, 0x00021807}, {0x0004C, 0x10090a01}, {0x00054, 0x1}, {0x00040, 0x00021807}, {0x00044, 0x10090a01}, {0x00054, 0x0}, {0x80200, 0x00010000}, {0x80204, 0x0}, {0x80208, 0x0A000A00}, {0x8020C, 0x02fa027f}, {0x80210, 0x004a028b}, {0x80214, 0x020c01df}, {0x80218, 0x000201e9}, {0x80200, 0x00013306},#else /* panel + CRT */#ifdef CONFIG_FO300 {0x00004, 0x0}, {0x00048, 0x00021807}, {0x0004C, 0x301a0a01}, {0x00054, 0x1}, {0x00040, 0x00021807}, {0x00044, 0x091a0a01}, {0x00054, 0x0}, {0x80000, 0x0f013106}, {0x80004, 0xc428bb17}, {0x8000C, 0x00000000}, {0x80010, 0x0C800C80}, {0x80014, 0x03200000}, {0x80018, 0x01e00000}, {0x8001C, 0x00000000}, {0x80020, 0x01e00320}, {0x80024, 0x042a031f}, {0x80028, 0x0086034a}, {0x8002C, 0x020c01df}, {0x80030, 0x000201ea}, {0x80200, 0x00010000},#else {0x00004, 0x0}, {0x00048, 0x00021807}, {0x0004C, 0x091a0a01}, {0x00054, 0x1}, {0x00040, 0x00021807}, {0x00044, 0x091a0a01}, {0x00054, 0x0}, {0x80000, 0x0f013106}, {0x80004, 0xc428bb17}, {0x8000C, 0x00000000}, {0x80010, 0x0a000a00}, {0x80014, 0x02800000}, {0x80018, 0x01e00000}, {0x8001C, 0x00000000}, {0x80020, 0x01e00280}, {0x80024, 0x02fa027f}, {0x80028, 0x004a028b}, {0x8002C, 0x020c01df}, {0x80030, 0x000201e9}, {0x80200, 0x00010000},#endif /* #ifdef CONFIG_FO300 */#endif {0, 0}};#endif /* CONFIG_VIDEO_SM501_32BPP */#ifdef CONFIG_CONSOLE_EXTRA_INFO/* * Return text to be printed besides the logo. */void video_get_info_str (int line_number, char *info){ if (line_number == 1) { strcpy (info, " Board: TQM5200 (TQ-Components GmbH)");#if defined (CONFIG_STK52XX) || defined (CONFIG_TB5200) || defined(CONFIG_FO300) } else if (line_number == 2) {#if defined (CONFIG_STK52XX) strcpy (info, " on a STK52xx carrier board");#endif#if defined (CONFIG_TB5200) strcpy (info, " on a TB5200 carrier board");#endif#if defined (CONFIG_FO300) strcpy (info, " on a FO300 carrier board");#endif#endif } else { info [0] = '\0'; }}#endif/* * Returns SM501 register base address. First thing called in the * driver. Checks if SM501 is physically present. */unsigned int board_video_init (void){ u16 save, tmp; int restore, ret; /* * Check for Grafic Controller */ /* save origianl FB content */ save = *(volatile u16 *)CFG_CS1_START; restore = 1; /* write test pattern to FB memory */ *(volatile u16 *)CFG_CS1_START = 0xA5A5; __asm__ volatile ("sync"); /* * Put a different pattern on the data lines: otherwise they may float * long enough to read back what we wrote. */ tmp = *(volatile u16 *)CFG_FLASH_BASE; if (tmp == 0xA5A5) puts ("!! possible error in grafic controller detection\n"); if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) { /* no grafic controller found */ restore = 0; ret = 0; } else { ret = SM501_MMIO_BASE; } if (restore) { *(volatile u16 *)CFG_CS1_START = save; __asm__ volatile ("sync"); } return ret;}/* * Returns SM501 framebuffer address */unsigned int board_video_get_fb (void){ return SM501_FB_BASE;}/* * Called after initializing the SM501 and before clearing the screen. */void board_validate_screen (unsigned int base){}/* * Return a pointer to the initialization sequence. */const SMI_REGS *board_get_regs (void){ return init_regs;}int board_get_width (void){ return DISPLAY_WIDTH;}int board_get_height (void){ return DISPLAY_HEIGHT;}#endif /* CONFIG_VIDEO_SM501 */
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