📄 tqm5200.h
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/* * (C) Copyright 2003-2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * (C) Copyright 2004-2006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#ifndef __CONFIG_H#define __CONFIG_H/* * High Level Configuration Options * (easy to change) */#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */#define CONFIG_TQM5200 1 /* ... on TQM5200 module */#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules *//* On a Cameron or on a FO300 board or ... */#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)#define CONFIG_STK52XX 1 /* ... on a STK52XX board */#endif#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */#define BOOTFLAG_WARM 0x02 /* Software reboot */#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */#if (CONFIG_COMMANDS & CFG_CMD_KGDB)# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */#endif/* * Serial console configuration */#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }#ifdef CONFIG_FO300#define CFG_DEVICE_NULLDEV 1 /* enable null device */#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */#if 0#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */ /* switch is closed */#endif#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */ /* switch is open */#endif /* CONFIG_FO300 */#ifdef CONFIG_STK52XX#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */#define CONFIG_BOARD_EARLY_INIT_R#endif /* CONFIG_STK52XX *//* * PCI Mapping: * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space */#ifdef CONFIG_STK52XX#define CONFIG_PCI 1#define CONFIG_PCI_PNP 1/* #define CONFIG_PCI_SCAN_SHOW 1 */#define CONFIG_PCI_MEM_BUS 0x40000000#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS#define CONFIG_PCI_MEM_SIZE 0x10000000#define CONFIG_PCI_IO_BUS 0x50000000#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS#define CONFIG_PCI_IO_SIZE 0x01000000#define CONFIG_NET_MULTI 1#define CONFIG_EEPRO100 1#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */#define CONFIG_NS8382X 1#endif /* CONFIG_STK52XX */#ifdef CONFIG_PCI#define ADD_PCI_CMD CFG_CMD_PCI#else#define ADD_PCI_CMD 0#endif/* * Video console */#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */#define CONFIG_VIDEO#define CONFIG_VIDEO_SM501#define CONFIG_VIDEO_SM501_32BPP#define CONFIG_CFB_CONSOLE#define CONFIG_VIDEO_LOGO#ifndef CONFIG_FO300#define CONFIG_CONSOLE_EXTRA_INFO#else#define CONFIG_VIDEO_BMP_LOGO#endif#define CONFIG_VGA_AS_SINGLE_DEVICE#define CONFIG_VIDEO_SW_CURSOR#define CONFIG_SPLASH_SCREEN#define CFG_CONSOLE_IS_IN_ENV#endif /* #ifndef CONFIG_TQM5200S */#ifdef CONFIG_VIDEO#define ADD_BMP_CMD CFG_CMD_BMP#else#define ADD_BMP_CMD 0#endif/* Partitions */#define CONFIG_MAC_PARTITION#define CONFIG_DOS_PARTITION#define CONFIG_ISO_PARTITION/* USB */#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)#define CONFIG_USB_OHCI#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT#define CONFIG_USB_STORAGE#else#define ADD_USB_CMD 0#endif#ifndef CONFIG_CAM5200/* POST support */#define CONFIG_POST (CFG_POST_MEMORY | \ CFG_POST_CPU | \ CFG_POST_I2C)#endif#ifdef CONFIG_POST#define CFG_CMD_POST_DIAG CFG_CMD_DIAG/* preserve space for the post_word at end of on-chip SRAM */#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4#else#define CFG_CMD_POST_DIAG 0#endif/* IDE */#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)#else#define ADD_IDE_CMD 0#endif/* * Supported commands */#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ ADD_BMP_CMD | \ ADD_IDE_CMD | \ ADD_PCI_CMD | \ ADD_USB_CMD | \ CFG_CMD_ASKENV | \ CFG_CMD_DATE | \ CFG_CMD_DHCP | \ CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_JFFS2 | \ CFG_CMD_MII | \ CFG_CMD_NFS | \ CFG_CMD_PING | \ CFG_CMD_POST_DIAG | \ CFG_CMD_REGINFO | \ CFG_CMD_SNTP | \ CFG_CMD_BSP)/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */#include <cmd_confdefs.h>#define CONFIG_TIMESTAMP /* display image timestamps */#if (TEXT_BASE != 0xFFF00000)# define CFG_LOWBOOT 1 /* Boot low */#endif/* * Autobooting */#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */#define CONFIG_PREBOOT "echo;" \ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ "echo"#undef CONFIG_BOOTARGS#ifdef CONFIG_STK52XX# if defined(CONFIG_TQM5200_B)# if defined(CFG_LOWBOOT)# define ENV_UPDT \ "update=protect off FC000000 FC07FFFF;" \ "erase FC000000 FC07FFFF;" \ "cp.b 200000 FC000000 ${filesize};" \ "protect on FC000000 FC07FFFF\0"# else /* highboot */# define ENV_UPDT \ "update=protect off FFF00000 FFF7FFFF;" \ "erase FFF00000 FFF7FFFF;" \ "cp.b 200000 FFF00000 ${filesize};" \ "protect on FFF00000 FFF7FFFF\0"# endif /* CFG_LOWBOOT */# else /* !CONFIG_TQM5200_B */# define ENV_UPDT \ "update=protect off FC000000 FC05FFFF;" \ "erase FC000000 FC05FFFF;" \ "cp.b 200000 FC000000 ${filesize};" \ "protect on FC000000 FC05FFFF\0"# endif /* CONFIG_TQM5200_B */#elif defined (CONFIG_CAM5200)# define ENV_UPDT \ "update=protect off FC000000 FC03FFFF;" \ "erase FC000000 FC03FFFF;" \ "cp.b 200000 FC000000 ${filesize};" \ "protect on FC000000 FC03FFFF\0"#elif defined (CONFIG_FO300)# define ENV_UPDT \ "update=protect off FC000000 FC05FFFF;" \ "erase FC000000 FC05FFFF;" \ "cp.b 200000 FC000000 ${filesize};" \ "protect on FC000000 FC05FFFF\0"#else# error "Unknown Carrier Board"#endif /* CONFIG_STK52XX */#define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "addip=setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} " \ "console=ttyS0,${baudrate}\0" \ "flash_self=run ramargs addip addcons;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ "flash_nfs=run nfsargs addip addcons;" \ "bootm ${kernel_addr}\0" \ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \ "bootm\0" \ "bootfile=/tftpboot/tqm5200/uImage\0" \ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \ "load=tftp 200000 ${u-boot}\0" \ ENV_UPDT \ ""#define CONFIG_BOOTCOMMAND "run net_nfs"/* * IPB Bus clocking configuration. */#define CFG_IPBSPEED_133 /* define for 133MHz speed */#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200)/* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't * been tested with a IPB Bus Clock of 66 MHz. */#define CFG_PCISPEED_66 /* define for 66MHz speed */#endif/* * I2C configuration */#define CONFIG_HARD_I2C 1 /* I2C with hardware support */#ifdef CONFIG_TQM5200_REV100#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */#else#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */#endif/* * I2C clock frequency * * Please notice, that the resulting clock frequency could differ from the * configured value. This is because the I2C clock is derived from system * clock over a frequency divider with only a few divider values. U-boot * calculates the best approximation for CFG_I2C_SPEED. However the calculated * approximation allways lies below the configured value, never above. */#define CFG_I2C_SPEED 100000 /* 100 kHz */#define CFG_I2C_SLAVE 0x7F/* * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work * also). For other EEPROMs configuration should be verified. On Mini-FAP the * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the * same configuration could be used. */#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */#define CFG_I2C_EEPROM_ADDR_LEN 2#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20/* * HW-Monitor configuration on Mini-FAP */#if defined (CONFIG_MINIFAP)#define CFG_I2C_HWMON_ADDR 0x2C#endif/* List of I2C addresses to be verified by POST */#if defined (CONFIG_MINIFAP)#undef I2C_ADDR_LIST#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \ CFG_I2C_HWMON_ADDR, \ CFG_I2C_SLAVE }#endif/*
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