📄 adnpesc1.h
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#elif (CFG_NIOS_CPU_WDENA_PIO == 8)#define CONFIG_HW_WDENA_BASE CFG_NIOS_CPU_PIO8 /* PIO8 */#elif (CFG_NIOS_CPU_WDENA_PIO == 9)#define CONFIG_HW_WDENA_BASE CFG_NIOS_CPU_PIO9 /* PIO9 */#else#error *** CFG_ERROR: you have to setup at least one WDENA_PIO in NIOS CPU config#endif/* MAX823 supervisor -- watchdog trigger port at: */#if (CFG_NIOS_CPU_WDTOG_PIO == 0)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO0 /* PIO0 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 1)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO1 /* PIO1 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 2)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO2 /* PIO2 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 3)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO3 /* PIO3 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 4)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO4 /* PIO4 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 5)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO5 /* PIO5 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 6)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO6 /* PIO6 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 7)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO7 /* PIO7 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 8)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO8 /* PIO8 */#elif (CFG_NIOS_CPU_WDTOG_PIO == 9)#define CONFIG_HW_WDTOG_BASE CFG_NIOS_CPU_PIO9 /* PIO9 */#else#error *** CFG_ERROR: you have to setup at least one WDTOG_PIO in NIOS CPU config#endif#if defined(CONFIG_NIOS_BASE_32) /* NIOS CPU specifics */#define CONFIG_HW_WDENA_BIT 0 /* WD enable @ Bit 0 */#define CONFIG_HW_WDTOG_BIT 0 /* WD trigger @ Bit 0 */#define CONFIG_HW_WDPORT_WRONLY 1 /* each WD port wr/only*/#else#error *** CFG_ERROR: missing watchdog bit configuration, expand your config.h#endif#endif /* CONFIG_HW_WATCHDOG *//*------------------------------------------------------------------------ * SERIAL PERIPHAREL INTERFACE *----------------------------------------------------------------------*/#if (CFG_NIOS_CPU_SPI_NUMS == 1)#define CONFIG_NIOS_SPI 1 /* SPI support active */#define CFG_NIOS_SPIBASE CFG_NIOS_CPU_SPI0#define CFG_NIOS_SPIBITS CFG_NIOS_CPU_SPI0_BITS#define CONFIG_RTC_DS1306 1 /* Dallas 1306 real time clock */#define CFG_SPI_RTC_DEVID 0 /* as 1st SPI device */#define __SPI_CMD_OFF 0 /* allow default commands: */ /* CFG_CMD_SPI */ /* CFG_CMD_DATE */#else#undef CONFIG_NIOS_SPI /* NO SPI support */#define __SPI_CMD_OFF ( CFG_CMD_SPI \ | CFG_CMD_DATE \ )#endif/*------------------------------------------------------------------------ * Ethernet -- needs work! *----------------------------------------------------------------------*/#if (CFG_NIOS_CPU_LAN_NUMS == 1)#if (CFG_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */#define CONFIG_SMC91111_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)#if (CFG_NIOS_CPU_LAN0_BUSW == 32)#define CONFIG_SMC_USE_32_BIT 1#else /* no */#undef CONFIG_SMC_USE_32_BIT#endif#elif (CFG_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */ /********************************************/ /* !!! CS8900 is __not__ tested on NIOS !!! */ /********************************************/#define CONFIG_DRIVER_CS8900 /* Using CS8900 */#define CS8900_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)#if (CFG_NIOS_CPU_LAN0_BUSW == 32)#undef CS8900_BUS16#define CS8900_BUS32 1#else /* no */#define CS8900_BUS16 1#undef CS8900_BUS32#endif#else#error *** CFG_ERROR: invalid LAN0 chip type, check your NIOS CPU config#endif#define CONFIG_ETHADDR 02:80:ae:20:60:6f#define CONFIG_NETMASK 255.255.255.248#define CONFIG_IPADDR 192.168.161.84#define CONFIG_SERVERIP 192.168.161.85#else#error *** CFG_ERROR: you have to setup just one LAN only or expand your config.h#endif/*------------------------------------------------------------------------ * STATUS LEDs *----------------------------------------------------------------------*/#if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_LED_PIO)#if (CFG_NIOS_CPU_LED_PIO == 0)#define STATUS_LED_BASE CFG_NIOS_CPU_PIO0#define STATUS_LED_BITS CFG_NIOS_CPU_PIO0_BITS#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */#if (CFG_NIOS_CPU_PIO0_TYPE == 1)#define STATUS_LED_WRONLY 1#else#undef STATUS_LED_WRONLY#endif#elif (CFG_NIOS_CPU_LED_PIO == 1)#define STATUS_LED_BASE CFG_NIOS_CPU_PIO1#define STATUS_LED_BITS CFG_NIOS_CPU_PIO1_BITS#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */#if (CFG_NIOS_CPU_PIO1_TYPE == 1)#define STATUS_LED_WRONLY 1#else#undef STATUS_LED_WRONLY#endif#elif (CFG_NIOS_CPU_LED_PIO == 2)#define STATUS_LED_BASE CFG_NIOS_CPU_PIO2#define STATUS_LED_BITS CFG_NIOS_CPU_PIO2_BITS#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */#if (CFG_NIOS_CPU_PIO2_TYPE == 1)#define STATUS_LED_WRONLY 1#else#undef STATUS_LED_WRONLY#endif#elif (CFG_NIOS_CPU_LED_PIO == 3)#error *** CFG_ERROR: status LEDs at PIO3 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 4)#error *** CFG_ERROR: status LEDs at PIO4 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 5)#error *** CFG_ERROR: status LEDs at PIO5 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 6)#error *** CFG_ERROR: status LEDs at PIO6 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 7)#error *** CFG_ERROR: status LEDs at PIO7 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 8)#error *** CFG_ERROR: status LEDs at PIO8 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 9)#error *** CFG_ERROR: status LEDs at PIO9 not supported, expand your config.h#else#error *** CFG_ERROR: you have to set CFG_NIOS_CPU_LED_PIO in right case#endif#define CONFIG_STATUS_LED 1 /* enable status led driver */#define STATUS_LED_BIT (1 << 0) /* LED[0] */#define STATUS_LED_STATE STATUS_LED_BLINKING#define STATUS_LED_BOOT_STATE STATUS_LED_OFF#define STATUS_LED_PERIOD (CFG_HZ / 2) /* ca. 1 Hz */#define STATUS_LED_BOOT 0 /* boot LED */#if (STATUS_LED_BITS > 1)#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */#define STATUS_LED_STATE1 STATUS_LED_OFF#define STATUS_LED_PERIOD1 (CFG_HZ / 10) /* ca. 5 Hz */#define STATUS_LED_RED 1 /* fail LED */#endif#if (STATUS_LED_BITS > 2)#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */#define STATUS_LED_STATE2 STATUS_LED_OFF#define STATUS_LED_PERIOD2 (CFG_HZ / 2) /* ca. 1 Hz */#define STATUS_LED_YELLOW 2 /* info LED */#endif#if (STATUS_LED_BITS > 3)#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */#define STATUS_LED_STATE3 STATUS_LED_OFF#define STATUS_LED_PERIOD3 (CFG_HZ / 2) /* ca. 1 Hz */#define STATUS_LED_GREEN 3 /* info LED */#endif#define STATUS_LED_PAR 1 /* makes status_led.h happy */#endif /* CFG_NIOS_CPU_PIO_NUMS *//*------------------------------------------------------------------------ * Diagnostics / Power On Self Tests *----------------------------------------------------------------------*/#define CONFIG_POST CFG_POST_RTC#define CFG_NIOS_POST_WORD_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)/*------------------------------------------------------------------------ * COMMANDS *----------------------------------------------------------------------*/#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \ CFG_CMD_ASKENV | \ CFG_CMD_BEDBUG | \ CFG_CMD_BMP | \ CFG_CMD_CACHE | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FAT | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_HWFLOW | \ CFG_CMD_IDE | \ CFG_CMD_I2C | \ CFG_CMD_JFFS2 | \ CFG_CMD_KGDB | \ CFG_CMD_NAND | \ CFG_CMD_NFS | \ CFG_CMD_MMC | \ CFG_CMD_MII | \ CFG_CMD_PCI | \ CFG_CMD_PCMCIA | \ CFG_CMD_SCSI | \ CFG_CMD_VFD | \ CFG_CMD_USB | \ CFG_CMD_XIMG | \ __SPI_CMD_OFF ) )#include <cmd_confdefs.h>/*------------------------------------------------------------------------ * KGDB *----------------------------------------------------------------------*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CONFIG_KGDB_BAUDRATE 9600#endif/*------------------------------------------------------------------------ * MISC *----------------------------------------------------------------------*/#define CFG_LONGHELP /* undef to save memory */#define CFG_HUSH_PARSER 1 /* use "hush" command parser undef to save memory */#define CFG_PROMPT "ADNPESC1 > " /* Monitor Command Prompt */#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define CFG_MAXARGS 64 /* max number of command args*/#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */#ifdef CFG_HUSH_PARSER#define CFG_PROMPT_HUSH_PS2 "[]> "#endif/* Default load address */#if (CFG_SRAM_SIZE != 0)/* default in SRAM */#define CFG_LOAD_ADDR CFG_SRAM_BASE#elif (CFG_SDRAM_SIZE != 0)/* default in SDRAM */#if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)#if 1#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)#else#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x400000)#endif#else#define CFG_LOAD_ADDR CFG_SDRAM_BASE#endif#else#undef CFG_LOAD_ADDR /* force error break */#endif/* MEM test area */#if (CFG_SDRAM_SIZE != 0)/* SDRAM begin to stack area (1MB stack) */#if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)#if 0#define CFG_MEMTEST_START (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)#else#define CFG_MEMTEST_START (CFG_SDRAM_BASE + 0x400000)#endif#else#define CFG_MEMTEST_START CFG_SDRAM_BASE#endif#define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))#define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))#else#undef CFG_MEMTEST_START /* force error break */#undef CFG_MEMTEST_END#endif/* * JFFS2 partitions * *//* No command line, one static partition */#undef CONFIG_JFFS2_CMDLINE#define CONFIG_JFFS2_DEV "nor"#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF#define CONFIG_JFFS2_PART_OFFSET 0x00000000/* mtdparts command line support *//*#define CONFIG_JFFS2_CMDLINE#define MTDIDS_DEFAULT ""#define MTDPARTS_DEFAULT ""*/#endif /* __CONFIG_H */
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