📄 dk1s10.h
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#error *** CFG_ERROR: status LEDs at PIO0 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 1)#error *** CFG_ERROR: status LEDs at PIO1 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 2)#define STATUS_LED_BASE CFG_NIOS_CPU_PIO2#define STATUS_LED_BITS CFG_NIOS_CPU_PIO2_BITS#define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */#if (CFG_NIOS_CPU_PIO2_TYPE == 1)#define STATUS_LED_WRONLY 1#else#undef STATUS_LED_WRONLY#endif#elif (CFG_NIOS_CPU_LED_PIO == 3)#error *** CFG_ERROR: status LEDs at PIO3 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 4)#error *** CFG_ERROR: status LEDs at PIO4 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 5)#error *** CFG_ERROR: status LEDs at PIO5 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 6)#error *** CFG_ERROR: status LEDs at PIO6 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 7)#error *** CFG_ERROR: status LEDs at PIO7 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 8)#error *** CFG_ERROR: status LEDs at PIO8 not supported, expand your config.h#elif (CFG_NIOS_CPU_LED_PIO == 9)#error *** CFG_ERROR: status LEDs at PIO9 not supported, expand your config.h#else#error *** CFG_ERROR: you have to set CFG_NIOS_CPU_LED_PIO in right case#endif#define CONFIG_STATUS_LED 1 /* enable status led driver */#define STATUS_LED_BIT (1 << 0) /* LED[0] */#define STATUS_LED_STATE STATUS_LED_BLINKING#define STATUS_LED_BOOT_STATE STATUS_LED_OFF#define STATUS_LED_PERIOD (CFG_HZ / 10) /* ca. 1 Hz */#define STATUS_LED_BOOT 0 /* boot LED */#if (STATUS_LED_BITS > 1)#define STATUS_LED_BIT1 (1 << 1) /* LED[1] */#define STATUS_LED_STATE1 STATUS_LED_OFF#define STATUS_LED_PERIOD1 (CFG_HZ / 50) /* ca. 5 Hz */#define STATUS_LED_RED 1 /* fail LED */#endif#if (STATUS_LED_BITS > 2)#define STATUS_LED_BIT2 (1 << 2) /* LED[2] */#define STATUS_LED_STATE2 STATUS_LED_OFF#define STATUS_LED_PERIOD2 (CFG_HZ / 10) /* ca. 1 Hz */#define STATUS_LED_YELLOW 2 /* info LED */#endif#if (STATUS_LED_BITS > 3)#define STATUS_LED_BIT3 (1 << 3) /* LED[3] */#define STATUS_LED_STATE3 STATUS_LED_OFF#define STATUS_LED_PERIOD3 (CFG_HZ / 10) /* ca. 1 Hz */#define STATUS_LED_GREEN 3 /* info LED */#endif#define STATUS_LED_PAR 1 /* makes status_led.h happy */#endif /* CFG_NIOS_CPU_PIO_NUMS *//*------------------------------------------------------------------------ * SEVEN SEGMENT LED DISPLAY *----------------------------------------------------------------------*/#if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_SEVENSEG_PIO)#if (CFG_NIOS_CPU_SEVENSEG_PIO == 0)#error *** CFG_ERROR: seven segment display at PIO0 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 1)#error *** CFG_ERROR: seven segment display at PIO1 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 2)#error *** CFG_ERROR: seven segment display at PIO2 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 3)#define SEVENSEG_BASE CFG_NIOS_CPU_PIO3#define SEVENSEG_BITS CFG_NIOS_CPU_PIO3_BITS#define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */#if (CFG_NIOS_CPU_PIO3_TYPE == 1)#define SEVENSEG_WRONLY 1#else#undef SEVENSEG_WRONLY#endif#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 4)#error *** CFG_ERROR: seven segment display at PIO4 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 5)#error *** CFG_ERROR: seven segment display at PIO5 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 6)#error *** CFG_ERROR: seven segment display at PIO6 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 7)#error *** CFG_ERROR: seven segment display at PIO7 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 8)#error *** CFG_ERROR: seven segment display at PIO8 not supported, expand your config.h#elif (CFG_NIOS_CPU_SEVENSEG_PIO == 9)#error *** CFG_ERROR: seven segment display at PIO9 not supported, expand your config.h#else#error *** CFG_ERROR: you have to set CFG_NIOS_CPU_SEVENSEG_PIO in right case#endif#define CONFIG_SEVENSEG 1 /* enable seven segment led driver *//* * Dual 7-Segment Display pin assignment -- read more in your * "Nios Development Board Reference Manual" * * * (U8) HI:D[15..8] (U9) LO:D[7..0] * ______ ______ * | D14 | | D6 | * | | | | * D9| |D13 D1| |D5 * |______| |______| ___ * | D8 | | D0 | | A | * | | | | F|___|B * D10| |D12 D2| |D4 | G | * |______| |______| E|___|C * D11 * D3 * D * * D15 D7 DP * */#define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */#define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */#define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */#define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */#define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */#define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */#define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */#define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */#define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */#endif /* CFG_NIOS_CPU_PIO_NUMS *//*------------------------------------------------------------------------ * COMMANDS *----------------------------------------------------------------------*/#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \ CFG_CMD_ASKENV | \ CFG_CMD_BEDBUG | \ CFG_CMD_BMP | \ CFG_CMD_BSP | \ CFG_CMD_CACHE | \ CFG_CMD_DATE | \ CFG_CMD_DOC | \ CFG_CMD_DTT | \ CFG_CMD_EEPROM | \ CFG_CMD_ELF | \ CFG_CMD_FAT | \ CFG_CMD_FDC | \ CFG_CMD_FDOS | \ CFG_CMD_HWFLOW | \ CFG_CMD_IDE | \ CFG_CMD_I2C | \ CFG_CMD_JFFS2 | \ CFG_CMD_KGDB | \ CFG_CMD_NAND | \ CFG_CMD_NFS | \ CFG_CMD_MMC | \ CFG_CMD_MII | \ CFG_CMD_PCI | \ CFG_CMD_PCMCIA | \ CFG_CMD_SCSI | \ CFG_CMD_SPI | \ CFG_CMD_VFD | \ CFG_CMD_USB | \ CFG_CMD_XIMG ) )#include <cmd_confdefs.h>/*------------------------------------------------------------------------ * KGDB *----------------------------------------------------------------------*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CONFIG_KGDB_BAUDRATE 9600#endif/*------------------------------------------------------------------------ * MISC *----------------------------------------------------------------------*/#define CFG_LONGHELP /* undef to save memory */#define CFG_PROMPT "DK1S10 > " /* Monitor Command Prompt */#define CFG_CBSIZE 256 /* Console I/O Buffer Size */#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define CFG_MAXARGS 16 /* max number of command args*/#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size *//* Default load address */#if (CFG_SRAM_SIZE != 0)/* default in SRAM */#define CFG_LOAD_ADDR CFG_SRAM_BASE#elif (CFG_SDRAM_SIZE != 0)/* default in SDRAM */#if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)#else#define CFG_LOAD_ADDR CFG_SDRAM_BASE#endif#else#undef CFG_LOAD_ADDR /* force error break */#endif/* MEM test area */#if (CFG_SDRAM_SIZE != 0)/* SDRAM begin to stack area (1MB stack) */#if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)#define CFG_MEMTEST_START (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)#define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))#else#define CFG_MEMTEST_START CFG_SDRAM_BASE#define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))#endif#else#undef CFG_MEMTEST_START /* force error break */#undef CFG_MEMTEST_END#endif/* * JFFS2 partitions * *//* No command line, one static partition, whole device */#undef CONFIG_JFFS2_CMDLINE#define CONFIG_JFFS2_DEV "nor0"#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF#define CONFIG_JFFS2_PART_OFFSET 0x00000000/* mtdparts command line support *//*#define CONFIG_JFFS2_CMDLINE#define MTDIDS_DEFAULT ""#define MTDPARTS_DEFAULT ""*/#endif /* __CONFIG_H */⌨️ 快捷键说明
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