exalion.h

u-boot-1.1.6 源码包

/*
 * (C) Copyright 2001
 * Wolfgang Denk, DENX Software Engineering, [e-mail].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/* ------------------------------------------------------------------------- */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_MPC824X		1
/* #define CONFIG_MPC8240	   1 */
#define CONFIG_MPC8245		1
#define CONFIG_EXALION		1

#if defined (CONFIG_MPC8240)
    /* #warning	 ---------- eXalion with MPC8240 --------------- */
#elif defined (CONFIG_MPC8245)
    /* #warning	 ++++++++++ eXalion with MPC8245 +++++++++++++++ */
#elif defined (CONFIG_MPC8245) && defined (CONFIG_MPC8245)
#error #### Both types of MPC824x defined (CONFIG_8240 and CONFIG_8245)
#else
#error #### Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)
#endif
/* older kernels need clock in MHz newer in Hz */
					/* #define CONFIG_CLOCKS_IN_MHZ 1 */ /* clocks passsed to Linux in MHz	    */
#undef CONFIG_CLOCKS_IN_MHZ

#define CONFIG_BOOTDELAY	10


						    /*#define CONFIG_DRAM_SPEED	      66   */ /* MHz			     */

#define CONFIG_COMMANDS		(   CONFIG_CMD_DFL  | \
				    CFG_CMD_FLASH   | \
				    CFG_CMD_SDRAM   | \
				    CFG_CMD_I2C	    | \
				    CFG_CMD_IDE	    | \
				    CFG_CMD_FAT	    | \
				    CFG_CMD_ENV	    | \
				    CFG_CMD_PCI )

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any)	*/
#include <cmd_confdefs.h>


/*-----------------------------------------------------------------------
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP		1	/* undef to save memory		*/
#define CFG_PROMPT		"=> "	/* Monitor Command Prompt	*/
#define CFG_CBSIZE		256	/* Console I/O Buffer Size	*/
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size	*/
#define CFG_MAXARGS		8	/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
#define CFG_LOAD_ADDR		0x00100000	/* default load address		*/

#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_MISC_INIT_R	1

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
#define CFG_SDRAM_BASE		0x00000000
#define CFG_MAX_RAM_SIZE	0x10000000	/* 1 GBytes - initdram() will	   */
					     /* return real value.		*/

#define CFG_RESET_ADDRESS	0xFFF00100

#undef	CFG_RAMBOOT
#define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	    */
#define CFG_MONITOR_BASE	TEXT_BASE

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area
 */
#define CFG_INIT_DATA_SIZE	128

#define CFG_INIT_RAM_ADDR	0x40000000
#define CFG_INIT_RAM_END	0x1000
#define CFG_INIT_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE)

#define CFG_GBL_DATA_SIZE	 256	/* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET


#if defined (CONFIG_MPC8240)
#define CFG_FLASH_BASE	    0xFFE00000
#define CFG_FLASH_SIZE	    (2 * 1024 * 1024)	/* onboard 2MByte flash	    */
#elif defined (CONFIG_MPC8245)
#define CFG_FLASH_BASE	    0xFFC00000
#define CFG_FLASH_SIZE	    (4 * 1024 * 1024)	/* onboard 4MByte flash	    */
#else
#error Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)
#endif

#define CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_SECT_SIZE	0x20000 /* Size of one Flash sector */
#define CFG_ENV_SIZE		CFG_ENV_SECT_SIZE	/* Use one Flash sector for enviroment	*/
#define CFG_ENV_ADDR		0xFFFC0000
#define CFG_ENV_OFFSET		0	/* starting right at the beginning  */

#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/

#define CFG_ALT_MEMTEST		1	/* use real memory test	    */
#define CFG_MEMTEST_START	0x00004000	/* memtest works on	    */
#define CFG_MEMTEST_END		0x02000000	/* 0 ... 32 MB in DRAM	    */

#define CFG_EUMB_ADDR		0xFC000000

/* #define CFG_ISA_MEM		   0xFD000000 */
#define CFG_ISA_IO		0xFE000000

/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* Max number of flash banks	    */
#define CFG_MAX_FLASH_SECT	64	/* Max number of sectors per flash  */

#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms) */

#define FLASH_BASE0_PRELIM	CFG_FLASH_BASE
#define FLASH_BASE1_PRELIM	0


/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

#define CFG_FLASH_CFI		1	/* Flash is CFI conformant		*/
#define CFG_FLASH_CFI_DRIVER	1	/* Use the common driver		*/
#define CFG_MAX_FLASH_SECT	64	/* max number of sectors on one chip	*/
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CFG_FLASH_INCREMENT	0	/* there is only one bank		*/
#define CFG_FLASH_PROTECTION	1	/* use hardware protection		*/
#define CFG_FLASH_USE_BUFFER_WRITE 1	/* use buffered writes (20x faster)	*/


/*-----------------------------------------------------------------------
 * PCI stuff
 */
#define CONFIG_PCI		1	/* include pci support		*/
#undef	CONFIG_PCI_PNP

#define CONFIG_NET_MULTI	1	/* Multi ethernet cards support */

#define CONFIG_EEPRO100		1

#define PCI_ENET0_MEMADDR	0x80000000	/* Intel 82559ER */
#define PCI_ENET0_IOADDR	0x80000000
#define PCI_ENET1_MEMADDR	0x81000000	/* Intel 82559ER */
#define PCI_ENET1_IOADDR	0x81000000
#define PCI_ENET2_MEMADDR	0x82000000	/* Broadcom BCM569xx */
#define PCI_ENET2_IOADDR	0x82000000
#define PCI_ENET3_MEMADDR	0x83000000	/* Broadcom BCM56xx */
#define PCI_ENET3_IOADDR	0x83000000

/*-----------------------------------------------------------------------
 * NS16550 Configuration
 */
#define CFG_NS16550		1
#define CFG_NS16550_SERIAL	1

#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		38400

#define CFG_NS16550_REG_SIZE	1

#if (CONFIG_CONS_INDEX == 1)
#define CFG_NS16550_CLK		1843200 /* COM1 only !	*/
#else
#define CFG_NS16550_CLK ({ extern ulong get_bus_freq (ulong); get_bus_freq (0); })
#endif

#define CFG_NS16550_COM1	(CFG_ISA_IO + 0x3F8)
#define CFG_NS16550_COM2	(CFG_EUMB_ADDR + 0x4500)
#define CFG_NS16550_COM3	(CFG_EUMB_ADDR + 0x4600)

/*-----------------------------------------------------------------------
 * select i2c support configuration
 *
 * Supported configurations are {none, software, hardware} drivers.
 * If the software driver is chosen, there are some additional
 * configuration items that the driver uses to drive the port pins.
 */
#define CONFIG_HARD_I2C		1	/* To enable I2C support	*/
#undef	CONFIG_SOFT_I2C		/* I2C bit-banged		*/
#define CFG_I2C_SPEED		400000	/* I2C speed and slave address	*/
#define CFG_I2C_SLAVE		0x7F

/*-----------------------------------------------------------------------
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */
#define CFG_HZ			1000