📄 cfi_flash.c
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/* * (C) Copyright 2002-2004 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com * * Copyright (C) 2003 Arabella Software Ltd. * Yuli Barcohen <yuli@arabellasw.com> * Modified to work with AMD flashes * * Copyright (C) 2004 * Ed Okerson * Modified to work with little-endian systems. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * * History * 01/20/2004 - combined variants of original driver. * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay) * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud) * 01/27/2004 - Little endian support Ed Okerson * * Tested Architectures * Port Width Chip Width # of banks Flash Chip Board * 32 16 1 28F128J3 seranoa/eagle * 64 16 1 28F128J3 seranoa/falcon * *//* The DEBUG define must be before common to enable debugging *//* #define DEBUG */#include <common.h>#include <asm/processor.h>#include <asm/byteorder.h>#include <environment.h>#ifdef CFG_FLASH_CFI_DRIVER/* * This file implements a Common Flash Interface (CFI) driver for U-Boot. * The width of the port and the width of the chips are determined at initialization. * These widths are used to calculate the address for access CFI data structures. * It has been tested on an Intel Strataflash implementation and AMD 29F016D. * * References * JEDEC Standard JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet * * TODO * * Use Primary Extended Query table (PRI) and Alternate Algorithm Query * Table (ALT) to determine if protection is available * * Add support for other command sets Use the PRI and ALT to determine command set * Verify erase and program timeouts. */#ifndef CFG_FLASH_BANKS_LIST#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }#endif#define FLASH_CMD_CFI 0x98#define FLASH_CMD_READ_ID 0x90#define FLASH_CMD_RESET 0xff#define FLASH_CMD_BLOCK_ERASE 0x20#define FLASH_CMD_ERASE_CONFIRM 0xD0#define FLASH_CMD_WRITE 0x40#define FLASH_CMD_PROTECT 0x60#define FLASH_CMD_PROTECT_SET 0x01#define FLASH_CMD_PROTECT_CLEAR 0xD0#define FLASH_CMD_CLEAR_STATUS 0x50#define FLASH_CMD_WRITE_TO_BUFFER 0xE8#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0#define FLASH_STATUS_DONE 0x80#define FLASH_STATUS_ESS 0x40#define FLASH_STATUS_ECLBS 0x20#define FLASH_STATUS_PSLBS 0x10#define FLASH_STATUS_VPENS 0x08#define FLASH_STATUS_PSS 0x04#define FLASH_STATUS_DPS 0x02#define FLASH_STATUS_R 0x01#define FLASH_STATUS_PROTECT 0x01#define AMD_CMD_RESET 0xF0#define AMD_CMD_WRITE 0xA0#define AMD_CMD_ERASE_START 0x80#define AMD_CMD_ERASE_SECTOR 0x30#define AMD_CMD_UNLOCK_START 0xAA#define AMD_CMD_UNLOCK_ACK 0x55#define AMD_CMD_WRITE_TO_BUFFER 0x25#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29#define AMD_STATUS_TOGGLE 0x40#define AMD_STATUS_ERROR 0x20#define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)#define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)#define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)#define FLASH_OFFSET_CFI 0x55#define FLASH_OFFSET_CFI_RESP 0x10#define FLASH_OFFSET_PRIMARY_VENDOR 0x13#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */#define FLASH_OFFSET_WTOUT 0x1F#define FLASH_OFFSET_WBTOUT 0x20#define FLASH_OFFSET_ETOUT 0x21#define FLASH_OFFSET_CETOUT 0x22#define FLASH_OFFSET_WMAX_TOUT 0x23#define FLASH_OFFSET_WBMAX_TOUT 0x24#define FLASH_OFFSET_EMAX_TOUT 0x25#define FLASH_OFFSET_CEMAX_TOUT 0x26#define FLASH_OFFSET_SIZE 0x27#define FLASH_OFFSET_INTERFACE 0x28#define FLASH_OFFSET_BUFFER_SIZE 0x2A#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C#define FLASH_OFFSET_ERASE_REGIONS 0x2D#define FLASH_OFFSET_PROTECT 0x02#define FLASH_OFFSET_USER_PROTECTION 0x85#define FLASH_OFFSET_INTEL_PROTECTION 0x81#define FLASH_MAN_CFI 0x01000000#define CFI_CMDSET_NONE 0#define CFI_CMDSET_INTEL_EXTENDED 1#define CFI_CMDSET_AMD_STANDARD 2#define CFI_CMDSET_INTEL_STANDARD 3#define CFI_CMDSET_AMD_EXTENDED 4#define CFI_CMDSET_MITSU_STANDARD 256#define CFI_CMDSET_MITSU_EXTENDED 257#define CFI_CMDSET_SST 258#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */# undef FLASH_CMD_RESET# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */#endiftypedef union { unsigned char c; unsigned short w; unsigned long l; unsigned long long ll;} cfiword_t;typedef union { volatile unsigned char *cp; volatile unsigned short *wp; volatile unsigned long *lp; volatile unsigned long long *llp;} cfiptr_t;#define NUM_ERASE_REGIONS 4/* use CFG_MAX_FLASH_BANKS_DETECT if defined */#ifdef CFG_MAX_FLASH_BANKS_DETECTstatic ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */#elsestatic ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */#endif/* * Check if chip width is defined. If not, start detecting with 8bit. */#ifndef CFG_FLASH_CFI_WIDTH#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT#endif/*----------------------------------------------------------------------- * Functions */typedef unsigned long flash_sect_t;static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);static int flash_detect_cfi (flash_info_t * info);static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, ulong tout, char *prompt);ulong flash_get_size (ulong base, int banknum);#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)static flash_info_t *flash_get_info(ulong base);#endif#ifdef CFG_FLASH_USE_BUFFER_WRITEstatic int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);#endif/*----------------------------------------------------------------------- * create an address based on the offset and the port width */inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset){ return ((uchar *) (info->start[sect] + (offset * info->portwidth)));}#ifdef DEBUG/*----------------------------------------------------------------------- * Debug support */void print_longlong (char *str, unsigned long long data){ int i; char *cp; cp = (unsigned char *) &data; for (i = 0; i < 8; i++) sprintf (&str[i * 2], "%2.2x", *cp++);}static void flash_printqry (flash_info_t * info, flash_sect_t sect){ cfiptr_t cptr; int x, y; for (x = 0; x < 0x40; x += 16U / info->portwidth) { cptr.cp = flash_make_addr (info, sect, x + FLASH_OFFSET_CFI_RESP); debug ("%p : ", cptr.cp); for (y = 0; y < 16; y++) { debug ("%2.2x ", cptr.cp[y]); } debug (" "); for (y = 0; y < 16; y++) { if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) { debug ("%c", cptr.cp[y]); } else { debug ("."); } } debug ("\n"); }}#endif/*----------------------------------------------------------------------- * read a character at a port width address */inline uchar flash_read_uchar (flash_info_t * info, uint offset){ uchar *cp; cp = flash_make_addr (info, 0, offset);#if defined(__LITTLE_ENDIAN) return (cp[0]);#else return (cp[info->portwidth - 1]);#endif}/*----------------------------------------------------------------------- * read a short word by swapping for ppc format. */ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset){ uchar *addr; ushort retval;#ifdef DEBUG int x;#endif addr = flash_make_addr (info, sect, offset);#ifdef DEBUG debug ("ushort addr is at %p info->portwidth = %d\n", addr, info->portwidth); for (x = 0; x < 2 * info->portwidth; x++) { debug ("addr[%x] = 0x%x\n", x, addr[x]); }#endif#if defined(__LITTLE_ENDIAN) retval = ((addr[(info->portwidth)] << 8) | addr[0]);#else retval = ((addr[(2 * info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);#endif debug ("retval = 0x%x\n", retval); return retval;}/*----------------------------------------------------------------------- * read a long word by picking the least significant byte of each maiximum * port size word. Swap for ppc format. */ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset){ uchar *addr; ulong retval;#ifdef DEBUG int x;#endif addr = flash_make_addr (info, sect, offset);#ifdef DEBUG debug ("long addr is at %p info->portwidth = %d\n", addr, info->portwidth); for (x = 0; x < 4 * info->portwidth; x++) { debug ("addr[%x] = 0x%x\n", x, addr[x]); }#endif#if defined(__LITTLE_ENDIAN) retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) | (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);#else retval = (addr[(2 * info->portwidth) - 1] << 24) | (addr[(info->portwidth) - 1] << 16) | (addr[(4 * info->portwidth) - 1] << 8) | addr[(3 * info->portwidth) - 1];#endif return retval;}/*----------------------------------------------------------------------- */unsigned long flash_init (void){ unsigned long size = 0; int i;#ifdef CFG_FLASH_PROTECTION char *s = getenv("unlock");#endif /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; size += flash_info[i].size = flash_get_size (bank_base[i], i); if (flash_info[i].flash_id == FLASH_UNKNOWN) {#ifndef CFG_FLASH_QUIET_TEST printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", i, flash_info[i].size, flash_info[i].size << 20);#endif /* CFG_FLASH_QUIET_TEST */ }#ifdef CFG_FLASH_PROTECTION else if ((s != NULL) && (strcmp(s, "yes") == 0)) { /* * Only the U-Boot image and it's environment is protected, * all other sectors are unprotected (unlocked) if flash * hardware protection is used (CFG_FLASH_PROTECTION) and * the environment variable "unlock" is set to "yes". */ if (flash_info[i].legacy_unlock) { int k; /* * Disable legacy_unlock temporarily, since * flash_real_protect would relock all other sectors * again otherwise. */ flash_info[i].legacy_unlock = 0; /* * Legacy unlocking (e.g. Intel J3) -> unlock only one * sector. This will unlock all sectors. */ flash_real_protect (&flash_info[i], 0, 0); flash_info[i].legacy_unlock = 1; /* * Manually mark other sectors as unlocked (unprotected) */ for (k = 1; k < flash_info[i].sector_count; k++) flash_info[i].protect[k] = 0; } else { /* * No legancy unlocking -> unlock all sectors */ flash_protect (FLAG_PROTECT_CLEAR, flash_info[i].start[0], flash_info[i].start[0] + flash_info[i].size - 1, &flash_info[i]); } }#endif /* CFG_FLASH_PROTECTION */ } /* Monitor protection ON by default */#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1, flash_get_info(CFG_MONITOR_BASE));#endif /* Environment protection ON by default */#ifdef CFG_ENV_IS_IN_FLASH flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, flash_get_info(CFG_ENV_ADDR));#endif /* Redundant environment protection ON by default */#ifdef CFG_ENV_ADDR_REDUND flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, flash_get_info(CFG_ENV_ADDR_REDUND));#endif return (size);}/*----------------------------------------------------------------------- */#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)static flash_info_t *flash_get_info(ulong base){ int i; flash_info_t * info = 0; for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->size && info->start[0] <= base && base <= info->start[0] + info->size - 1) break; } return i == CFG_MAX_FLASH_BANKS ? 0 : info;}#endif/*----------------------------------------------------------------------- */int flash_erase (flash_info_t * info, int s_first, int s_last){ int rcode = 0; int prot; flash_sect_t sect; if (info->flash_id != FLASH_MAN_CFI) { puts ("Can't erase unknown flash type - aborted\n"); return 1; } if ((s_first < 0) || (s_first > s_last)) { puts ("- no sectors to erase\n"); return 1; } prot = 0; for (sect = s_first; sect <= s_last; ++sect) { if (info->protect[sect]) { prot++; } } if (prot) {
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