coms_sencor.c

MT9v111 CMOS摄像头通过ADSP-BF533读入并显示的汇编源程序。

/******************************************************************************************
OPERATION DESCRIPTION

- Open the project "GPIO_ASM.dpj" in the VisualDSP Integrated Development Environment (IDDE).
- Under the "Project" tab, select "Build Project" (program is then loaded automatically into DSP).
- Select "Run" from the "Debug" tab on the menu bar of VisualDSP.
- When video capture finished, Ouput Window will print"The DMA0 PPI Interrupt has been entered!"
- User can see the video in "View" tab-->"Debug Windows"-->"Image Viewer".
*****************************************************************************************/

#include "I2C.h"
#include "stdio.h"
#include "sys\exception.h"
#include "cpld.h"

#define RAM_Length 720
#define RAM_Length_y 288



EX_INTERRUPT_HANDLER(DMA0_PPI_ISR);

void Init_EBIU(void);
void Init_CPLD(void);
void Init_PLL(void);
void Init_SDRAM(void);
void Init_PPI(void);
void Init_DMA(void);
                                                               
unsigned short PPI_DMA_DONE;
unsigned char dataIn[40];

main()
{
	int o = 0;
	bool ret = true;				                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    

   Init_PLL(); 
    Init_EBIU();
    Init_SDRAM();
  
   
    //Initial Interrupt 
    register_handler(ik_ivg8,DMA0_PPI_ISR);
    *pSIC_IMASK = 0x00000100;
	
   
    Init_CPLD();

	
    I2C_Init(MT9V111_IDENT_W);
    
 	I2C_Write(0x00,0x04,0x01);//CORE

	I2C_Read(&dataIn[0],&dataIn[1],0x36);
	I2C_Read(&dataIn[2],&dataIn[3],0x03);
	I2C_Read(&dataIn[4],&dataIn[5],0x04);
	I2C_Read(&dataIn[6],&dataIn[7],0x07);
	
	I2C_Write(0x00,0x01,0x01);//IFP
	
	I2C_Write(0x01,0x60,0xa7);
	I2C_Write(0x01,0x20,0xaa);
	
	
	I2C_Write(0x01,0x02,0x3a);

	
	I2C_Read(&dataIn[8],&dataIn[9],0x08);
	
	
	
	

	
	if((dataIn[0] != 0x82) || (dataIn[1] != 0x3a))
	{
		while(1);
	}
	

		Init_DMA();
		Init_PPI();
	
		*pDMA0_CONFIG = *pDMA0_CONFIG | 0x0001;
		ssync();
		*pPPI_CONTROL = *pPPI_CONTROL | 0x0001;
		ssync();
	


	
		while(1);

}


void Init_CPLD(void)
{ 
	int i;
	
	*pCtrlReg1 = 0x30;
	for(i = 0;i < 10000;i++);
	*pCtrlReg2 = 0x01;

	
}

void Init_EBIU(void)
{
	
	*pEBIU_AMBCTL0	= 0x7bb07bb0;	// <--|Write access time = 7 cycles, read access time = 11 cycles, no ARDY
	*pEBIU_AMBCTL1	= 0x7bb07bb0;	//    |Hold time = 2 cycles, setup time = 3 cycles, transition time = 4 cycles
	*pEBIU_AMGCTL	= 0x000F;		//	  |Enable all memory banks

}//end Init_EBIU

void Init_PLL(void)
{
    int iIMASK_Value;
	sysreg_write(reg_SYSCFG, 0x32);		//Initialize System Configuration Register

	// set VCO/CCLK = 1, and VCO/SCLK = 5 (take effect immediately)
	*pPLL_DIV = 0x0004;

	// prepare PLL changes (set CLKIN/VCO = 18; takes effect after PLL programming sequence)
	*pPLL_LOCKCNT	= 0x0200;					// time for PLL to stabilize
	*pPLL_CTL		= 0x2400;					// set VCO/CLKIN = 18

	// execute PLL programming sequence
	*pSIC_IWR		= 0x00000001;				// enable only PLL wakeup interrupt
	iIMASK_Value	= cli();					// disable interrupts
	idle();										// wait for PLL wakeup interrupt
	sti(iIMASK_Value);	


}//end Init_PLL 



void Init_SDRAM(void)
{

	//SDRAM Refresh Rate Control Register
	*pEBIU_SDRRC = 0x00000817;	

	//SDRAM Memory Bank Control Register
	*pEBIU_SDBCTL = 0x00000013;

	//SDRAM Memory Global Control Register	
	*pEBIU_SDGCTL = 0x0091998d;	
														
		

}//end Init_SDRAM




void Init_PPI(void)
{

	//The PPI is set to receive 525 lines for each frame
	*pPPI_FRAME = 288;
	*pPPI_COUNT = 703;
	//*pPPI_COUNT = 640;
	*pPPI_DELAY = 0;
	//PPI enabled, input mode, active video only, receive field 1&2, 
	//packing enabled, DMA32 enabled, skipping disabled, 8bit data bus, nothing inverted
	*pPPI_CONTROL = 0x001c;//0x001c;
	//*pPPI_CONTROL = 0x003c;
	 
	/************NEW for test**************/ 
	
	//*pPPI_COUNT = 720;
//	*pPPI_CONTROL = 0x01fd;
	
}

void Init_DMA(void)
{

	//Target address of the DMA
	*pDMA0_START_ADDR = 0x0;	

	//RAM_Length 32bit transfers will be executed
	*pDMA0_X_COUNT = 352;

	//The modifier is set to 4 because of the 32bit transfers
	*pDMA0_X_MODIFY = 0x1;
	*pDMA0_Y_COUNT	= 4000;
	*pDMA0_Y_MODIFY = 0x1;													

	//PPI Peripheral is used
	*pDMA0_PERIPHERAL_MAP = 0x0;	
	
	//DMA Config: Enable DMA | Memory write DMA | Discard DMA FIFO before start | enable assertation of interrupt | NDSIZE for stop mode | Enable STOP DMA
	//Enable 2D-DMA
	*pDMA0_CONFIG = 0x00b2;//0x00ba;	
	//*pDMA0_CONFIG = DMAEN | DI_EN | WNR | WDSIZE_32 | RESTART | DMA2D ;//| DI_SEL;	
	

}//end Init_DMA

EX_INTERRUPT_HANDLER(DMA0_PPI_ISR)	// <--|declaration in  exception.h -->
{
//disable the interrupt request
        	*pDMA0_IRQ_STATUS = 0x1;   // to clear interrupt bit	
	        //temp2 = *pPPI_CONTROL;
	        *pPPI_CONTROL &= 0xfffe;
	       printf( "\nThe DMA0 PPI Interrupt has been entered!\n" );
	      // PPI_DMA_DONE = 1;
}