📄 nrf24l01.lst
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159 1 unsigned char revale=0;
160 1 sta=SPI_Read(STATUS); // 读取状态寄存其来判断数据接收状况
161 1 if(RX_DR) // 判断是否接收到数据
162 1 {
163 2 CE = 0; //SPI使能
164 2 inerDelay_us(DELAY);
165 2 SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
166 2 revale =1; //读取数据完成标志
167 2 }
168 1 SPI_RW_Reg(WRITE_REG+STATUS,sta); //接收到数据后RX_DR,TX_DS,MAX_PT都置高为1，通过写1来清楚中断标志
169 1 return revale;
170 1 }
171 /*********************************************************************************************************
-**
172 /*函数：void nRF24L01_TxPacket(unsigned char * tx_buf)
173 /*功能：发送 tx_buf中数据
174 /*********************************************************************************************************
-*/
C51 COMPILER V9.00 NRF24L01 07/18/2012 17:58:49 PAGE 4
175 void nRF24L01_TxPacket(unsigned char * tx_buf)
176 {
177 1 CE=0; //StandBy I模式
178 1 inerDelay_us(DELAY);
179 1 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // 装载接收端地址
180 1 SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH); // 装载数据
181 1 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // IRQ收发完成中断响应，16位CRC，主发送
182 1 CE=1; //置高CE，激发数据发送
183 1 inerDelay_us(130);
184 1 }
185
186 void nRF24L01_Initial(void)
187 {
188 1 CE=0;// chip enable
189 1 CSN=1;// Spi disable
190 1 SCK=0;// Spi clock line init high
191 1 MOSI = 1;//mosi input
192 1 IRQ = 1;//IRQ input
193 1
194 1 }
195 /**************************************************
196 Function: RX_Mode();
197
198 Description:
199 This function initializes one nRF24L01 device to
200 RX Mode, set RX address, writes RX payload width,
201 select RF channel, datarate & LNA HCURR.
202 After init, CE is toggled high, which means that
203 this device is now ready to receive a datapacket. */
204 /**************************************************/
205 /*
206 void RX_Mode(void)
207 {
208 CE=0;
209 inerDelay_us(10);
210 // DI();
211 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); // Use the same address on the RX devic
-e as the TX device
212
213 //SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
214 SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); // disable Auto.Ack:Pipe0
215 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
216 SPI_RW_Reg(WRITE_REG + SETUP_AW, 0x03);//5byte的地址
217 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x00);//禁止重发
218 SPI_RW_Reg(WRITE_REG + RF_CH, 20); // Select RF channel 2440M
219 SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
220 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
221 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enable
-d..
222 // EI();
223 CE=1;
224 inerDelay_us(500);
225 //IE0 = 0;
226 // This device is now ready to receive one packet of 16 bytes payload from a TX device sending to addres
-s
227 // '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
228
229 }*/
230 void RX_Mode(void)
231 {
232 1 CE=0;
233 1 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH);
C51 COMPILER V9.00 NRF24L01 07/18/2012 17:58:49 PAGE 5
234 1 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
235 1 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
236 1 SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
237 1 SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); //& Prim:RX. RX_DR enabled..
238 1 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);
239 1 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);
240 1 CE = 1;
241 1 }
242 /**************************************************/
243
244 /**************************************************
245 Function: TX_Mode();
246
247 Description:
248 This function initializes one nRF24L01 device to
249 TX mode, set TX address, set RX address for auto.ack,
250 fill TX payload, select RF channel, datarate & TX pwr.
251 PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
252
253 ToDo: One high pulse(>10us) on CE will now send this
254 packet and expext an acknowledgment from the RX device. */
255 /**************************************************/
256 /*
257 void TX_Mode(unsigned char *Rf_Send_Buf)
258 {
259 CE=0;
260 inerDelay_us(10);
261 SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // Writes TX_Address to nRF24L01
262 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
263 //SPI_Write_Buf(WR_TX_PLOAD, Buffer, TX_PLOAD_WIDTH); // Writes data to TX payload
264 SPI_Write_Buf(WR_TX_PLOAD, Rf_Send_Buf, TX_PLOAD_WIDTH); // Writes data to TX payload
265 //SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
266 SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); // disable Auto.Ack:Pipe0
267 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
268 SPI_RW_Reg(WRITE_REG + SETUP_AW, 0x03);//5byte的地址
269 //SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
270 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x00);//禁止重发
271 SPI_RW_Reg(WRITE_REG + RF_CH, 20); // Select RF channel 2440M
272 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
273 SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); //设置发送数据长度，本次设置为32字节
274 //SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT &
-TX_DS enabled..
275 SPI_RW_Reg(WRITE_REG + CONFIG, 0x3e);//
276 CE=1;
277 inerDelay_us(500);
278 SPI_RW_Reg(FLUSH_TX, 0x00);
279 SPI_RW_Reg(WRITE_REG + STATUS, 0x70);//RESET INTTERUPT
280 //IE0 = 0;
281 }
282 */
283 void TX_Mode(unsigned char *Rf_Send_Buf)
284 {
285 1 CE=0;
286 1
287 1 SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);
288 1 SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH);
289 1 SPI_Write_Buf(WR_TX_PLOAD, Rf_Send_Buf, TX_PLOAD_WIDTH); // Writes data to TX payload
290 1
291 1 SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
292 1 SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
293 1 SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
294 1 SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
C51 COMPILER V9.00 NRF24L01 07/18/2012 17:58:49 PAGE 6
295 1 SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
296 1 SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);
297 1 CE=1;
298 1 inerDelay_us(130);
299 1 }
300 void rec_rf_data(unsigned char *Rf_Rec_Buf)
301 {
302 1 SPI_Read_Buf(RD_RX_PLOAD,Rf_Rec_Buf,TX_PLOAD_WIDTH);
303 1 RX_Mode();
304 1 SPI_RW_Reg(WRITE_REG + STATUS, 0x70);//RESET INTTERUPT
305 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 653 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- 25
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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