📄 candrv.h
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/* CANDrv.h - MC523x internal Flec_can header file */
/* Copyright 2005 ZHUHAI UNITECH POWER TECHNOLOGY CO.,LTD */
/*
modification history
--------------------
*/
/*
This file contains constants and defines for the CAN contained .
Flex_can has 16 MBs in all,MB0 is used as Tx and MB1 as Rx,others is not used.
*/
#ifndef __INCCANDrvh
#define __INCCANDrvh
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include "iosLib.h"
#include "semLib.h"
#include "m523x.h"
#include "config.h"
#include "configAll.h"
#ifndef CAN_YES
#define CAN_YES 1
#endif
#ifndef CAN_NO
#define CAN_NO 0
#endif
#define NUM_CAN 1
#define CAN0_MB0_INTVEC 136
#define CAN0_MB1_INTVEC 137
#define CAN1_MB0_INTVEC 107
#define CAN1_MB1_INTVEC 108
#define CAN_DEFAULT_BAUD 500000
#define MCR_MDIS (1 << 31)
#define MCR_MENE (0 << 31)
#define MCR_FRZ (1 << 30)
#define MCR_HALT (1 << 28)
#define MCR_NOTRDY (1 << 27)
#define MCR_SOFTRST (1 << 25)
#define MCR_FRZACK (1 << 24)
#define MCR_SUPV (1 << 23)
#define MCR_MAXMB (1 << 0)
#define RJW 1
#define PSEG1 2
#define PSEG2 2
#define PROPSEG 2
#define CLK_SRC 1
#define SMP 1
#define NUM_TIME_QUANTA (1+PSEG1+1+PSEG2+1+PROPSEG+1)
#define PRESDIV (MASTER_CLOCK/NUM_TIME_QUANTA/CAN_DEFAULT_BAUD-1)
#define PRESDIV1(x) (MASTER_CLOCK/NUM_TIME_QUANTA/(x)-1)
#define CTRL_PRESDIV ( PRESDIV << 24)
#define CTRL_RJW ( RJW << 22)
#define CTRL_PSEG1 ( PSEG1 << 19)
#define CTRL_PSEG2 ( PSEG2 << 16)
#define CTRL_CLK_SRC ( CLK_SRC << 13)
#define CTRL_SMP ( SMP << 7 )
#define CTRL_PROPSEG ( PROPSEG << 0 )
#define TX_NOTENABLE (8 << 8)
#define TX_ENABLE (12 << 8)
#define RX_NOTENABLE (0 << 8)
#define RX_ENABLE (4 << 8)
#define DEFAULT_LENGTH (8 << 0)
#define CAN_NAME_BASE "/can/"
#define MAX_TX_BUFFER 512
#define MAX_RX_BUFFER 512
#define CANDEV_READ(x) (*x) /* argument is register pointer */
#define CANDEV_WRITE(x,y) (*x = y) /* args are reg ptr and data */
#define CAN0_TX_INT_STATUS 0x0001
#define CAN0_RX_INT_STATUS 0x0002
#define CAN1_TX_INT_STATUS 0x0001
#define CAN1_RX_INT_STATUS 0x0002
#define CAN_BAUD_SET 1001
#define CAN_BAUD_GET 1002
#define CAN_TXID_SET 1003
#define CAN_TXID_GET 1004
#define CAN_RXID_SET 1005
#define CAN_RXID_GET 1006
extern int Tx_count;
extern int Rx_count;
extern int CanDrvNum;
typedef struct
{
DEV_HDR pCANHDR;
UINT32 clkRate; /* system clock rate */
UINT32 baudRate; /* Flexcan module baud rate */
UINT32 TxID; /* Flexcan Tx ID */
UINT32 RxID; /* Flexcan Tx ID */
UINT32 Flag_canOpen; /* Flexcan DEV open flag*/
UCHAR tx_Buff[MAX_TX_BUFFER];
UCHAR *ptx; /*发送缓冲区中当前发送指针*/
UINT16 tx_number; /*发送缓冲区中尚未发送数据的个数*/
UINT16 tx_length; /*当前发送的数据长度*/
UCHAR rx_Buff[MAX_TX_BUFFER];
UCHAR *prx_write; /*接收缓冲区中当前写指针*/
UCHAR *prx_read; /*接收缓冲区中当前读指针*/
UINT16 rx_number; /*接收缓冲区中尚未读的数据的个数*/
UINT16 rx_length; /*当前接收的数据长度*/
SEM_ID tx_semSync;
SEM_ID rx_semSync;
volatile UINT32 *mcr; /* Flexcan module configuation register */
volatile UINT32 *ctrl; /* Flexcan module control register */
volatile UINT32 *timer; /* Flexcan free running timer rigster */
volatile UINT32 *rxgmask; /* Flexcan Rx global mask rigster used for 0-13 */
volatile UINT32 *rx14mask; /* Flexcan Rx mask rigster used for 14 */
volatile UINT32 *rx15mask; /* Flexcan Rx mask rigster used for 15 */
volatile UINT32 *errcnt; /* Flexcan error counter rigster */
volatile UINT32 *errstat; /* Flexcan error and status rigster */
volatile UINT16 *imask; /* Flexcan interrupt mask rigster */
volatile UINT16 *iflag; /* Flexcan interrupt flag rigster */
volatile UINT16 *txcode; /* MB0's missage buffer code */
volatile UINT16 *txlength; /* MB0's data length */
volatile UINT16 *txtimestamp; /* MB0'S timer stamp */
volatile UINT32 *txID; /* MB0'S standard ID */
volatile UCHAR *txdata0; /* MB0'S data byte 0 */
volatile UCHAR *txdata1; /* MB0'S data byte 1 */
volatile UCHAR *txdata2; /* MB0'S data byte 2 */
volatile UCHAR *txdata3; /* MB0'S data byte 3 */
volatile UCHAR *txdata4; /* MB0'S data byte 4 */
volatile UCHAR *txdata5; /* MB0'S data byte 5 */
volatile UCHAR *txdata6; /* MB0'S data byte 6 */
volatile UCHAR *txdata7; /* MB0'S data byte 7 */
volatile UINT16 *rxcode; /* MB1's missage buffer code */
volatile UINT16 *rxlength; /* MB1's data length */
volatile UINT16 *rxtimestamp; /* MB1'S timer stamp */
volatile UINT32 *rxID; /* MB1'S standard ID */
volatile UCHAR *rxdata0; /* MB1'S data byte 0 */
volatile UCHAR *rxdata1; /* MB1'S data byte 1 */
volatile UCHAR *rxdata2; /* MB1'S data byte 2 */
volatile UCHAR *rxdata3; /* MB1'S data byte 3 */
volatile UCHAR *rxdata4; /* MB1'S data byte 4 */
volatile UCHAR *rxdata5; /* MB1'S data byte 5 */
volatile UCHAR *rxdata6; /* MB1'S data byte 6 */
volatile UCHAR *rxdata7; /* MB1'S data byte 7 */
volatile UINT16 *mb2code; /* MB2's missage buffer code */
volatile UINT16 *mb2length; /* MB2's data length */
volatile UINT16 *mb2timestamp; /* MB2'S timer stamp */
volatile UINT32 *mb2ID; /* MB2'S standard ID */
volatile UCHAR *mb2data0; /* MB2'S data byte 0 */
volatile UCHAR *mb2data1; /* MB2'S data byte 1 */
volatile UCHAR *mb2data2; /* MB2'S data byte 2 */
volatile UCHAR *mb2data3; /* MB2'S data byte 3 */
volatile UCHAR *mb2data4; /* MB2'S data byte 4 */
volatile UCHAR *mb2data5; /* MB2'S data byte 5 */
volatile UCHAR *mb2data6; /* MB2'S data byte 6 */
volatile UCHAR *mb2data7; /* MB2'S data byte 7 */
volatile UINT16 *mb3code; /* MB3's missage buffer code */
volatile UINT16 *mb3length; /* MB3's data length */
volatile UINT16 *mb3timestamp; /* MB3'S timer stamp */
volatile UINT32 *mb3ID; /* MB3'S standard ID */
volatile UCHAR *mb3data0; /* MB3'S data byte 0 */
volatile UCHAR *mb3data1; /* MB3'S data byte 1 */
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