reset.s

完整的Bell实验室的嵌入式文件系统TFS

/* reset.s:
 * First bit of boot code run by the processor.
 *
 * General notice:
 * This code is part of a boot-monitor package developed as a generic base
 * platform for embedded system designs.  As such, it is likely to be
 * distributed to various projects beyond the control of the original
 * author.  Please notify the author of any enhancements made or bugs found
 * so that all may benefit from the changes.  In addition, notification back
 * to the author will allow the new user to pick up changes that may have
 * been made by other users after this version of the code was distributed.
 *
 * Author:  Ed Sutter
 * email:   [e-mail]      (home: [e-mail])
 * phone:   [phone]            (home: 908-889-5161)
 *
 * Notes:
 * The following registers are understood by GAS for ColdFire...
 *  cacr(0x002), tc(0x003), acr0(0x004), acr1(0x005), acr2(0x006),
 *  acr3(0x007), vbr(0x801), rombar(0xC00), rambar0(0xC04),
 *  rambar1(0xC05), mbar(0xC0F)
 *
 * Good contact for Coldfire information:
 *  David Fiddes, CALM Software Production Officer
 *  Department of Mathematics, Heriot-Watt University, Edinburgh
 *  email [e-mail] - Tel: [phone]
 *  Motorola ColdFire Info : http://www.calm.hw.ac.uk/davidf/coldfire
 */
    
    .file   "reset.s"

    .equ IMMaddr,0xf0000000
    .equ SRAMaddr,0xe0000000    /* Base address of .5K of internal SRAM */
    .equ SRAMsize,512
    .equ STACKsize,2048
    .equ STACKtop,STACKsize-4
    .equ INITIALIZE,3           /* Copied from cpu.h */

    .align  2
    .bss
    .comm   MonStack, STACKsize

    .global coldstart
    .global warmstart
    .global moncomptr
    .global resetSP
    .global resetPC
    .extern moncom

    .text

/* This piece of text must reside at 0xffe00000, the reset vector location
 * used by the MCF5206 Coldfire.  When reset, the CPU looks to the first
 * two long locations for initial SP and PC.
 * Immediately following this is the moncomptr tag.  This is here so that
 * it will not change location through different monitor rebuilds.
 */
resetSP:
    .long   SRAMaddr+SRAMsize   /* Initial SP = end of internal SRAM */
resetPC:
    .long   coldstart           /* Initial PC */

moncomptr:                      /* Pointer to the moncom function, used */
    .long   moncom              /* to link application to monitor. */

coldstart:
    move.l      #INITIALIZE,%d5
    jmp         continue;

    /* The tag "warmstart" is called by 'C', so put the argument into reg D5.
     * The content of D5 must be preserved until start() is called so
     * that it can be used as the argument passed into start().
     */
warmstart:
    move.l      %sp@(4),%d5

continue:
    move.w      #0x2700,%SR

    /* Bug in MCF52xx.  VBR only updated from A7 */
    move.l      #0,%d0
    move.l      %d0,%a7
    movec       %a7,%VBR

    /* Invalidate the cache and disable it */
    move.l      #0x01000000,%d0
    movec       %d0,%cacr

    /* Disable ACRs */
    moveq.l     #0,%d0
    movec       %d0,%ACR0
    movec       %d0,%ACR1

    /* Initialize RAMBAR (chapter 5 of users manual)
     * At reset, the internal .5K of SRAM is inaccessible.  It must be
     * assigned a base address and declared valid...
     */
    move.l      #SRAMaddr+0x00000001,%d0
    movec       %d0,%RAMBAR0

    /* Initialize MBAR (see chapter 7 of users manual) */
    move.l      #IMMaddr+0x00000001,%d0     /* locate MBAR, validate it! */
    movec       %d0,%MBAR
    nop
    nop

    /* Point SP into SRAM (temporarily).  SRAM is used as stack space
     * while initializing the MCF5206 periphs and memory controller.
     */
    move.l      #SRAMaddr+SRAMsize,%SP

    jsr         mcf5206_init            /* Initialize MCF5206 periphs, etc. */
    jsr         mcf5206_cs_init         /* Setup chip selects. */
    jsr         mcf5206_dramc_init      /* Setup DRAM controller. */

    /* Point SP to DRAM.  DRAM may only be visible once CS0
     * de-activated as global chipselect.
     */
    move.l      #MonStack+STACKtop,%sp

    move.l      %d5,%sp@-
    jsr         start

    /* Should never get here: */
badnews:
    nop
    jmp         badnews



/* Miscellaneous assembler functions: */

    .global putsr
    .global getsr
    .global getsp

putsr:
    move.l      %sp@(4),%d0
    move.w      %d0,%sr
    rts
    
getsr:
    move.l      #0,%d0
    move.w      %sr,%d0
    rts

getsp:
    move.l      %sp,%d0
    rts