📄 asm_ppc.s
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/* * This source code has been made available to you by IBM on an AS-IS * basis. Anyone receiving this source is licensed under IBM * copyrights to use it in any way he or she deems fit, including * copying it, modifying it, compiling it, and redistributing it either * with or without modifications. No license under IBM patents or * patent applications is to be implied by the copyright license. * * Any user of this software should understand that IBM cannot provide * technical support for this software and will not be responsible for * any consequences resulting from the use of this software. * * Any person who transfers this source code or any derivative work * must include the IBM copyright notice, this paragraph, and the * preceding two paragraphs in the transferred software. * * COPYRIGHT I B M CORPORATION 1992, 1999 * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M * * General notice: * This code is part of a boot-monitor package developed as a generic base * platform for embedded system designs. As such, it is likely to be * distributed to various projects beyond the control of the original * author. Please notify the author of any enhancements made or bugs found * so that all may benefit from the changes. In addition, notification back * to the author will allow the new user to pick up changes that may have * been made by other users after this version of the code was distributed. * * Note1: the majority of this code was edited with 4-space tabs. * Note2: as more and more contributions are accepted, the term "author" * is becoming a mis-representation of credit. * * Original author: Ed Sutter * Email: esutter@lucent.com * Phone: 908-582-2351 */#include "arch_ppc.h"/* * Function: ppcAbend * Description: Execute an invalid op code, causing a Program Check Interrupt * Input: none * Output: none */ .text .align 2 .globl ppcAbendppcAbend: .long 0/* * Function: ppcAndMsr * Description: AND With Machine State Register (MSR) * Input: r3 = value to AND with MSR * Output: r3 = old MSR contents */ .text .align 2 .globl ppcAndMsrppcAndMsr: mfmsr r6 and r7,r6,r3 mtmsr r7 ori r3,r6,0x000 blr/* * Function: ppcCntlzw * Description: Count Leading Zeros * Input: r3 = input value * Output: r3 = number of leading zeroes in the input value */ .text .align 2 .globl ppcCntlzwppcCntlzw: cntlzw r3,r3 blr/* * Function: ppcDcbi * Description: Data Cache block Invalidate * Input: r3 = effective address * Output: none. */ .text .align 2 .globl ppcDcbippcDcbi: dcbi r0,r3 blr/* * Function: ppcDcbf * Description: Data Cache block flush * Input: r3 = effective address * Output: none. */ .text .align 2 .globl ppcDcbfppcDcbf: dcbf r0,r3 blr/* * Function: ppcDcbst * Description: Data Cache block Store * Input: r3 = effective address * Output: none. */ .text .align 2 .globl ppcDcbstppcDcbst: dcbst r0,r3 blr/* * Function: ppcDcbz * Description: Data Cache Block set to Zero * Input: r3 = effective address * Output: none. */#ifndef PASS1_405GP .text .align 2 .globl ppcDcbzppcDcbz: dcbz r0,r3 blr#endif/* * Function: ppcHalt * Description: Halt Pseudo-Op * Input: none. * Output: none. */ .text .align 2 .globl ppcHaltppcHalt: b ppcHalt/* * Function: ppcIsync * Description: Instruction Cache Synchronize * Input: none. * Output: none. */ .text .align 2 .globl ppcIsync ppcIsync: isync blr/* * Function: ppcIcbi * Description: Instruction Cache Block Invalidate * Input: r3 = effective address * Output: none. */ .text .align 2 .globl ppcIcbippcIcbi: icbi r0,r3 blr/* * Function: ppcMfgpr1 * Description: Move From gpr1 * Input: none * Output: r3 = gpr1 */ .text .align 2 .globl ppcMfgpr1ppcMfgpr1: ori r3,r1,0x0000 blr/* * Function: ppcMfgpr2 * Description: Move From gpr2 * Input: none * Output: r3 = gpr2 */ .text .align 2 .globl ppcMfgpr2ppcMfgpr2: ori r3,r2,0x0000 blr/* * Function: ppcMfmsr * Description: Move From Machine State Register * Input: none * Output: r3 = msr */ .text .align 2 .globl ppcMfmsrppcMfmsr: mfmsr r3 blr/* * Function: ppcMfsprg0 * Description: Move From SPRG0 * Input: none * Output: r3 = sprg0 */ .text .align 2 .globl ppcMfsprg0ppcMfsprg0: mfspr r3,sprg0 blr/* * Function: ppcMfsprg1 * Description: Move From SPRG1 * Input: none * Output: r3 = sprg1 */ .text .align 2 .globl ppcMfsprg1ppcMfsprg1: mfspr r3,sprg1 blr/* * Function: ppcMfsprg2 * Description: Move From SPRG2 * Input: none * Output: r3 = sprg2 */ .text .align 2 .globl ppcMfsprg2ppcMfsprg2: mfspr r3,sprg2 blr/* * Function: ppcMfsprg3 * Description: Move From SPRG3 * Input: none * Output: r3 = sprg3 */ .text .align 2 .globl ppcMfsprg3ppcMfsprg3: mfspr r3,sprg3 blr/* * Function: ppcMfsrr0 * Description: Move From SRR0 * Input: none * Output: r3 = srr0 */ .text .align 2 .globl ppcMfsrr0ppcMfsrr0: mfsrr0 r3 blr/* * Function: ppcMfsrr1 * Description: Move From SRR1 * Input: none * Output: r3 = srr1 */ .text .align 2 .globl ppcMfsrr1ppcMfsrr1: mfsrr1 r3 blr/* * Function: ppcMfpvr * Description: Move From PVR * Input: none * Output: r3 = tid */ .text .align 2 .globl ppcMfpvrppcMfpvr: mfpvr r3 blr/* * Function: ppcMtmsr * Description: Move To Machine State Register * Input: none * Output: r3 = msr */ .text .align 2 .globl ppcMtmsrppcMtmsr: mtmsr r3 blr/* * Function: ppcMtsprg0 * Description: Move To SPRG0 * Input: r3 = value to be moved to sprg0 * Output: none */ .text .align 2 .globl ppcMtsprg0ppcMtsprg0: mtspr sprg0,r3 blr/* * Function: ppcMtsprg1 * Description: Move To SPRG1 * Input: r3 = value to be moved to sprg1 * Output: none */ .text .align 2 .globl ppcMtsprg1ppcMtsprg1: mtspr sprg1,r3 blr/* * Function: ppcMtsprg2 * Description: Move To SPRG2 * Input: r3 = value to be moved to sprg2 * Output: none */ .text .align 2 .globl ppcMtsprg2ppcMtsprg2: mtspr sprg2,r3 blr/* * Function: ppcMtsprg3 * Description: Move To SPRG3 * Input: r3 = value to be moved to sprg3 * Output: none */ .text .align 2 .globl ppcMtsprg3ppcMtsprg3: mtspr sprg3,r3 blr/* * Function: ppcMtsrr0 * Description: Move To SRR0 * Input: r3 = value to be moved to SRR0 * Output: none */ .text .align 2 .globl ppcMtsrr0ppcMtsrr0: mtsrr0 r3 blr/* * Function: ppcMtsrr1 * Description: Move To SRR1 * Input: r3 = value to be moved to SRR1 * Output: none */ .text .align 2 .globl ppcMtsrr1ppcMtsrr1: mtsrr1 r3 blr/* * Function: ppcMtevpr * Description: Move To EVPR * Input: r3 = value to be moved to EVPR * Output: none */ .text .align 2 .globl ppcMtevprppcMtevpr: mtspr evpr,r3 blr/* * Function: ppcMfevpr * Description: Move From EVPR * Input: r3 = value to be moved from EVPR * Output: none */ .text .align 2 .globl ppcMfevprppcMfevpr: mfspr r3,evpr blr/* * Function: ppcMtdccr * Description: Move To DCCR * Input: none */ .text .align 2 .globl ppcMtdccrppcMtdccr: mtspr dccr,r3 blr/* * Function: ppcMticcr * Description: Move To ICCR * Input: none */ .text .align 2 .globl ppcMticcrppcMticcr: mtspr iccr,r3 blr/* * Function: ppcMficcr * Description: Move From ICCR * Input: r3 = value to be moved from ICCR * Output: none */ .text .align 2 .globl ppcMficcrppcMficcr: mfspr r3,iccr blr/* * Function: ppcMfdccr * Description: Move From DCCR * Input: r3 = value to be moved from DCCR * Output: none⌨️ 快捷键说明
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