📄 smc.c
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Module Name:
Abstract:
Routines for the SMC9000 ethernet controller used for the Windows CE
debug ethernet services, and bootloaders.
Functions:
Notes:
These routines are called at system init and other times when system calls aren't allowed, so
they can't make any system calls.
--*/
// Note : The Odo SMC implementation sometimes encounters read errors if we
// optimize this routine. So for now I'm just going to turn of all
// optimizations.
#pragma optimize("", off)
#include <windows.h>
#include <halether.h>
#include "smchw.h"
#include "smcsw.h"
#include "..\eboot\udp.h"
// The base address of the SMC registers. Also, allow for a multiplier, since the Odo
// platform uses 32 bit accesses of the registers.
static BYTE volatile *pbEthernetBase;
static DWORD dwRegisterMultiplier;
#define ReadWord( wOffset ) READ_PORT_USHORT((PUSHORT)(pbEthernetBase + (wOffset*dwRegisterMultiplier)))
#define WriteWord( wOffset, Value ) WRITE_PORT_USHORT((PUSHORT)(pbEthernetBase + (wOffset*dwRegisterMultiplier)),(USHORT)(Value))
// If this is defined, broadcast frames will be discarded. Since we need to process
// ARPs, leave broadcast filter off, and filter out packets as soon as we can. This, since
// we have to take an interrupt anyway, looking at the first few bytes isn't that bad. If
// the SMC chip could be configured so that we didn't even get interrupts for broadcast
// packets, we might look at updating the ARP cache on the desktop and filtering out all
// broadcasts...
#define NO_BROADCAST 0
#define BROADCAST_FILTER_BIT 0x4000
// If any of the following bits are set in the received status word, discard frame
#if NO_BROADCAST
#define FRAME_FILTER (0xAC00 | BROADCAST_FILTER_BIT) // No broadcast
#else
#define FRAME_FILTER 0xAC00 // Allow broadcast
#endif
// For debugging, if defined, this will cause all Rx/Tx data to be dumped to debug serial port
#undef SMC_DUMP_FRAMES
// Mask to use for interrupts
static UINT16 wIntMask;
// Controls whether we filter out broadcast packets (except ARP requests...)
static DWORD dwConfigOptions;
static void SendFrameError( char *pszPrefix, UINT16 wCompletionCode );
#ifdef SMC_DUMP_FRAMES
static void DumpEtherFrame( BYTE *pFrame, WORD cwFrameLength );
#endif
// This is called to initialze the ethernet low level driver. The base address of the ethernet hardware
// is passed into the routine. The routine will return TRUE for a successful initialization.
BOOL
SMCInit( BYTE *pbBaseAddress, DWORD dwMultiplier, USHORT MacAddr[3]) {
DWORD dwStartTime;
USHORT wBSR, wConfig;
if (! pbBaseAddress)
return FALSE;
pbEthernetBase = pbBaseAddress;
dwRegisterMultiplier = dwMultiplier;
// DANGER - May have to wait 750 usec after reset while EEPROM info loads (Pg 50 of the SMC91C94 spec).
// until this occurs, SMC registers are inaccessible.
EdbgOutputDebugString("+SMCInit\r\n");
WriteWord( BANKSEL_REG, BANK1 );
dwStartTime = OEMEthGetSecs();
while( ReadWord( CONTROL_REG ) & 0x0003 && OEMEthGetSecs() - dwStartTime < 2);
// Verify the I/O base. The upper byte of the BSR always reads 0x33, use this.
// For Odo, the bus cycles will time out and garbage values will be returned.
wBSR = ReadWord(BANKSEL_REG);
if ((wBSR & 0xFF00) != 0x3300) {
EdbgOutputDebugString("SMC card not detected, I/O base 0x%X, BSR: 0x%X\n",pbEthernetBase,wBSR);
return FALSE;
}
EdbgOutputDebugString( "SMC Ethernet card detected at I/O base 0x%X\r\n",pbEthernetBase);
// Read the MAC address from the 91C94. This should have been read in from the EEPROM during reset
if( NULL != MacAddr ) {
WriteWord( BANKSEL_REG, BANK1 );
MacAddr[0] = ReadWord( MACADDR_REG0 );
MacAddr[1] = ReadWord( MACADDR_REG1 );
MacAddr[2] = ReadWord( MACADDR_REG2 );
EdbgOutputDebugString("SMC Ethernet Address: %B:%B:%B:%B:%B:%B\r\n",
MacAddr[0] & 0x00FF, MacAddr[0] >> 8,
MacAddr[1] & 0x00FF, MacAddr[1] >> 8,
MacAddr[2] & 0x00FF, MacAddr[2] >> 8);
}
// Set SQUELCH bit - this changes the threshold for a valid signal from 300mV to 180mV.
// This is to attempt to fix problems we have seen with some (usually 8 port) hubs.
wConfig = ReadWord(CONFIG_REG);
wConfig |= CFG_SETSQLCH|CFG_NO_WAIT;
WriteWord(CONFIG_REG, wConfig);
EdbgOutputDebugString("SMC config reg val: %X\n",wConfig);
// Initialize the control register
WriteWord( BANKSEL_REG, BANK1 );
WriteWord( CONTROL_REG, CONTROL_REG_INIT );
// Initialize memory configuration register
WriteWord( BANKSEL_REG, BANK0 );
WriteWord( MCR_REG, MCR_REG_INIT );
// Initialize transmit control register
WriteWord( BANKSEL_REG, BANK0 );
WriteWord( TCR_REG, TCR_REG_INIT );
// Initialize interrupt mask register (all ints disabled to start)
WriteWord( BANKSEL_REG, BANK2 );
WriteWord( INTERRUPT_REG, 0);
// The receive register should be the last thing initialzed so that we don't start
// getting Frames before we're ready for them.
// Initialize the Receive Control Register (Pg 39 of the SMC91C94 spec):
WriteWord( BANKSEL_REG, BANK0 );
WriteWord( RCR_REG, RCR_REG_INIT );
EdbgOutputDebugString("SMC Reset complete2\r\n");
// Even if the card is present, it likes to have a second to stabilize before the first transmission
while( OEMEthGetSecs() - dwStartTime < 2 );
EdbgOutputDebugString( "-SMCInit\r\n");
return TRUE;
}
// Interrupts left disabled at init, call this function to turn them on
void
SMCEnableInts()
{
// Only enable receive interrupts (we poll for Tx completion)
wIntMask = RCV_INTM;
WriteWord( BANKSEL_REG, BANK2 );
WriteWord( INTERRUPT_REG, wIntMask );
}
void
SMCDisableInts()
{
wIntMask = 0;
WriteWord( BANKSEL_REG, BANK2 );
WriteWord( INTERRUPT_REG, wIntMask );
}
DWORD
SMCGetPendingInterrupts()
{
WORD wInts;
DWORD dwRet = 0;
UINT16 wBankSave;
// I need to save/restore the affected registers in the 91C94
wBankSave = ReadWord( BANKSEL_REG );
WriteWord( BANKSEL_REG, BANK2 );
wInts = ReadWord(INTERRUPT_REG);
// Just check for Rx int
if (wInts & (RCV_INT | RX_OVRN_INT)) {
dwRet = INTR_TYPE_RX;
}
WriteWord( BANKSEL_REG, wBankSave );
return dwRet;
}
//
// This routine is used by the OAL to configure the debug Ethernet driver. Currently
// the following options are defined:
// OPT_BROADCAST_FILTERING -- If set, filter out all broadcast packets except ARP packets
//
DWORD
SMCSetOptions(DWORD dwOptions)
{
DWORD dwOldOptions = dwConfigOptions;
dwConfigOptions = dwOptions;
return dwOldOptions;
}
static BOOL
SMCReleaseMemory (UINT16 wCmd)
{
DWORD dwStartTime;
// issuem the release command
WriteWord (MMUCOMMAND_REG, wCmd);
// Wait until release finishes executing
dwStartTime = OEMEthGetSecs();
while (ReadWord (MMUCOMMAND_REG) & MMU_CMD_BUSY) {
if ((OEMEthGetSecs() - dwStartTime) > 2) {
EdbgOutputDebugString ("!GetFrame: Timed out releasing memory (wCmd = %u)\n", wCmd);
return FALSE;
}
}
return TRUE;
}
static UINT16
SMCRetrieveFrame (BYTE *pbData, UINT16 *pwLength)
{
UINT16 i, wStatusWord;
UINT16 *pwData = (UINT16 *)pbData;
UINT16 wLen;
// Setup pointer address register to point to first byte of Frame
WriteWord( POINTER_REG, 0xE000 );
// read status and filter frames if error detected
if (!((wStatusWord = ReadWord (DATA_REG)) & FRAME_FILTER)) {
// The top bits of the byte count are reserved, so mask those (pg 26 of SMC91C94 spec).
// The byte count includes the status word, byte count and control byte so subtract 6
wLen = (0x07FF & ReadWord( DATA_REG )) - 6;
EDBG_DEBUGLED(LED_PKTLEN,*pwLength);
if (*pwLength < wLen) {
EdbgOutputDebugString("SMC9000: received packet larger (%u) than buffer (%u)\n",wLen, *pwLength);
return 0x0800; // frame too long
}
// For broadcast frames, filter out all except for ARPs
i=0;
if ((dwConfigOptions & OPT_BROADCAST_FILTERING) && (wStatusWord & BROADCAST_FILTER_BIT)) {
for (; i< sizeof(EthernetFrameHeader); i++)
*pwData++ = ReadWord( DATA_REG );
if (ntohs(((EthernetFrameHeader UNALIGNED *)pbData)->wFrameType) != 0x0806) {
return BROADCAST_FILTER_BIT; // broadcast, not ARPs
}
}
wStatusWord = 0;
*pwLength = wLen; // set return length
// Read all but the last word, which will contain the control word
wLen >>= 1; // in words
EDBG_DEBUGLED(LED_COPY,0);
for( ; i < wLen; i++ )
*pwData++ = ReadWord( DATA_REG );
EDBG_DEBUGLED(LED_COPY,wLen);
// Now check to see if there were an odd number of bytes sent. If so, I have to extract the
// last one (pg 27 of the SCM91C94 spec).
wLen = ReadWord( DATA_REG );
if (wLen & 0x2000) {
*pwData = (BYTE)wLen;
(*pwLength)++;
}
}
return wStatusWord;
}
// This routine is polled to find out if a frame has been received. If there are no frames
// in the RX FIFO, the routine will return 0. If there was a frame that was received correctly,
// it will be stored in pwData, otherwise it will be discarded.
UINT16
SMCGetFrame( BYTE *pbData, UINT16 *pwLength )
{
UINT16 wStatusWord; // some error value
WORD wInt;
EDBG_ADAPTERMSG(ZONE_RECV,("+GetFrame\n"));
EDBG_DEBUGLED(LED_GETFRAME_ENTRY,0);
if ((DWORD) pbData & 1) {
EdbgOutputDebugString ("!SMCGetFrame: Data MUST be 16bit aligned\r\n");
return FALSE;
}
// For the bootloader we don't want to deal with interrupts, so I'll poll the ISR routine
WriteWord( BANKSEL_REG, BANK2 );
WriteWord (INTERRUPT_REG, 0);
do {
wInt = ReadWord (INTERRUPT_REG);
if (wInt & RX_OVRN_INT) {
// ack
WriteWord (INTERRUPT_REG, RX_OVRN_INT);
EDBG_ADAPTERMSG(ZONE_WARNING,("!GetFrame: RX Overrun, wInt = 0x%x\n", wInt));
}
if (!(wInt & RCV_INT)) {
WriteWord (INTERRUPT_REG, wIntMask); // re-enable interrupt
return FALSE; // no data
}
// receive the frame
wStatusWord = SMCRetrieveFrame (pbData, pwLength);
// Release the memory for the received Frame
SMCReleaseMemory (CMD_REM_REL_TOP);
#ifdef SMC_DUMP_FRAMES
DumpEtherFrame(pbData, *pwLength);
#endif
// Check the status word for errors (pg 28 of the SMC91C94 spec).
if (wStatusWord & 0x8000)
EdbgOutputDebugString( "GetFrame() - Receive Alignment Error\n" );
if (wStatusWord & 0x2000)
EdbgOutputDebugString( "GetFrame() - CRC Error\n" );
if (wStatusWord & 0x0800)
EdbgOutputDebugString( "GetFrame() - Frame Was Too Long\n" );
if (wStatusWord & 0x0400)
EdbgOutputDebugString( "GetFrame() - Frame Was Too Short\n" );
// if (wStatusWord & 0x4000)
// EdbgOutputDebugString( "GetFrame() - Broadcast\n" );
} while (wStatusWord);
// re-enable interrupt only if there is no pending frame
if (!(ReadWord (INTERRUPT_REG) & RCV_INT))
WriteWord (INTERRUPT_REG, wIntMask);
// debug message.
EDBG_ADAPTERMSG(ZONE_RECV,("-GetFrame %s, *pwLength = %u\n", wStatusWord? "Fail" : "Success", *pwLength));
EDBG_DEBUGLED(LED_GETFRAME_EXIT, wStatusWord);
if (!wStatusWord && *pwLength>=4)
*pwLength -=4;// Take away CRC
return !wStatusWord;
} // GetFrame()
// This routine should be called with a pointer to the ethernet frame data. It is the caller's
// responsibility to fill in all information including the destination and source addresses and
// the frame type. The length parameter gives the number of bytes in the ethernet frame.
// The routine will not return until the frame has been transmitted or an error has occured. If
// the frame transmits successfully, 0 is returned. If an error occured, a message is sent to
// the serial port and the routine returns non-zero.
UINT16 SMCSendFrame( BYTE *pbData, DWORD dwLength ) {
UINT16 wFrameHandle;
UINT16 cwBufferSize;
UINT16 wCompletionCode = 0;
UINT16 *pwData;
DWORD dwStartTime;
BOOL bErr = FALSE;
UINT16 wInt;
DWORD i;
if ((DWORD) pbData & 1) {
EdbgOutputDebugString ("!SMCSendFrame: Data MUST be 16bit aligned\r\n");
return FALSE;
}
WriteWord( BANKSEL_REG, BANK2 );
WriteWord (INTERRUPT_REG, 0);
EDBG_DEBUGLED(LED_SENDFRAME_ENTRY,0);
EDBG_ADAPTERMSG(ZONE_SEND,("+SendFrame, dwLength: %u\n",dwLength));
#ifdef SMC_DUMP_FRAMES
DumpEtherFrame(pbData, (USHORT)dwLength);
#endif
// Calculate the amount of memory needed. This needs to be rounded up to an even number
cwBufferSize = 2 + 2 + (UINT16)dwLength + 1;
if (cwBufferSize & 1)
cwBufferSize++;
// Allocate memory in the buffer for the Frame
WriteWord( MMUCOMMAND_REG, CMD_ALLOC | (UINT16)(cwBufferSize >> 8) );
// Loop here until the request is satisfied, or we timeout
dwStartTime = OEMEthGetSecs();
while (!(ReadWord( INTERRUPT_REG ) & ALLOC_INT)) {
if (OEMEthGetSecs() - dwStartTime > 2) {
EdbgOutputDebugString("Timed out waiting for ALLOC_INT\n");
// Get the status word so that it can be returned.
WriteWord( POINTER_REG, 0x2000 );
wCompletionCode = ReadWord( DATA_REG );
WriteWord (INTERRUPT_REG, wIntMask);
return wCompletionCode;
}
}
wFrameHandle = (0x3f00 & ReadWord( PNR_ARR_REG )) >> 8;
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