lm_example_ixp23xx.dwp

国内还比较新的network processor的微代码开发

# Developer Workbench Project File
# Format Version 33.12
#********  Do not edit this file ***********

# Begin Project lm_example_ixp23xx
CHIP_FAMILY = 0x10
CHIP_REVISION_NUMBER = 0x0
DEBUG_ONLY = FALSE
PROJECT_PATH = C:\IXA_SDK_4.1\src\EXAMPLES\microcode\local_mem\
MIN_REVISION_NUM = 0
MAX_REVISION_NUM = -1
INCLUDE_STANDARD_LIBRARIES = FALSE
ASSEMBLER_INCLUDE = ..\..\..\library\dataplane_library\microcode\

# Begin Group Source Files

# Begin Source File
PATH = .\lm_example.uc
# End Source File
# End Group Source Files

# Begin Group Script Files
# End Group Script Files

# Begin Debug Startup Options
SIM_PROFILE_STARTED = TRUE
# End Debug Startup Options

# Begin Chip 

# Begin Chip Configuration Info
IO_MODE = 1

# Begin Clock Frequencies
ME_FREQ = 300
XSCALE_FREQ = 600
SRAM_FREQ = 0
DRAM_FREQ = 0
MSF_CCR = 0x00000000
MSF_CLK01_RX_FREQ = 50000
MSF_CLK23_RX_FREQ = 50000
MSF_CLK01_TX_FREQ = 50000
MSF_CLK23_TX_FREQ = 50000
HSS_PORT0_RX_FREQ = 20000
HSS_PORT1_RX_FREQ = 20000
HSS_PORT2_RX_FREQ = 20000
HSS_PORT3_RX_FREQ = 20000
HSS_PORT0_TX_FREQ = 20000
HSS_PORT1_TX_FREQ = 20000
HSS_PORT2_TX_FREQ = 20000
HSS_PORT3_TX_FREQ = 20000
HSS_MATCH_TX_TO_RX = FALSE
# End Clock Frequencies

# Begin Memory Configuration Info
DRAM_SIZE = 64
SRAM_CHANNEL0_PART_COUNT = 1
SRAM_CHANNEL0_PART_SIZE = 64
# End Memory Configuration Info
# End Chip Configuration Info

# Begin MicroEngine 0
# End MicroEngine

# Begin MicroEngine 1
# End MicroEngine

# Begin MicroEngine 2
# End MicroEngine

# Begin MicroEngine 3
# End MicroEngine
# End Chip

# Begin Assembler Settings
ASSEMBLY_REQUIRED = FALSE
ROOT_FILE = .\lm_example.uc
OPTIMIZE = 0
WARNING_LEVEL = 3
CONVERT_WARNINGS = FALSE
REQUIRE_REG_DECLARATIONS = TRUE
CASE_SENSITIVE = TRUE
DEBUG_INFO = TRUE
AUTO_FIX_BANK_CONFLICTS = FALSE
AUTO_SPILL_GPRS = FALSE
OUTPUT = .\lm_example_ixp23xx.list
LOCAL_MEMORY_START = 0
ADDITIONAL_OPTIONS = 
# Begin List File to ME Entry 
NAME = lm_example_ixp23xx.list
CHIP_NUM = 0
ME_ADDR = 
MODE = 2
TYPE = 1
LIST_FILE_PATH = .\lm_example_ixp23xx.list
# End List File to ME Entry
# End Assembler Settings

# Begin Linker Settings
LINK_REQUIRED = FALSE
CHIP_NAME = 
OUTPUT = .\lm_example_ixp23xx
DEBUG_INFO = TRUE
GEN_PROFILE_INFO = TRUE
GEN_HEX_C_FILE = FALSE
SCRATCH_BASE_ADDR = 0x00000000
SCRATCH_SIZE = 0x00004000
SDRAM_BASE_ADDR = 0x00000000
SDRAM_SIZE = 0x80000000
SDRAM_1_BASE_ADDR = 0x00000000
SDRAM_1_SIZE = 0x80000000
SRAM_BANK0_BASE_ADDR = 0x00000000
SRAM_BANK0_SIZE = 0x04000000
SRAM_BANK1_BASE_ADDR = 0x00000000
SRAM_BANK1_SIZE = 0x04000000
SRAM_BANK2_BASE_ADDR = 0x00000000
SRAM_BANK2_SIZE = 0x04000000
SRAM_BANK3_BASE_ADDR = 0x00000000
SRAM_BANK3_SIZE = 0x04000000
GEN_SEG_H_FILE = FALSE
GEN_MEM_MAP_FILE = FALSE
MAP_FILE = .\lm_example_ixp23xx_
# Begin List File to ME Mapper
# Begin List File to ME Entry 
NAME = lm_example_ixp23xx.list
CHIP_NUM = 0
ME_ADDR = 0:0
MODE = 2
TYPE = 1
LIST_FILE_PATH = .\lm_example_ixp23xx.list
# End List File to ME Entry
# Begin List File to ME Entry 
NAME = <none>
CHIP_NUM = 0
ME_ADDR = 0:1
MODE = 0
TYPE = 0
LIST_FILE_PATH = 
# End List File to ME Entry
# Begin List File to ME Entry 
NAME = <none>
CHIP_NUM = 0
ME_ADDR = 0:2
MODE = 0
TYPE = 0
LIST_FILE_PATH = 
# End List File to ME Entry
# Begin List File to ME Entry 
NAME = <none>
CHIP_NUM = 0
ME_ADDR = 0:3
MODE = 0
TYPE = 0
LIST_FILE_PATH = 
# End List File to ME Entry
# End List File to ME Mapper
# End Linker Settings
# End Project