📄 ipsec_example.uc
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//------------------------------------------------------------------------------------
//
// I N T E L P R O P R I E T A R Y
//
// COPYRIGHT (c) 2003 BY INTEL CORPORATION. ALL RIGHTS
// RESERVED. NO PART OF THIS PROGRAM OR PUBLICATION MAY
// BE REPRODUCED, TRANSMITTED, TRANSCRIBED, STORED IN A
// RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER
// LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,
// MAGNETIC, OPTICAL, CHEMICAL, MANUAL, OR OTHERWISE, WITHOUT
// THE PRIOR WRITTEN PERMISSION OF :
//
// INTEL CORPORATION
//
// 2200 MISSION COLLEGE BLVD
//
// SANTA CLARA, CALIFORNIA 95052-8119
//
//------------------------------------------------------------------------------------
/////////////////////////////////////////////////////////////////////////////
#include "stdmac.uc"
#include "crypto.uc"
.sig sig_crypto_write_ram // used to signal when write to crypto ram is done
.sig sig_crypto_load_key // used to signal when key is loaded
.sig sig_crypto_load_iv // used to signal when iv is loaded
.sig sig_crypto_cipher_and_hash // used to signal when cipher and hash is done
.sig sig_crypto_do_hmac_final // used to signal when final HMAC is done
// Only context 0 executes code.
//
br!=ctx[0, end_of_example#]
// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//
ctx0_start#:
.begin
.reg $$IV0 $$IV1
.xfer_order $$IV0 $$IV1
.reg $$Key0 $$Key1 $$Key2 $$Key3 $$Key4 $$Key5
.xfer_order $$Key0 $$Key1 $$Key2 $$Key3 $$Key4 $$Key5
.reg $$Data0 $$Data1 $$Data2 $$Data3 $$Data4 $$Data5 $$Data6 $$Data7 $$Data8 $$Data9 $$Data10 $$Data11
.xfer_order $$Data0 $$Data1 $$Data2 $$Data3 $$Data4 $$Data5 $$Data6 $$Data7 $$Data8 $$Data9 $$Data10 $$Data11
.reg rbuf_address
immed32($$IV0, 0x0) // initialize IV
immed32($$IV1, 0x0)
immed32($$Key0, 0x0) // initialize key
immed32($$Key1, 0x0)
immed32($$Key2, 0x0)
immed32($$Key3, 0x0)
immed32($$Key4, 0x0)
immed32($$Key5, 0x0)
immed32(rbuf_address, 0) // initialize rbuf address
crypto_write_ram( rbuf_address, // in_src_data
0x10, // in_ram_addr
7, // in_ref_count
CRYPTO_UNIT_0, // in_crUnit
sig_crypto_write_ram) // in_signal
crypto_load_key( $$Key0, // in_src_data
3, // in_ref_count
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0, // in_state
sig_crypto_load_key) // in_signal
crypto_load_iv( $$IV0, // in_src_data
1, // in_ref_count
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0, // in_state
sig_crypto_load_iv) // in_signal
ctx_arb[sig_crypto_write_ram, sig_crypto_load_key, sig_crypto_load_iv]
crypto_hash_update( 0x10, // in_ram_addr (SPI and sequence number)
1, // in_ref_count
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0) // in_state
crypto_hash_iv( 1, // in_ref_count
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0) // in_state
crypto_cipher_and_hash( $$Data0, // out_dest_data
0x10, // in_ram_addr
6, // in_ref_count
CRYPTO_CIPHER_ENCRYPT, // in_mode
CRYPTO_CIPHER_NO_CBC, // in_cbc
CRYPTO_CIPHER_3DES, // in_algorithm
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0, // in_state
sig_crypto_cipher_and_hash) // in_signal
ctx_arb[sig_crypto_cipher_and_hash]
crypto_do_hmac_final( $$Data0, // out_dest_data
0x10, // in_ram_addr
CRYPTO_UNIT_0, // in_crUnit
CRYPTO_BANK_0, // in_bank
CRYPTO_STATE_0, // in_state
sig_crypto_do_hmac_final) // in_signal
ctx_arb[sig_crypto_do_hmac_final]
.end
end_of_example#:
ctx_arb[kill]
nop
nop
nop
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