elt3c509end.h

IXP425的BSP代码

/* elt3c509End.h - 3Com EtherLink III END network interface header*/ 

/* Copyright 1998-2000 Wind River Systems, Inc. */

/*
modification history
--------------------
01d,02aug00,jkf  moved statistic definitions to the driver, SPR#26952
01c,11jun00,ham  removed reference to etherLib.
01b,10mar99,sbs  added DEF_NUM_RX_FRAMES.
01a,28sep98,snk  written by mBedded Innovations Inc. 
*/


#ifndef __INCelt3c509Endh
#define __INCelt3c509Endh

#ifdef __cplusplus
extern "C" {
#endif

#include "netinet/if_ether.h"

#ifndef _ASMLANGUAGE


/* debug defines */

#undef DRV_DEBUG

#ifdef DRV_DEBUG
#define ELT_TIMING
#endif /* DRV_DEBUG */
    
/* defines */

#define EA_SIZE         6               	/* one Ethernet address */
#define EH_SIZE         14              	/* ethernet header size */
#define MAX_FRAME_SIZE  (EH_SIZE + ETHERMTU)    /* capacity of buffer */

#define DEF_NUM_RX_FRAMES	64      /* default number of receive frames */

#define ATTACHMENT_DEFAULT      0       /* use card as configured */
#define ATTACHMENT_AUI          1       /* AUI  (thick, DIX, DB-15) */
#define ATTACHMENT_BNC          2       /* BNC  (thin, 10BASE-2) */
#define ATTACHMENT_RJ45         3       /* RJ-45 (twisted pair, TPE,10BASE-T)*/

/* Configuration items */

#define ELT3C509_BUFSIZ       	(ETHERMTU + SIZEOF_ETHERHEADER + 6)
#define ELT3C509_SPEED        	10000000
#define ELT_PRODUCTID_3C589   	0x9058	/* product ID for PCMCIA 3C589 */

/* naming items */

#define ELT3C509_DEV_NAME 	"elt"
#define ELT3C509_DEV_NAME_LEN 	4

/* flags */
    
#define ELT3C_PROMISCUOUS_FLAG	0x1
#define ELT3C_RCV_HANDLING_FLAG	0x2
#define ELT3C_POLLING		0x4


/* statistic block, see also driver source code */
typedef struct 
    {
#ifdef ELT_TIMING
    UINT elt3c509Stats[40];
#else
    UINT elt3c509Stats[30];
#endif 
    } ELT3C509_STAT;

    /* ELT driver data structures */

typedef struct elt3c509_device
    {
    END_OBJ     	endObj;		/* The class we inherit from. */
    int			unit;		/* unit number */
    char *		pTxCluster;	/* pointer to transmit cluster */
    int			nRxFrames;	/* number of recv frames */
    int                 rxFilter;   	/* current recv address filter bits */
    int                 port;       	/* base I/O port of this board */
    int                 ivec;       	/* interrupt vector */
    int                 intLevel;   	/* interrupt level */
    int                 attachment; 	/* connector to use (AUI,BNC,TPE) */
    int                 intMask;	/* current board interrupt mask */
    ELT3C509_STAT       elt3c509Stat;	/* statistics */
    long		flags;		/* Our local flags. */
    UCHAR		enetAddr [6];	/* ethernet address */
    CACHE_FUNCS 	cacheFuncs;     /* cache function pointers */
    BOOL    		txBlocked; 	/* indicates netTask active/queued */
    CL_POOL_ID  	pClPoolId;	/* cluster pool id */
    M_CL_CONFIG		endClConfig;	/* cluster config structure */
    CL_DESC		endClDesc;	/* cluster descriptor table */
#ifdef ELT_TIMING
    int                 interruptTime; /* timer value at ISR, -1 if invalid */
    int                 maxRxLatency; /* max time to service receive buffer */
#endif /* ELT_TIMING */
    } ELT3C509_DEVICE;


/* ELT register offsets, grouped by window number */

/* all windows */

#define ELT3C509_COMMAND     0x0e            /* command register */
#define ELT3C509_STATUS      0x0e            /* status register */

/* window number symbols for selection command */

#define WIN_CONFIG      0x0000
#define WIN_OPERATING   0x0001
#define WIN_ADDRESS     0x0002
#define WIN_FIFO        0x0003
#define WIN_DIAGNOSTIC  0x0004
#define WIN_RESULTS     0x0005
#define WIN_STATISTICS  0x0006

/* window 0, configuration and EEPROM */

#define MANUF_ID        0x00            /* manufacturer ID */
#define PRODUCT_ID      0x02            /* product ID/MCA adapter ID */
#define CONFIG_CONTROL  0x04            /* configuration control */
#define ADDRESS_CONFIG  0x06            /* address configuration */
#define RESOURCE_CONFIG 0x08            /* resource configuration */
#define EEPROM_CONTROL  0x0a            /* EEPROM control */
#define EEPROM_DATA     0x0c            /* EEPROM data in/out */

/* window 1, operating set */

#define DATA_REGISTER   0x00            /* data (low word) in/out */
#define DATA_HIGH       0x02            /* data (high word) in/out */
#define RX_STATUS       0x08            /* received packet status */
#define TIMER           0x0a            /* (byte) interrupt latency timer */
#define TX_STATUS       0x0b            /* (byte) transmit status */
#define TX_FREE_BYTES   0x0c            /* free bytes available in tx FIFO */
                                        /* also appears in window 3 */

/* window 2, station address setup/read */

#define ADDRESS_0       0x00            /* (byte) station address 0 */
#define ADDRESS_1       0x01            /* (byte) station address 1 */
#define ADDRESS_2       0x02            /* (byte) station address 2 */
#define ADDRESS_3       0x03            /* (byte) station address 3 */
#define ADDRESS_4       0x04            /* (byte) station address 4 */
#define ADDRESS_5       0x05            /* (byte) station address 5 */

/* window 3, FIFO management */

#define TX_RECLAIM      0x08            /* MCA tx reclaim threshold */
#define RX_FREE_BYTES   0x0a            /* free bytes available in rx FIFO */
#define TX_FREE_BYTES_3 0x0c            /* free bytes available in tx FIFO */
                                        /* also appears in window 1 */
                                        /* same offset so can use same macro */

/* window 4, diagnostics */

#define TX_DIAGNOSTIC   0x00            /* tx diagnostic */
#define HOST_DIAGNOSTIC 0x02            /* host diagnostic */
#define FIFO_DIAGNOSTIC 0x04            /* FIFO diagnostic */
#define NET_DIAGNOSTIC  0x06            /* net diagnostic */
#define ETHERNET_STATUS 0x08            /* ethernet controller status */
#define MEDIA_STATUS    0x0a            /* media type and status */

/* window 5, command results and internal state (read only) */

#define TX_START_THRESH 0x00            /* tx start threshold + 4 */
#define TX_AVAIL_THRESH 0x02            /* tx available threshold */
#define RX_EARLY_THRESH 0x06            /* rx early threshold */
#define RX_FILTER       0x08            /* rx filter lower 4 bits */
#define INTERRUPT_MASK  0x0a            /* interrupt mask */
#define READ_ZERO_MASK  0x0c            /* read zero mask */

/* window 6, statistics registers (byte regs. MUST be read/written as bytes) */

#define CARRIER_LOSTS   	0x00   /* (byte) carrier loss during tx */
#define SQE_FAILURES    	0x01   /* (byte) heartbeat loss during tx */
#define MULT_COLLISIONS 	0x02   /* (byte) tx with multiple collis. */
#define ONE_COLLISIONS  	0x03   /* (byte) tx with one collision */
#define LATE_COLLISIONS 	0x04   /* (byte) tx with late collision */
#define RECV_OVERRUNS   	0x05   /* (byte) receive overruns */
#define GOOD_TRANSMITS  	0x06   /* (byte) frames transmitted OK */
#define GOOD_RECEIVES   	0x07   /* (byte) frames received OK */
#define TX_DEFERRALS    	0x08   /* (byte) transmit deferrals */
#define BYTES_RECEIVED  	0x0a   /* total bytes received OK */
#define BYTES_TRANSMITTED       0x0c   /* total bytes transmitted OK */

/* ISA ID sequence state machine commands */

#define ID_PORT         0x0100          /* I/O port to access ID sequence */