dec21x40end.c

IXP425的BSP代码

#if defined(END_MIB_2233)
    pDrvCtrl->endObj.flags |= END_MIB_2233;
#endif  /* defined(END_MIB_2233) */

    m2IfPktCountRtnInstall(pDrvCtrl->endObj.pMib2Tbl, m2If8023PacketCount);

    /*
     * Make a copy of the data in mib2Tbl struct as well. We do this
     * mainly for backward compatibility issues. There might be some
     * code that might be referencing the END pointer and might
     * possibly do lookups on the mib2Tbl, which will cause all sorts
     * of problems.
     */

    bcopy ((char *)&pDrvCtrl->endObj.pMib2Tbl->m2Data.mibIfTbl,
                   (char *)&pDrvCtrl->endObj.mib2Tbl, sizeof (M2_INTERFACETBL));

    /* Mark the device ready with default flags */

#if defined(END_MIB_2233)
    END_OBJ_READY (&pDrvCtrl->endObj, IFF_NOTRAILERS | IFF_MULTICAST | 
                                      IFF_BROADCAST | END_MIB_2233);
#else /* !defined(END_MIB_2233) */
    END_OBJ_READY (&pDrvCtrl->endObj, IFF_NOTRAILERS | IFF_MULTICAST | 
                                      IFF_BROADCAST);
#endif /* !defined(END_MIB_2233) */

#endif /* INCLUDE_RFC_1213 */

    return (&pDrvCtrl->endObj);

    /* Handle error cases */

error:
    dec21x40Unload (pDrvCtrl);
    return (NULL);
    }

/***************************************************************************
*
* dec21x40Unload - unload a driver from the system
*
* This routine deallocates lists, and free allocated memory.
*
* RETURNS: OK, always.
*/

LOCAL STATUS dec21x40Unload
    (
    DRV_CTRL *pDrvCtrl
    )
    {

    DRV_LOG (DRV_DEBUG_LOAD, "EndUnload\n", 0, 0, 0, 0, 0, 0);

#ifndef INCLUDE_RFC_1213

    /* New RFC 2233 mib2 interface */

    /* Free MIB-II entries */

    m2IfFree(pDrvCtrl->endObj.pMib2Tbl);
    pDrvCtrl->endObj.pMib2Tbl = NULL;

#endif /* INCLUDE_RFC_1213 */

    /* deallocate lists */

    END_OBJ_UNLOAD (&pDrvCtrl->endObj);

    /* deallocate allocated shared memory */

    if (DRV_FLAGS_ISSET (DEC_MEMOWN)  && pDrvCtrl->memBase)
        cacheDmaFree (pDrvCtrl->memBase);

    return (OK);
    }

/***************************************************************************
*
* dec21x40InitParse - parse parameter values from initString
*
* The initialization string is modified by muxLib.o to include the unit number
* as the first parameter.
*
* Parse the input string.  Fill in values in the driver control structure.
*
* The initialization string format is:
* "<device addr>:<PCI addr>:<ivec>:<ilevel>:<mem base>:<mem size>:	\
*  <user flags>:<phyAddr>:<pPhyTbl>:<phyFlags>:<offset>:<loanBufs>:<drvFlags>"
*
* .bS
* device addr	base address of hardware device registers
* PCI addr	main memory address over the PCI bus
* ivec		interrupt vector number
* ilevel	interrupt level
* mem base	base address of a DMA-able, cache free,pre-allocated  memory
* mem size	size of the pre-allocated memory
* user flags	User flags control the run-time characteristics of the chip
* phyAddr	MII PHY address (optional)
* pPhyTbl	address of auto-negotiation table (optional)
* phyFlags	PHY configuration flags (optional)
* offset        Memory offset for alignment (optional)
* loanBufs      number of loaner clusters (optional)
* drvFlags	Driver flags control the runtime characteristics of the driver
*
* The last six arguments are optional. If the PHY address is to be specified
* then phyAddr, pPhyTbl, and phyFlags should all be specified together.
*
* RETURNS: OK or ERROR for invalid arguments.
*/

LOCAL STATUS dec21x40InitParse
    (
    DRV_CTRL	*pDrvCtrl,
    char 	*initString
    )
    {
    char *	tok;		/* an initString token */
    char *	holder=NULL;	/* points to initString fragment beyond tok */
    UINT32	tokValue;
    
    DRV_LOG (DRV_DEBUG_LOAD, "InitParse: Initstr=%s\n",
             (int) initString, 0, 0, 0, 0, 0);

    tok = endTok_r(initString, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->unit = atoi(tok);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->devAdrs = strtoul (tok, NULL, 16);
    
    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->pciMemBase = strtoul (tok, NULL, 16);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->ivec = strtoul (tok, NULL, 16);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->ilevel = strtoul (tok, NULL, 16);
    
    tok = endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    if (atoi(tok) < 0)
        pDrvCtrl->numRds = NUM_RDS_DEF;
    else
        pDrvCtrl->numRds = atoi(tok);
    
    tok = endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    if (atoi(tok) < 0)
        pDrvCtrl->numTds = NUM_TDS_DEF;
    else
        pDrvCtrl->numTds = atoi(tok);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->memBase = (char *) strtoul (tok, NULL, 16);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->memSize = strtoul (tok, NULL, 16);

    tok=endTok_r(NULL, ":", &holder);
    if (tok == NULL)
        return (ERROR);
    pDrvCtrl->usrFlags = strtoul(tok, NULL, 16);
 
    /*
     * Start of optional parameters.  Set each optional parameter to
     * its default value, so that each will have a reasonable value
     * if we run out of fields during the string parse.
     */

    pDrvCtrl->phyAddr = (UINT8) 0xFF;
    pDrvCtrl->pMiiPhyTbl = NULL;
    pDrvCtrl->miiPhyFlags = (DEC_USR_MII_10MB | DEC_USR_MII_HD |
			    DEC_USR_MII_100MB | DEC_USR_MII_FD |
			    DEC_USR_MII_BUS_MON);
    pDrvCtrl->offset   = 0;
    pDrvCtrl->loanBufs = NUM_LOAN;
    pDrvCtrl->drvFlags = 0;

    /* phyAddr */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	goto endOptionalParams;
    pDrvCtrl->phyAddr = (UINT8) strtoul (tok, NULL, 16);

    /* pMiiPhyTbl - must be supplied if phyAddr was given */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	return (ERROR);
    tokValue = strtoul (tok, NULL, 16);
    if ((INT32) tokValue != -1)
	pDrvCtrl->pMiiPhyTbl = (MII_AN_ORDER_TBL *) tokValue;

    /* miiPhyFlags - must be supplied if phyAddr was given */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	return (ERROR);
    tokValue = strtoul (tok, NULL, 16);
    if ((INT32) tokValue != -1)
	pDrvCtrl->miiPhyFlags = tokValue;
 
    /* offset */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	goto endOptionalParams;
    if (atoi(tok) >= 0)
	pDrvCtrl->offset = atoi (tok);

    /* loanBufs */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	goto endOptionalParams;
    tokValue = (UINT32) strtoul (tok, NULL, 16);
    if ((INT32) tokValue != -1)
	pDrvCtrl->loanBufs = tokValue;

    /* drvFlags */

    tok = endTok_r (NULL, ":", &holder);
    if (tok == NULL)
	goto endOptionalParams;
    pDrvCtrl->drvFlags = (UINT32) strtoul (tok, NULL, 16);
    if (pDrvCtrl->drvFlags & DEC_DRV_NOSWAP_MASTER)
	DRV_FLAGS_SET (DEC_NOSWAP_MASTER);

endOptionalParams:

    /* print debug info */

    DRV_LOG (DRV_DEBUG_LOAD,
            "EndLoad: unit=%d devAdrs=0x%x ivec=0x%x ilevel=0x%x\n",
            pDrvCtrl->unit, pDrvCtrl->devAdrs, pDrvCtrl->ivec,
	    pDrvCtrl->ilevel, 0, 0);

    DRV_LOG (DRV_DEBUG_LOAD,
            "         membase=0x%x memSize=0x%x\n",
            (int)pDrvCtrl->memBase, pDrvCtrl->memSize, 0,0,0,0);
    
    DRV_LOG (DRV_DEBUG_LOAD,
             "        pciMemBase=0x%x flags=0x%x usrFlags=0x%x offset=%d\n",
             (int)pDrvCtrl->pciMemBase, pDrvCtrl->flags, pDrvCtrl->usrFlags,
             pDrvCtrl->offset, 0, 0);

    DRV_LOG (DRV_DEBUG_LOAD,
	     "        phyAddr=0x%x pMiiPhyTbl=0x%x miiPhyFlags=0x%x\n",
	     (int) pDrvCtrl->phyAddr, (int) pDrvCtrl->pMiiPhyTbl,
	     (int) pDrvCtrl->miiPhyFlags,
	     0,0,0);

    DRV_LOG (DRV_DEBUG_LOAD,
	     "        loanBufs=%d drvFlags=0x%x\n", 
	     (int) pDrvCtrl->loanBufs, (int) pDrvCtrl->drvFlags, 0, 0, 0, 0);

    return OK;
    }

/***************************************************************************
*
* dec21x40InitMem - initialize memory
*
* RETURNS: OK or ERROR.
*/

LOCAL STATUS dec21x40InitMem
    (
    DRV_CTRL *	pDrvCtrl
    )
    {
    DEC_RD *	pRxD = pDrvCtrl->rxRing;
    DEC_TD *	pTxD = pDrvCtrl->txRing;
    M_CL_CONFIG	dcMclBlkConfig;
    CL_DESC	clDesc;                      /* cluster description */
    char *	pBuf;
    int		ix;
    int		sz;
    char *	pShMem;
    

    DRV_LOG (DRV_DEBUG_LOAD, "InitMem\n", 0, 0, 0, 0, 0, 0);

    /* Establish a region of shared memory */
     
    /* We now know how much shared memory we need.  If the caller
     * provides a specific memory region, we check to see if the provided
     * region is large enough for our needs.  If the caller did not
     * provide a specific region, then we attempt to allocate the memory
     * from the system, using the cache aware allocation system call.
     */

    switch ((int)pDrvCtrl->memBase)
        {
        default :       /* caller provided memory */

            /* Establish size of shared memory region we require */

            sz = ((pDrvCtrl->numRds * (DEC_BUFSIZ + RD_SIZ + 4))  +
                  (pDrvCtrl->numTds * (DEC_BUFSIZ + TD_SIZ + 4))  +
                  (pDrvCtrl->loanBufs * (DEC_BUFSIZ + 4)) + 4);

            if ( pDrvCtrl->memSize < sz )     /* not enough space */
                {
                DRV_LOG ( DRV_DEBUG_INIT, "%s%d: not enough memory provided\n",
                         (int)DRV_NAME, pDrvCtrl->unit,0,0,0,0);
                return ( ERROR );
                }
            pShMem = pDrvCtrl->memBase;      /* set the beginning of pool */

            /* assume pool is cache coherent, copy null structure */

            pDrvCtrl->cacheFuncs = cacheNullFuncs;

            break;

        case NONE :     /* get our own memory */

            /* 
             * Because the structures that are shared between the device
             * and the driver may share cache lines, the possibility exists
             * that the driver could flush a cache line for a structure and
             * wipe out an asynchronous change by the device to a neighboring
             * structure. Therefore, this driver cannot operate with memory
             * that is not write coherent.  We check for the availability of
             * such memory here, and abort if the system did not give us what
             * we need.
             */

            if (!CACHE_DMA_IS_WRITE_COHERENT ())
                {
                DRV_LOG  ( DRV_DEBUG_INIT, "dc: device requires cache"
		"coherent memory\n",
	        0,0,0,0,0,0);
                return (ERROR);
                }

            sz = (((pDrvCtrl->numRds + 1) * RD_SIZ) +
                  ((pDrvCtrl->numTds + 1) * TD_SIZ));

            pDrvCtrl->memBase = 
                pShMem = (char *) cacheDmaMalloc ( sz );

            if (pShMem == NULL)
                {
                DRV_LOG ( DRV_DEBUG_LOAD, "%s%d - system memory unavailable\n",
                          (int)DRV_NAME, pDrvCtrl->unit, 0,0,0,0);
                return (ERROR);
                }