dec21x40end.c

IXP425的BSP代码

.CE

The <pDrvCtrl> parameter is a pointer to the driver control structure that this
routine can use to access the Ethenet device. The driver control structure
member 'mediaCount', is initialized to 0xff at startup, while the other media
control members ('mediaDefault', 'mediaCurrent', and 'gprModeVal') are 
initialized to zero. This routine can use these fields in any manner. 
However, all other driver control structure members should be considered 
read-only and should not be modified.

This routine should reset, initialize, and select an appropriate media.  It
should also write necessary the CSR6 bits (port select, PCS, SCR, and full 
duplex) to the memory location pointed to by <pCsr6Val>. The driver uses 
this value to program register CSR6. This routine should return OK or ERROR.

.iP "VOIDFUNCPTR _func_dec2114xIntAck" "" 9 -1

This driver does acknowledge the LAN interrupts. However if the board hardware
requires specific interrupt acknowledgement, not provided by this driver,
the BSP should define such a routine and attach it to the driver via
_func_dec2114xIntAck.

PCI ID VALUES
The dec21xxx series chips are now owned and manufactured by Intel.  Chips may
be identified by either PCI Vendor ID.  ID value 0x1011 for Digital, or
ID value 0x8086 for Intel.  Check the Intel web site for latest information.
The information listed below may be out of date.

.CS
    Chip         Vendor ID      Device ID
    dec 21040      0x1011        0x0002
    dec 21041      0x1011        0x0014
    dec 21140      0x1011        0x0009
    dec 21143      0x1011        0x0019
    dec 21145      0x8086        0x0039
.CE

SEE ALSO: ifLib, 
.I "DECchip 21040 Ethernet LAN Controller for PCI,"
.I "Digital Semiconductor 21140A PCI Fast Ethernet LAN Controller,"
.I "Using the Digital Semiconductor 21140A with Boot ROM, Serial ROM, \
and External Register: An Application Note"
.I "Intel 21145 Phoneline/Ethernet LAN Controller Hardware Ref. Manual"
.I "Intel 21145 Phoneline/Ethernet LAN Controller Specification Update"

INTERNAL
We modified the driver to use rDesc3 to hold the virtual address of the buffer.
This allows us to eliminate all PHYS_TO_VIRT translations that were previously
used.  PHYS_TO_VIRT translations are extremely costly in T3.0.

*/

/* includes */

#include "vxWorks.h"
#include "wdLib.h"
#include "iv.h"
#include "vme.h"
#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "sys/socket.h"
#include "sys/ioctl.h"
#include "errno.h"
#include "memLib.h"
#include "intLib.h"
#include "net/route.h"
#include "errnoLib.h"
#include "cacheLib.h"
#include "logLib.h"
#include "netLib.h"
#include "stdio.h"
#include "stdlib.h"
#include "sysLib.h"
#include "net/systm.h"
#include "sys/times.h"
#include "net/if_subr.h"
#include "netinet/if_ether.h"
#include "miiLib.h"
#include "drv/end/dec21x40End.h"

#undef	ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h"
#include "end.h"
#include "endLib.h"

#include "lstLib.h"
#include "semLib.h"

/* defines */
#define DRV_DEBUG_OFF		0x0000
#define DRV_DEBUG_RX		0x0001
#define	DRV_DEBUG_TX		0x0002
#define DRV_DEBUG_INT		0x0004
#define	DRV_DEBUG_POLL		(DRV_DEBUG_POLL_RX | DRV_DEBUG_POLL_TX)
#define	DRV_DEBUG_POLL_RX	0x0008
#define	DRV_DEBUG_POLL_TX	0x0010
#define	DRV_DEBUG_IOCTL		0x0040
#define	DRV_DEBUG_LOAD		0x0020
#define DRV_DEBUG_INIT		0x0100
#define DRV_DEBUG_MII		0x0080
#define DRV_DEBUG_POLL_REDIR	0x10000
#define	DRV_DEBUG_LOG_NVRAM	0x20000
#define DRV_DEBUG_ALL		0xffffffff 

#undef  DRV_DEBUG

#ifdef	DRV_DEBUG
int     decTxInts=0;
int     decRxInts=0;
int	decTxErrors = 0;
int	decRxErrors = 0;
int	decTxTpsErrors = 0;
int	decTxBufErrors = 0;
int	decTxTjtErrors = 0;
int	decTxUnfErrors = 0;
int	decTxLcErrors = 0;
int	decRxBufErrors = 0;
int	decRxRpsErrors = 0;
int	decRxWtErrors = 0;
int	decDescErrors = 0;

IMPORT	int dataDump();
IMPORT	int eAdrsDisplay();

#endif /*DRV_DEBUG*/

/* default to enable DRV_DEBUG_LOAD to display initialization errors. */

int	decDebug = DRV_DEBUG_INIT;

#define DRV_LOG(FLG, X0, X1, X2, X3, X4, X5, X6)                        \
	if (decDebug & FLG)                                             \
            logMsg(X0, X1, X2, X3, X4, X5, X6);

#define END_FLAGS_ISSET(pEnd, setBits)                                  \
            ((pEnd)->flags & (setBits))

 
#ifdef INCLUDE_RFC_1213

/* Old RFC 1213 mib2 interface */

#define END_HADDR(pEnd)                                                 \
                ((pEnd)->mib2Tbl.ifPhysAddress.phyAddress)

#define END_HADDR_LEN(pEnd)                                             \
                ((pEnd)->mib2Tbl.ifPhysAddress.addrLength)

#else  /* Then RFC 2233 */

/* New RFC 2233  mib2 interface */

#define END_HADDR(pEnd)                                                 \
                ((pEnd)->pMib2Tbl->m2Data.mibIfTbl.ifPhysAddress.phyAddress)

#define END_HADDR_LEN(pEnd)                                             \
                ((pEnd)->pMib2Tbl->m2Data.mibIfTbl.ifPhysAddress.addrLength)

#endif /* INCLUDE_RFC_1213 */

#define DEC_SPEED_1	1000000              /* 1 Mbps HomePNA */
#define DEC_SPEED_10	10000000             /* 10 Mbps */
#define DEC_SPEED_100	100000000            /* 100 Mbps */
#define	DEC_SPEED_DEF	DEC_SPEED_10
#define EADDR_LEN	6                    /* ethernet address length */
#define DEC_PKT_SIZE	(ETHERMTU + SIZEOF_ETHERHEADER + EADDR_LEN)

#define	DEC_LOOPS_PER_NS	4
#define DEC_NSDELAY(nsec) do {						\
			volatile int nx = 0;                            \
			volatile int loop = ((nsec)*dec21x40Loops);	\
			for (nx = 0; nx < loop; nx++)			\
				;                  			\
			} while (0)

#define DEC_BUF_ALLOC_ROUTINE                                           \
	(FUNCPTR) (DRV_FLAGS_ISSET(DEC_MEMOWN) ?                        \
                   cacheDmaMalloc : NULL)

#define DEC_BUF_POOL_ADRS                                               \
	(char *)(DRV_FLAGS_ISSET(DEC_MEMOWN) ?                          \
                  NULL:(pDrvCtrl->txRing + pDrvCtrl->numTds))

/* DRV_CTRL flags access macros */
#define DRV_FLAGS_SET(setBits)                                          \
	(pDrvCtrl->flags |= (setBits))

#define DRV_FLAGS_ISSET(setBits)                                        \
	(pDrvCtrl->flags & (setBits))

#define DRV_FLAGS_CLR(clrBits)                                          \
	(pDrvCtrl->flags &= ~(clrBits))

#define DRV_FLAGS_GET()                                                 \
        (pDrvCtrl->flags)

/* DRV_CTRL user flags access macros */
#define DRV_USR_FLAGS_SET(setBits)                                      \
	(pDrvCtrl->usrFlags |= (setBits))

#define DRV_USR_FLAGS_ISSET(setBits)                                    \
	(pDrvCtrl->usrFlags & (setBits))

#define DRV_USR_FLAGS_CLR(clrBits)                                      \
	(pDrvCtrl->usrFlags &= ~(clrBits))

#define DRV_USR_FLAGS_GET()                                             \
        (pDrvCtrl->usrFlags)

#define DRV_PHY_FLAGS_ISSET(setBits)                                    \
	(pDrvCtrl->miiPhyFlags & (setBits))

/* Cache macros */
#define DEC_CACHE_INVALIDATE(address, len)                              \
        CACHE_DRV_INVALIDATE (&pDrvCtrl->cacheFuncs, (address), (len))

#define DEC_CACHE_VIRT_TO_PHYS(address)                                 \
        CACHE_DRV_VIRT_TO_PHYS (&pDrvCtrl->cacheFuncs, (address))

#define DEC_CACHE_PHYS_TO_VIRT(address)                                 \
        CACHE_DRV_PHYS_TO_VIRT (&pDrvCtrl->cacheFuncs, (address))

/* memory to PCI address translation macros */
#define PCI_TO_MEM_PHYS(pciAdrs)                                        \
	(((ULONG)(pciAdrs)) - (pDrvCtrl->pciMemBase))

#define DEC_PCI_TO_VIRT(pciAdrs)                                        \
        DEC_CACHE_PHYS_TO_VIRT (PCI_TO_MEM_PHYS (pciAdrs))
	
#define MEM_TO_PCI_PHYS(memAdrs)                                        \
	(((ULONG)(memAdrs)) + (pDrvCtrl->pciMemBase))

#define DEC_VIRT_TO_PCI(vAdrs)                                          \
	MEM_TO_PCI_PHYS (DEC_CACHE_VIRT_TO_PHYS (vAdrs))

#ifndef TCP_MSS
#define TCP_MSS		536		/* TCP maximum segment size */
#endif
#define RWIN		(TCP_MSS * 4)	/* Receive window size */

/*
 * CSR access macros
 *
 * To optimize CSR accesses, redefine DEC_CSR_READ and
 * DEC_CSR_WRITE macros in a wrapper file.
 */
#ifndef DEC_CSR_READ
#define DEC_CSR_READ(csr)                                               \
	dec21x40CsrRead(pDrvCtrl, (csr))
#endif /* DEC_CSR_READ */

#ifndef DEC_CSR_WRITE
#define DEC_CSR_WRITE(csr,val)                                          \
	dec21x40CsrWrite(pDrvCtrl, (csr), (val))
#endif /* DEC_CSR_WRITE */

#define DEC_CSR_UPDATE(csr,val)                                         \
	DEC_CSR_WRITE((csr), DEC_CSR_READ(csr) | (val))
    
#define DEC_CSR_RESET(csr,val)                                          \
	DEC_CSR_WRITE((csr), DEC_CSR_READ(csr) & ~(val))
    
#define DEC_SROM_CMD_WRITE(adrs,delay)                                  \
	do {                                                               \
        DEC_CSR_WRITE(CSR9, CSR9_21140_SR | CSR9_21140_WR | (adrs));    \
        DEC_NSDELAY (delay);						\
        } while (0)

#define DEC_SROM_CMD_READ()                                             \
	((DEC_CSR_READ(CSR9) & 0x8) >> 3)

/* MII read/write access macros */
   
#define CSR9_MII_WR 0x00000000

#define DEC_MII_BIT_READ(pBData)                                        \
        do {                                                               \
        DEC_CSR_WRITE (CSR9, CSR9_21140_MII | CSR9_21140_RD);           \
        DEC_NSDELAY (100);						\
        DEC_CSR_WRITE (CSR9, CSR9_21140_MII | CSR9_21140_RD | CSR9_21140_MDC);\
        DEC_NSDELAY (100);						\
        *(pBData) |= CSR9_MII_DBIT_RD (DEC_CSR_READ (CSR9));		\
        } while (0)

#define DEC_MII_BIT_WRITE(data)                                      \
        do {                                                            \
        DEC_CSR_WRITE (CSR9, CSR9_MII_DBIT_WR(data) |                \
                      CSR9_MII_WR | CSR9_21140_WR);                  \
        DEC_NSDELAY (100);                                           \
        DEC_CSR_WRITE (CSR9, CSR9_MII_DBIT_WR(data) |                \
                      CSR9_MII_WR | CSR9_21140_WR | CSR9_21140_MDC); \
        DEC_NSDELAY (100);                                           \
        } while (0)

#define DEC_MII_RTRISTATE           \
        do {                        \
        int retVal;                 \
        DEC_MII_BIT_READ (&retVal); \
        } while (0)

#define DEC_MII_WTRISTATE           \
        do {                        \
        DEC_MII_BIT_WRITE(0x1);     \
        DEC_MII_BIT_WRITE(0x0);     \
        } while (0)

#define DEC_MII_WRITE(data, bitCount)                \
        do {                                         \
        int i=(bitCount);                            \
                                                     \
        while (i--)                                  \
            DEC_MII_BIT_WRITE (((data) >> i) & 0x1); \
        } while (0)

#define DEC_MII_READ(pData, bitCount) \
        do {                          \
        int i=(bitCount);             \
                                      \
        while (i--)                   \
            {                         \
            *(pData) <<= 1;           \
            DEC_MII_BIT_READ (pData); \
            }                         \
        } while (0)

/*
 * Default macro definitions for BSP interface.
 * These macros can be redefined in a wrapper file, to generate
 * a new module with an optimized interface.
 */
#ifndef SYS_INT_CONNECT
#define SYS_INT_CONNECT(pDrvCtrl,rtn,arg,pResult)                       \
    do {                                                                \
    int vector = pDrvCtrl->ivec;                                        \
    if (!pDrvCtrl->intrConnect)                                         \
        {                                                               \
        pDrvCtrl->intrConnect = TRUE;                                   \
       *pResult = (*dec21x40IntConnectRtn) (                            \
                               (VOIDFUNCPTR *)INUM_TO_IVEC (vector),    \
                                (rtn), (int)(arg));                     \
        }                                                               \
    } while (0)
#endif /*SYS_INT_CONNECT*/
 
#ifndef SYS_INT_DISCONNECT
#define SYS_INT_DISCONNECT(pDrvCtrl,rtn,arg,pResult)                    \
    do {                                                                \
    /* set pDrvCtrl->intrConnect to FALSE if appropriate */             \
    *pResult = OK;							\
    } while (0)
#endif /*SYS_INT_DISCONNECT*/

#ifndef SYS_INT_ENABLE
#define SYS_INT_ENABLE(pDrvCtrl)                                        \
    do {                                                                \
    IMPORT void sysLanIntEnable();                                      \
    sysLanIntEnable (pDrvCtrl->ilevel);                                 \
    } while (0)
#endif /*SYS_INT_ENABLE*/

#ifndef SYS_INT_DISABLE
#define SYS_INT_DISABLE(pDrvCtrl)                                       \
    do {                                                                \
    IMPORT void sysLanIntDisable();                                     \
    sysLanIntDisable (pDrvCtrl->ilevel);                                \
    } while (0)
#endif /*SYS_INT_DISABLE*/