smend.c

IXP425的BSP代码

    pEaddr = etherAddrPtr (pSmEndDev->arpcom.ac_enaddr);

    bzero ((caddr_t)pEaddr, 6);		/* fill in ethernet address */
    pEaddr [0] = 0x00;
    pEaddr [1] = 0x02;
    pEaddr [2] = 0xE2;

    pSmPktHdr = pSmEndDev->smPktDesc.hdrLocalAdrs;
    pSmEndDev->localCpu = pSmDesc->cpuNum;
    SM_LOG (SM_DBG_CFG, "smEndHwAddrSet: rsvrd1 = %#x\n",
            ntohl (pSmPktHdr->reserved1), 0, 0, 0, 0, 0);

    if (pSmPktHdr->reserved1 != 0)		/* sequential addressing */
	{
	/*
	 * The backplane hw address consists of
	 * { 0x00, 0x02, 0xE2, ip[1], ip[2], ip[3] }.
	 * where ip is the lower three bytes of
	 * the IP interface address.
	 */

	pSmEndDev->masterAddr = ntohl (pSmPktHdr->reserved1) & 0x00FFFFFF;
	addr = pSmEndDev->masterAddr + pSmEndDev->localCpu;

	pEaddr [3] = ((addr >> 16) & 0xff);
	pEaddr [4] = ((addr >> 8)  & 0xff);
	pEaddr [5] = (addr & 0xff);
	}
    else
	{
    	/*
    	 * Backplane hw address consists of
     	 * { 0x00, 0x02, 0xE2, 0x00, unit, cpu }.
     	 */

	pEaddr [3] = 0;
	pEaddr [4] = pSmEndDev->unit;
	pEaddr [5] = pSmEndDev->localCpu;

	/*
	 * store the non-sequential IP address for this CPU in the CPU
	 * descriptor for the local CPU in shared memory for all to see
	 */

        pSmHdr = SM_OFFSET_TO_LOCAL (ntohl (pAnchor->smHeader), pSmDesc->base,
                                     SM_HDR *);
        pCpuDesc = SM_OFFSET_TO_LOCAL (ntohl (pSmHdr->cpuTable), pSmDesc->base,
                                       SM_CPU_DESC *);
        pCpuDesc = &(pCpuDesc[pSmDesc->cpuNum]);
        pCpuDesc->reserved1 = (unsigned)pSmEndDev->ipAddr;
	}

    SM_LOG (SM_DBG_LOAD, "smEndHwAddrSet: H/W address = %s\n",
            (int)ether_sprintf (pEaddr), 0, 0, 0, 0, 0);
    }


/******************************************************************************
*
* smEndParse - parse input paramter string and derive parameter values
*
* This routine parses the input parameter string, deriving the values of each
* parameter in the assumed order and radix as shown here:
*
* "<unit>:<busSpace>:<pAnchor>:<pMem>:<memSize>:<tasType>:<maxCpus>:
*  <masterCpu>:<maxPktBytes>:<startAddr>:<ipAddr>:<maxInputPkts>:<intType>:
*  <intArg1>:<intArg2>:<intArg3>:<mbNum>:<cbNum>"
*
* Parameter	Radix	Use
* -------------	-----	-------------------------------------------------------
* unitNumber	 10	device unit number assigned by operating system
* busSpace	 16	bus address space; NONE = local, else, VME AM/PCI space
*			[busSpace is not yet supported in smPktLib.c]
* pAnchor	 16	shared memory anchor region @<busSpace>
* pMem		 16	start of shared memory (NONE = allocate) @<busSpace>
* memSize	 16	total shared memory size in bytes
* tasType	 10	test-and-set type (SM_TAS_HARD or SM_TAS_SOFT)
* maxCpus	 10	maximum number of CPUs supported on backplane
*			(0 = default)
* masterCpu	 10	master CPU#
* maxPktBytes	 10	maximum number of bytes per shared memory packet
*			(0 = default)
* startAddr	 16	start of sequential IP addressing (0 = not sequential)
* ipAddr	 16	non-sequential IP address (0 = sequential)
* maxInputPkts	 10	maximum number of queued receive packets for this CPU
*			(0 = default)
* intType	 10	interrupt method (SM_INT_MAILBOX/BUS/NONE)
* intArg1	 16	1st interrupt argument
* intArg2	 16	2nd interrupt argument
* intArg3	 16	3rd interrupt argument
* mbNum		 16	number of mBlks in driver memory pool (if < 16, a
*			default value is used)
* cbNum		 16	number of clBlks in driver memory pool (if < 16, a
*			default value is used)
*
* The parameter values are delimited by colons and the EOS.
*
* RETURNS: OK or ERROR if bogus string.
*/

LOCAL STATUS smEndParse
    (
    SM_END_DEV * pSmEndDev,	/* pointer to device descriptor */
    char *       pParamStr	/* pointer to parameter string to parse */
    )
    {
    char * tok    = NULL;	/* parameter value (token) pointer */
    char * pLast  = NULL;	/* string position of last parse */

    /* derive unit number */

    if (((tok = strtok_r (pParamStr, ":", &pLast)) == NULL) ||
        ((pSmEndDev->unit = (unsigned) strtoul (tok, NULL, 10)) >= NSM))
        {
        SM_LOG (SM_DBG_LOAD, "missing or illegal unit number: %d\n",
                pSmEndDev->unit, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /*
     * derive bus address space for shared memory anchor and shared memory
     * addresses; NONE = local bus
     */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->busSpace = (ULONG) strtoul (tok, NULL, 16)) == NULL))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or NULL SM bus space\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive shared memory anchor address; must not be NULL */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->pAnchor = (SM_ANCHOR *) strtoul (tok, NULL, 16)) == NULL))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or NULL SM anchor address\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive pointer to shared memory; NONE (-1) = allocate dynamically */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->pMem = (char *) strtoul (tok, NULL, 16)) == NULL))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or NULL SM address\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive shared memory size in bytes */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->memSize = (ULONG) strtoul (tok, NULL, 16)) == 0))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or zero SM size\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive test-and-set type */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->tasType = (unsigned) strtoul (tok, NULL, 10)) >
         SM_TAS_HARD))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or illegal test-and-set type: %d\n",
                pSmEndDev->tasType, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive maximum number of CPUs supported in shared memory */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing number of CPUs\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    if ((pSmEndDev->maxCpus = (unsigned) strtoul (tok, NULL, 10)) == 0)
        pSmEndDev->maxCpus = DEFAULT_CPUS_MAX;

    /* derive master CPU number */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing master CPU number\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    if ((pSmEndDev->masterCpu = (unsigned) strtoul (tok, NULL, 10))
                              >= pSmEndDev->maxCpus)
        {
        SM_LOG (SM_DBG_LOAD, "Master CPU number: %d >= #CPUs (%d)\n",
                pSmEndDev->masterCpu, pSmEndDev->maxCpus, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive maximum shared memory packet size */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing max #bytes per packet\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    if ((pSmEndDev->maxPktBytes = (ULONG) strtoul (tok, NULL, 10)) == 0)
        pSmEndDev->maxPktBytes = DEFAULT_PKT_SIZE;

    /* derive shared memory sequential start IP address (0 = not sequential) */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL))
        {
        SM_LOG (SM_DBG_LOAD, "Missing SM sequential starting IP address\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->startAddr = (char *) strtoul (tok, NULL, 16);

    /* derive shared memory non-sequential IP address (0 = sequential) */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL))
        {
        SM_LOG (SM_DBG_LOAD, "Missing SM non-sequential IP address\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->ipAddr = (char *) strtoul (tok, NULL, 16);

    /* derive maximum #packets that can be received; must be > 0 */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->maxPackets = atoi (tok)) < 0))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or illegal number of packets: %d\n",
                pSmEndDev->maxPackets, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    if (pSmEndDev->maxPackets == 0)
        pSmEndDev->maxPackets = DEFAULT_PKTS_MAX;

    /* derive interrupt method */

    if (((tok = strtok_r (NULL, ":", &pLast)) == NULL) ||
        ((pSmEndDev->intType = (unsigned) strtoul (tok, NULL, 10)) >
         SM_INT_MAILBOX_R4))
        {
        SM_LOG (SM_DBG_LOAD, "Missing or illegal SM interrupt type: %d\n",
                pSmEndDev->intType, 0, 0, 0, 0, 0);
        return (ERROR);
        }

    /* derive interrupt argument 1 */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing SM interrupt 1st argument\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->intArg1 = (int) strtoul (tok, NULL, 16);

    /* derive interrupt argument 2 */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing SM interrupt 2nd argument\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->intArg2 = (int) strtoul (tok, NULL, 16);

    /* derive interrupt argument 3 */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing SM interrupt 3rd argument\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->intArg3 = (int) strtoul (tok, NULL, 16);

    /* derive number of mBlks to allocate */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing number of mBlks\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->mbNum = (uint32_t) strtoul (tok, NULL, 16);
    if (pSmEndDev->mbNum < SM_MIN_MBLK_NUM)
        pSmEndDev->mbNum = SM_DFLT_MBLK_NUM;

    /* derive number of clBlks to allocate */

    if ((tok = strtok_r (NULL, ":", &pLast)) == NULL)
        {
        SM_LOG (SM_DBG_LOAD, "Missing number of cBlks\n",
                0, 0, 0, 0, 0, 0);
        return (ERROR);
        }
    pSmEndDev->cbNum = (uint32_t) strtoul (tok, NULL, 16);
    if (pSmEndDev->cbNum < SM_MIN_CLBLK_NUM)
        pSmEndDev->cbNum = SM_DFLT_CLBLK_NUM;

    return (OK);
    }


/******************************************************************************
*
* smEndMemInit - set up and initialize memory for an sm device
*
* This routine sets up and initializes a net pool for the specified sm device.
*
* RETURNS: OK or ERROR if failure.
*/

LOCAL STATUS smEndMemInit
    (
    SM_END_DEV * pSmEndDev
    )
    {
    SM_PKT_MEM_HDR * pSmPktHdr   = NULL;	/* packet header */
    WDOG_ID          smEndBeatWd = NULL;	/* heartbeat watchdog ID */
    UINT             smPktSize   = 0;
    M_CL_CONFIG      smEndMclBlkConfig = /* network mBlk/clBlk config table */
        {
        /* 
        no. mBlks		no. clBlks	memArea		memSize
        -----------		----------	-------		-------
        */
        0, 			0, 		NULL, 		0
        };
    CL_DESC          smEndClDescTbl [] = /* network cluster pool config table*/
        {
        /* 
        clSize			num		memArea		memSize
        -----------		----		-------		-------
        */
        {0,			0,		NULL,		0}
        }; 
    int              smEndClDescTblNumEnt = (NELEMENTS(smEndClDescTbl));

    /* If this is the master CPU, setup and initialize shared memory */

    if (pSmEndDev->isMaster)
        {
        /* if not already obtained, allocate the shared memory */

        if (pSmEndDev->pMem == (char *)NONE)
            {
            if (!CACHE_DMA_IS_WRITE_COHERENT () ||
                !CACHE_DMA_IS_READ_COHERENT  ()
               )
                {
                SM_LOG (SM_DBG_MEM_INIT,
                        "MASTER: cache coherent buffer not available\n",
                        0, 0, 0, 0, 0, 0);
                smEndUnload (pSmEndDev);
                return (ERROR);
                }

            if ((pSmEndDev->pMem =
                (char *)cacheDmaMalloc (pSmEndDev->memSize))
                == NULL)
                {
                SM_LOG (SM_DBG_MEM_INIT,
                        "MASTER: cache coherent 'sm' allocation error\n",
                        0, 0, 0, 0, 0, 0);
                smEndUnload (pSmEndDev);
                return (ERROR);
                }

            pSmEndDev->smAlloc = TRUE;
            }

        /* else, if shared memory is contiguous with anchor, update info */

        else if (pSmEndDev->pMem == (char *) pSmEndDev->pAnchor)
            {
            pSmEndDev->pMem    += sizeof (SM_ANCHOR);
            pSmEndDev->memSize -= sizeof (SM_ANCHOR);
            }

        SM_LOG (SM_DBG_MEM_INIT,
                "MASTER: anchor =