📄 z8530serial.c
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*cr = SCC_WR3_RX_8_BITS | SCC_WR3_RX_EN; *cr = SCC_WR0_SEL_WR5; /* tx params */ *cr = SCC_WR5_TX_8_BITS | SCC_WR5_TX_EN | SCC_WR5_DTR | SCC_WR5_RTS; *cr = SCC_WR0_SEL_WR2; /* interrupt vector */ *cr = pTyCoDv->intVec; *cr = SCC_WR0_SEL_WR1; /* int and xfer mode */ *cr = SCC_WR1_INT_ALL_RX | SCC_WR1_TX_INT_EN; *cr = SCC_WR0_SEL_WR9; /* master interrupt control */ *cr = SCC_WR9_MIE | pTyCoDv->intType; /* enable interrupts */ *cr = SCC_WR0_RST_TX_CRC; *cr = SCC_WR0_RST_INT; *cr = SCC_WR0_RST_INT; *cr = zero; /* reset SCC register counter */ intUnlock (oldlevel); }/********************************************************************************* tyCoOpen - open file to USART*/LOCAL int tyCoOpen ( TY_CO_DEV *pTyCoDv, char *name, int mode ) { return ((int) pTyCoDv); }/********************************************************************************* tyCoIoctl - special device control** This routine handles FIOBAUDRATE requests and passes all others to tyIoctl().** RETURNS: OK, or ERROR if invalid baud rate, or whatever tyIoctl() returns.*/LOCAL STATUS tyCoIoctl ( TY_CO_DEV *pTyCoDv, /* device to control */ int request, /* request code */ int arg /* some argument */ ) { FAST int oldlevel; /* current interrupt level mask */ FAST int baudConstant; FAST STATUS status; volatile char *cr; /* SCC control reg adr */ switch (request) { case FIOBAUDRATE: if (arg < 50 || arg > 38400) { status = ERROR; /* baud rate out of range */ break; } /* Calculate the baud rate constant for the new baud rate * from the input clock frequency. This assumes that the * divide-by-16 bit is set in the Z8530 WR4 register (done * in tyCoInitChannel). */ baudConstant = ((pTyCoDv->baudFreq / 32) / arg) - 2; cr = pTyCoDv->cr; /* disable interrupts during chip access */ oldlevel = intLock (); *cr = SCC_WR0_SEL_WR12; /* LSB of baud constant */ *cr = (char)baudConstant; /* write LSB */ *cr = SCC_WR0_SEL_WR13; /* MSB of baud constant */ *cr = (char)(baudConstant >> 8); /* write MSB */ intUnlock (oldlevel); status = OK; break; default: status = tyIoctl (&pTyCoDv->tyDev, request, arg); break; } return (status); }/********************************************************************************* tyCoIntWr - interrupt level processing** This routine handles write interrupts from the SCC.** RETURNS: N/A** NOMANUAL*/void tyCoIntWr ( int channel /* interrupting serial channel */ ) { char outChar; FAST TY_CO_DEV *pTyCoDv = &tyCoDv [channel]; volatile char *cr = pTyCoDv->cr; if (pTyCoDv->created && tyITx (&pTyCoDv->tyDev, &outChar) == OK) { *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ *pTyCoDv->cr = outChar; } else { /* no more chars to xmit now. reset the tx int, * so the SCC does not keep interrupting. */ *cr = SCC_WR0_RST_TX_INT; } *cr = SCC_WR0_RST_HI_IUS; /* end the interrupt acknowledge */ }/******************************************************************************* tyCoIntRd - interrupt level input processing** This routine handles read interrupts from the SCC** RETURNS: N/A** NOMANUAL*/void tyCoIntRd ( int channel /* interrupting serial channel */ ) { FAST TY_CO_DEV *pTyCoDv = &tyCoDv [channel]; volatile char *cr = pTyCoDv->cr; char inchar; *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ inchar = *pTyCoDv->cr; if (pTyCoDv->created) tyIRd (&pTyCoDv->tyDev, inchar); *cr = SCC_WR0_RST_HI_IUS; /* reset the interrupt in the Z8530 */ }/************************************************************************ tyCoIntEx - miscellaneous interrupt processing** This routine handles miscellaneous interrupts on the SCC** RETURNS: N/A** NOMANUAL*/void tyCoIntEx ( int channel /* interrupting serial channel */ ) { FAST TY_CO_DEV *pTyCoDv = &tyCoDv [channel]; volatile char *cr = pTyCoDv->cr; *cr = SCC_WR0_ERR_RST; /* reset errors */ *cr = SCC_WR0_RST_HI_IUS; /* reset the interrupt in the Z8530 */ }/********************************************************************************* tyCoInt - interrupt level processing** This routine handles interrupts from both of the SCCs.* We determine from the parameter which SCC interrupted, then look at* the code to find out which channel and what kind of interrupt.** NOMANUAL*/void tyCoInt ( int sccNum ) { volatile char *cr; FAST char intStatus; FAST TY_CO_DEV *pTyCoDv; char outChar; /* We need to find out which channel interrupted. We need to read * the B channel of the interrupting SCC to find out which channel * really interrupted. Note that things are set up so that the A * channel is channel 0, even though on the chip it is the one with * the higher address */ pTyCoDv = &tyCoDv [(sccNum * 2) + 1]; cr = pTyCoDv->cr; *cr = SCC_WR0_SEL_WR2; /* read reg 2 */ intStatus = *cr; if ((intStatus & 0x08) != 0) { /* the A channel interrupted */ --pTyCoDv; cr = pTyCoDv->cr; } switch (intStatus & 0x06) { case 0x00: /* Tx Buffer Empty */ if (pTyCoDv->created && (tyITx (&pTyCoDv->tyDev, &outChar) == OK)) { *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ *pTyCoDv->cr = outChar; } else { /* no more chars to xmit now. reset the tx int, * so the SCC doesn't keep interrupting us. */ *cr = SCC_WR0_RST_TX_INT; } break; case 0x04: /* RxChar Avail */ if (pTyCoDv->created) { *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ tyIRd (&pTyCoDv->tyDev, *pTyCoDv->cr); } break; case 0x02: /* External Status Change */ *cr = SCC_WR0_ERR_RST; *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ outChar = *pTyCoDv->cr; /* throw away char */ break; case 0x06: /* Special receive condition */ *cr = SCC_WR0_ERR_RST; break; /* ignore */ } *cr = SCC_WR0_RST_HI_IUS; /* Reset the interrupt in the Z8530 */ }/********************************************************************************* tyCoStartup - transmitter startup routine** Call interrupt level character output routine.*/LOCAL void tyCoStartup( TY_CO_DEV *pTyCoDv /* ty device to start up */ ) { char outChar; if (tyITx (&pTyCoDv->tyDev, &outChar) == OK) { int oldLevel = intLock (); /* must be protected against interrupt */ *pTyCoDv->cr = SCC_WR0_SEL_WR8; /* select data register */ *pTyCoDv->cr = outChar; intUnlock (oldLevel); } }
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