ncr710lib2.c

IXP425的BSP代码

/* ncr710Lib2.c - NCR 53C710 SCSI I/O Processor (SIOP) library (SCSI-2) */

/* Copyright 1989-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
04p,19oct01,dat  Documentation formatting
04o,26feb99,dat  added init of wideXfer to FALSE. SPR 24089
04n,03dec98,ihw  Modified handling of ident message for new thread:
		 add normal message out (if any) - e.g. sync/wide xfer.
04m,26aug98,sut  renamed ncr710StepEnable into ncr710StepEnable2 ;
                 in ncr710CtrlCreate added support to use
                 ncr710StepEnable2 as the ncr710StepEnable
                 see also ncr710CommLib.c
04l,24aug98,sut  renamed ncr710SingleStep into ncr710SingleStep2 ;
                 In ncr710CtrlCreateScsi2 added support to use
                 ncr710SingleStep2 as the ncr710SingleStep
                 see also ncr710CommLib.c
04k,18May98,pfl  SPR 21260: added ncr710ResetATN() 
04j,09jul97,dgp  doc: correct fonts per SPR 7853
04i,29oct96,dgp  doc: editing for newly published SCSI libraries
04h,06may96,jds  and more doc tweaks...
04g,01may96,jds  yet more doc tweaks...
04f,08nov95,jds  more doc tweaks
04e,20sep95,jdi  doc cleanup.
04d,28apr95,jds  worked with ian on selection problem (hang) with WD33c93; 
		 integrated into WRS tree; backward compatability stuff
04c,16mar94,ihw  fixed problems highlighted by selection by WD 33C93
04b,27may94,ihw  documented prior to release
04a,02may94,ihw  major modifications to work with new SCSI architecture
    	    	    supports tagged commands
03b,23feb94,ihw  improved single-step support
03a,18feb94,ihw  modified for enhanced SCSI library: multiple initiators,
                    disconnect/reconnect and synchronous transfer supported
02l,10feb93,ccc  fixed cache problem and null pointers (spr 1995).
02k,26sep92,ccc  doc changes.
02j,18aug92,ccc  fixed warnings.
02i,31jul92,dnw  Changed to new cacheLib.
		 Added requirement that dma cache be write coherent and
		 removed corresponding flushes.
02h,20jul92,eve  Move debug macros from ncr710.h.
02g,20jul92,eve  Added cache support for 5.1. 
02f,18jul92,smb  Changed errno.h to errnoLib.h.
02e,13jul92,eve	 Make a single exit process both for OK and ERROR in 
		 ncr710ScsiPhase() and create ncr710CheckStatRegs().
02d,11jul92,eve	 Suppress ncr710CmdBuild() since scsiCmdBuild() is public
		 in scsiLib.c.Suppress ncr710Relocation() routine.
02c,02jul92,eve	 start ANSI modifications.
02b,21apr92,eve	 Add disconnect capability.
02a,03mar92,eve	 Add the process for new bit in the ncr710HwRegister() 
		 and suppress access to the EA bit in the other routines. 
01n,20feb92,eve  Change the clock frequency parameter by a value
                 like xxns * 100 in ncr710CtrlCreate().
01m,12jan91,eve  Add support for sync transfer capability.
01l,10dec91,eve  Correct bug in ncr710ScsiPhase() regarding the Bus fault
                 Wtd timeout and illegal instruction.
01k,29nov91,eve  Change semTake timeout in ncr710StartPhase().
01j,29nov91,eve  Correct use of pDevToSelect,suppress initialisation
                 devSync semaphore in ncr710HwInit().
01i,07nov91,eve  Perform a select with attention in ncr710ScsiPhase()
		 if useIdentify is set.
01h,01nov91,ccc  Documentation changes, changed modification numbers.
01g,01nov91,eve  Suppress pccchip2 include
01f,27oct91,eve  Suppress regOffset argument in ncr710CtlrCreate(),
		 the chip need to be connected to all of the address 
		 bus (31-0).
01e,27oct91,eve  Add ncr710SetHwRegister() routine.
01d,25oct91,eve  Allocate dynamicly ncrCtlShare data structure
		 keep only a pointer in SIOP info.
01c,24oct91,eve	 Change clockPeriod by a frequency value
		 in ncr710CtrlCreate().
01b,24oct91,eve  Try to cleaning up documentation.
01a,23oct91,eve  Created. 
*/

/*
DESCRIPTION
This is the I/O driver for the NCR 53C710 SCSI I/O Processor (SIOP).
It is designed to work with scsi2Lib.  This driver runs in
conjunction with a script program for the NCR 53C710 chip.
The script uses the NCR 53C710 DMA function for data transfers.
This driver supports cache functions through cacheLib.

USER-CALLABLE ROUTINES
Most of the routines in this driver are accessible only through the I/O
system.  Three routines, however, must be called directly.  
ncr710CtrlCreateScsi2() creates a controller structure and
ncr710CtrlInitScsi2() initializes it.
The NCR 53C710 hardware registers need to be configured according to
the hardware implementation.  If the default configuration is not correct,
the routine ncr710SetHwRegisterScsi2() must be used to properly configure
the registers.

INTERNAL
This driver supports multiple initiators, disconnect/reconnect, tagged
command queueing and synchronous data transfer protocol.  In general, the
SCSI system and this driver will automatically choose the best combination
of these features to suit the target devices used.  However, the default
choices may be over-ridden by using the function "scsiTargetOptionsSet()"
(see scsi2Lib).

There are debug variables to trace events in the driver.
<scsiDebug> scsi2Lib debug variable, trace event in scsi2Lib, ncr710ScsiPhase(),
and ncr710Transact().
<scsiIntsDebug> prints interrupt informations.

INCLUDE FILES
ncr710.h, ncr710_2.h, ncr710Script.h, ncr710Script2.h

SEE ALSO: scsiLib, scsi2Lib, cacheLib,
.pG "I/O System"
*/

#define  INCLUDE_SCSI2
#include "vxWorks.h"
#include "memLib.h"
#include "ctype.h"
#include "stdlib.h"
#include "string.h"
#include "stdio.h"
#include "logLib.h"
#include "semLib.h"
#include "intLib.h"
#include "errnoLib.h"
#include "cacheLib.h"
#include "taskLib.h"
#include "drv/scsi/ncr710.h"
#include "drv/scsi/ncr710Script.h"

/* defines */

typedef NCR_710_SCSI_CTRL SIOP;

#define SIOP_MAX_XFER_LENGTH  	((UINT) (0x00ffffff)) /* max data xfer length */


/* External */
IMPORT BOOL scsiDebug;
IMPORT BOOL scsiErrors;
IMPORT BOOL scsiIntsDebug;

IMPORT VOIDFUNCPTR ncr710SingleStepRtn; /* Single step routine */
IMPORT VOIDFUNCPTR ncr710StepEnableRtn; /* Step enable step routine */

/*
 *  Configurable options
 */
int ncr710SingleStepSemOptions = SEM_Q_PRIORITY;

char *ncr710ScsiTaskName      = SCSI_DEF_TASK_NAME;
int   ncr710ScsiTaskOptions   = SCSI_DEF_TASK_OPTIONS;
int   ncr710ScsiTaskPriority  = SCSI_DEF_TASK_PRIORITY;
int   ncr710ScsiTaskStackSize = SCSI_DEF_TASK_STACK_SIZE;


/* forward declarations */

LOCAL void   ncr710HwInit        (SIOP *pSiop);
LOCAL int    ncr710BusIdGet      (SIOP *pSiop, UINT busIdBits);
LOCAL UINT   ncr710RemainderGet  (SIOP *pSiop, UINT phase);
LOCAL int    ncr710EventTypeGet  (SIOP *pSiop);
LOCAL STATUS ncr710PhaseMismatch (NCR710_THREAD * pThread,
				  int             phase,
				  UINT            remCount);
LOCAL STATUS ncr710ScsiBusControl (SIOP *pSiop, int operation);
LOCAL void   ncr710ScsiBusReset   (SIOP *pSiop);
LOCAL STATUS ncr710ThreadActivate (SIOP *pSiop, NCR710_THREAD *pThread);
LOCAL BOOL   ncr710ThreadAbort    (SIOP *pSiop, NCR710_THREAD *pThread);
LOCAL void   ncr710Event          (SIOP *pSiop, NCR710_EVENT  *pEvent);
LOCAL void   ncr710ThreadEvent   (NCR710_THREAD *pThread, NCR710_EVENT *pEvent);
LOCAL void   ncr710InitEvent     (NCR710_THREAD *pThread, NCR710_EVENT *pEvent);
LOCAL void   ncr710InitIdentEvent(NCR710_THREAD *pThread, NCR710_EVENT *pEvent);
LOCAL void   ncr710TargIdentEvent(NCR710_THREAD *pThread, NCR710_EVENT *pEvent);
LOCAL void   ncr710IdentInContinue (NCR710_THREAD *pThread);
LOCAL void   ncr710ThreadReconnect (NCR710_THREAD *pThread);
LOCAL void   ncr710SharedMemInit   (SIOP *pSiop, NCR710_SHARED *pShMem);
LOCAL STATUS ncr710ThreadInit      (SIOP *pSiop, NCR710_THREAD *pThread);
LOCAL STATUS ncr710IdentThreadInit (NCR710_THREAD *pThread);
LOCAL void   ncr710ThreadUpdate    (NCR710_THREAD *pThread);
LOCAL void   ncr710ThreadComplete  (NCR710_THREAD *pThread);
LOCAL void   ncr710ThreadDefer     (NCR710_THREAD *pThread);
LOCAL void   ncr710ThreadFail      (NCR710_THREAD *pThread, int errNum);
LOCAL void   ncr710ThreadStateSet  (NCR710_THREAD *pThread,
				    SCSI_THREAD_STATE state);
LOCAL STATUS ncr710Activate      (SIOP               *pSiop,
				  NCR710_THREAD      *pThread);
LOCAL STATUS ncr710Resume        (SIOP               *pSiop,
				  NCR710_THREAD      *pThread,
				  NCR710_SCRIPT_ENTRY entryId);
LOCAL void   ncr710Abort         (SIOP               *pSiop);
LOCAL void   ncr710ScriptStart   (SIOP               *pSiop,
				  NCR710_THREAD      *pThread,
				  NCR710_SCRIPT_ENTRY entryId);
LOCAL STATUS ncr710ThreadParamsSet (NCR710_THREAD * pThread,
				    UINT8      offset,
				    UINT8      period);
LOCAL STATUS ncr710XferParamsQuery (SCSI_CTRL *pScsiCtrl,
				    UINT8     *pOffset,
				    UINT8     *pPeriod);
LOCAL STATUS ncr710XferParamsSet   (SCSI_CTRL *pScsiCtrl,
				    UINT8      offset,
				    UINT8      period);
LOCAL BOOL   ncr710XferParamsCvt   (SIOP  *pSiop,
				    UINT8 *pOffset,
				    UINT8 *pPeriod,
				    UINT8 *pXferParams,
				    UINT8 *pClockDiv);
LOCAL void   ncr710ResetATN ( FAST SCSI_CTRL *pScsiCtrl );

LOCAL void ncr710SingleStep2 (SIOP* pSiop, BOOL verbose);
LOCAL void ncr710StepEnable2 (SIOP* pSiop, BOOL boolValue);
LOCAL void   ncr710ResetATN ( FAST SCSI_CTRL *pScsiCtrl );

/*******************************************************************************
*
* ncr710CtrlCreateScsi2 - create a control structure for the NCR 53C710 SIOP
*
* This routine creates an SIOP data structure and must be called before
* using an SIOP chip. It must be called exactly once for a 
* specified SIOP controller.
* Since it allocates memory for a structure needed by all routines in 
* ncr710Lib, it must be called before any other routines in the library.
* After calling this routine, ncr710CtrlInitScsi2() must be called at least
* once before any SCSI transactions are initiated using the SIOP.
*
* A detailed description of the input parameters follows:
* .iP <baseAdrs>
* the address at which the CPU accesses the lowest (SCNTL0/SIEN)
* register of the SIOP.
* .iP <clkPeriod>
* the period of the SIOP SCSI clock input, in nanoseconds, multiplied
* by 100.  This is used to determine the clock period for the
* SCSI core of the chip and affects the timing of both asynchronous
* and synchronous transfers.
* Several commonly used values are defined in ncr710.h as follows:
*.CS
*	NCR710_1667MHZ  6000    /@ 16.67Mhz chip @/
*	NCR710_20MHZ    5000    /@ 20Mhz chip    @/
*	NCR710_25MHZ    4000    /@ 25Mhz chip    @/
*	NCR710_3750MHZ  2667    /@ 37.50Mhz chip @/
*	NCR710_40MHZ    2500    /@ 40Mhz chip    @/
*	NCR710_50MHZ    2000    /@ 50Mhz chip    @/
*	NCR710_66MHZ    1515    /@ 66Mhz chip    @/
*	NCR710_6666MHZ  1500    /@ 66.66Mhz chip @/
*.CE
*
* RETURNS: A pointer to the NCR_710_SCSI_CTRL structure, or NULL if memory 
* is unavailable or there are invalid parameters.
*/
NCR_710_SCSI_CTRL *ncr710CtrlCreateScsi2 
    (
    UINT8 *baseAdrs,		/* base address of the SIOP */
    UINT   clkPeriod		/* clock controller period (nsec*100) */
    )

    {
    FAST SIOP *pSiop;		    /* ptr to SIOP info */
    int        nBytes;	    	    /* total amount of cache-coherent memory */
    SCSI_CTRL *pScsiCtrl;
    static NCR710_HW_REGS ncr710HwRegs = DEFAULT_710_HW_REGS;


    /* SingleStep routine selection */
    
    ncr710SingleStepRtn = ncr710SingleStep2;
    ncr710StepEnableRtn = ncr710StepEnable2;


    /* verify parameters */
    if (baseAdrs == ((UINT8 *) NULL))
	return ((SIOP *) NULL);
    
    if ((clkPeriod > NCR710_1667MHZ) ||  
        (clkPeriod < NCR710_6666MHZ))
        return ((SIOP *) NULL);
    
    /* check that dma buffers are cache-coherent */

    if (!CACHE_DMA_IS_WRITE_COHERENT () ||
	!CACHE_DMA_IS_READ_COHERENT ())
	{
	SCSI_MSG ("ncr710CtrlCreateScsi2: shared memory not cache coherent.\n",
		  0, 0, 0, 0, 0, 0);
        return ((SIOP *) NULL);
	}

    /* calloc the controller info structure and two shared data areas */

    nBytes = sizeof (SIOP) + 2 * sizeof (NCR710_SHARED);

    if ((pSiop = (SIOP *) cacheDmaMalloc (nBytes)) == (SIOP *) NULL)
        return ((SIOP *) NULL);

    bzero ((char *) pSiop, nBytes);

    pSiop->pIdentShMem  = (NCR710_SHARED *) (pSiop + 1);
    pSiop->pClientShMem = pSiop->pIdentShMem + 1;

    /* set up configuration variables */

    pScsiCtrl = (SCSI_CTRL *) pSiop;
    
    pScsiCtrl->eventSize  = sizeof (NCR710_EVENT);
    pScsiCtrl->threadSize = sizeof (NCR710_THREAD);

    /* fill in virtual functions used by SCSI library */
    
    pScsiCtrl->maxBytesPerXfer = SIOP_MAX_XFER_LENGTH;

    pScsiCtrl->scsiTransact = (FUNCPTR) scsiTransact;

    pScsiCtrl->scsiEventProc       = (VOIDFUNCPTR) ncr710Event;
    pScsiCtrl->scsiThreadInit      = (FUNCPTR)     ncr710ThreadInit;
    pScsiCtrl->scsiThreadActivate  = (FUNCPTR)     ncr710ThreadActivate;
    pScsiCtrl->scsiThreadAbort     = (FUNCPTR)     ncr710ThreadAbort;
    pScsiCtrl->scsiBusControl      = (FUNCPTR)     ncr710ScsiBusControl;
    pScsiCtrl->scsiXferParamsQuery = (FUNCPTR)     ncr710XferParamsQuery;
    pScsiCtrl->scsiXferParamsSet   = (FUNCPTR)     ncr710XferParamsSet;

    /* the following virtual functions are not used with the NCR 53C710 */
   
    pScsiCtrl->wideXfer		       = FALSE;
    pScsiCtrl->scsiWideXferParamsQuery = NULL;
    pScsiCtrl->scsiWideXferParamsSet   = NULL;
    pScsiCtrl->scsiDevSelect = NULL;
    pScsiCtrl->scsiInfoXfer  = NULL;

    /* fill in generic SCSI info for this controller */

    scsiCtrlInit (&pSiop->scsiCtrl);

    /* fill in SIOP specific data for this controller */

    pSiop->pSien     = baseAdrs + OFF_SIEN;
    pSiop->pSdid     = baseAdrs + OFF_SDID;
    pSiop->pScntl1   = baseAdrs + OFF_SCNTL1;
    pSiop->pScntl0   = baseAdrs + OFF_SCNTL0;
    pSiop->pSocl     = baseAdrs + OFF_SOCL;
    pSiop->pSodl     = baseAdrs + OFF_SODL;
    pSiop->pSxfer    = baseAdrs + OFF_SXFER;
    pSiop->pScid     = baseAdrs + OFF_SCID;
    pSiop->pSbcl     = baseAdrs + OFF_SBCL;
    pSiop->pSbdl     = baseAdrs + OFF_SBDL;
    pSiop->pSidl     = baseAdrs + OFF_SIDL;
    pSiop->pSfbr     = baseAdrs + OFF_SFBR;
    pSiop->pSstat2   = baseAdrs + OFF_SSTAT2;
    pSiop->pSstat1   = baseAdrs + OFF_SSTAT1;
    pSiop->pSstat0   = baseAdrs + OFF_SSTAT0;
    pSiop->pDstat    = baseAdrs + OFF_DSTAT;
    pSiop->pDsa      = (UINT *) (baseAdrs + OFF_DSA);
    pSiop->pCtest3   = baseAdrs + OFF_CTEST3;
    pSiop->pCtest2   = baseAdrs + OFF_CTEST2;
    pSiop->pCtest1   = baseAdrs + OFF_CTEST1;
    pSiop->pCtest0   = baseAdrs + OFF_CTEST0;
    pSiop->pCtest7   = baseAdrs + OFF_CTEST7;
    pSiop->pCtest6   = baseAdrs + OFF_CTEST6;
    pSiop->pCtest5   = baseAdrs + OFF_CTEST5;
    pSiop->pCtest4   = baseAdrs + OFF_CTEST4;
    pSiop->pTemp     = (UINT *) (baseAdrs + OFF_TEMP);
    pSiop->pLcrc     = baseAdrs + OFF_LCRC;
    pSiop->pCtest8   = baseAdrs + OFF_CTEST8;
    pSiop->pIstat    = baseAdrs + OFF_ISTAT;
    pSiop->pDfifo    = baseAdrs + OFF_DFIFO;
    pSiop->pDcmd     = baseAdrs + OFF_DCMD;
    pSiop->pDbc      = (UINT *) (baseAdrs + OFF_DBC);
    pSiop->pDnad     = (UINT *) (baseAdrs + OFF_DNAD);
    pSiop->pDsp      = (UINT *) (baseAdrs + OFF_DSP);
    pSiop->pDsps     = (UINT *) (baseAdrs + OFF_DSPS);
    pSiop->pScratch0 = baseAdrs + OFF_SCRATCH0;
    pSiop->pScratch1 = baseAdrs + OFF_SCRATCH1;
    pSiop->pScratch2 = baseAdrs + OFF_SCRATCH2;
    pSiop->pScratch3 = baseAdrs + OFF_SCRATCH3;
    pSiop->pDcntl    = baseAdrs + OFF_DCNTL;
    pSiop->pDwt      = baseAdrs + OFF_DWT;
    pSiop->pDien     = baseAdrs + OFF_DIEN;
    pSiop->pDmode    = baseAdrs + OFF_DMODE;
    pSiop->pAdder    = (UINT *) (baseAdrs + OFF_ADDER);

    pSiop->clkPeriod = clkPeriod;

    /*
     *	Initialise hardware-dependent registers to default values.
     */
    bcopy ((char *)&ncr710HwRegs, (char *)&pSiop->hwRegs,
	                          sizeof (NCR710_HW_REGS));

    /*
     *	Create synchronisation semaphore for single-step support
     */
    if ((pSiop->singleStepSem = semBCreate(ncr710SingleStepSemOptions,
					   SEM_EMPTY)) == NULL)
	{
	SCSI_MSG ("ncr710CtrlCreateScsi2: semBCreate of singleStepSem failed.\n"
		  , 0, 0, 0, 0, 0, 0);
	goto failed;
        }

    /*
     *	Initialise controller state variables
     */
    pSiop->state      = NCR710_STATE_IDLE;
    pSiop->cmdPending = FALSE;

    /*
     *	Initialize fixed fields in client shared data area
     */
    ncr710SharedMemInit (pSiop, pSiop->pClientShMem);

    /*
     *	Identification thread has been created by the generic initialisation.
     *	Initialise it for use with the NCR 53C710.
     */