smcfdc37b78x.c

IXP425的BSP代码

LOCAL STATUS smcFdc37b78xEnbKbd
    (
    VOID
    )
    {
    smcFdc37b78xEnterCfg ();

    /* activate keyboard device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_KBD, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);
    /* assign an interrupt # to keyboard device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_KBD, SMCFDC37B78X_INTERRUPT,
                           SMCFDC37B78X_INTR_KBD, SMCFDC37B78X_MASK_ALL);

    /* activate Auxiliary device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);
    
    /* Keyboard IRQ */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_GP60_INDEX,
                           SMCFDC37B78X_GP60_IRQ1_OUT,
                           SMCFDC37B78X_GP_FUNC_MASK);
    
    /* configure auxiliary device to support parallel interrupts */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_IRQMUX_IDX,
                           SMCFDC37B78X_IRQ_PARALLEL,
                           SMCFDC37B78X_IRQ_PARALLEL_MASK);
    
    smcFdc37b78xExitCfg ();
    return (OK);
    }


/*******************************************************************************
*
* smcFdc37b78xEnbCom1 - enables COM1 on superIO
*
* This routine will enable everything required for COM1 device
*
* RETURNS: OK/ERROR
*/

LOCAL STATUS smcFdc37b78xEnbCom1
    (
    VOID
    )
    {
    smcFdc37b78xEnterCfg ();

    /* configure and activate serial device 1 */
    smcFdc37b78xCfgDev (SMCFDC37B78X_COM1, SMCFDC37B78X_COM1_IOHIGH,
                        SMCFDC37B78X_COM1_IOLOW, SMCFDC37B78X_INTR_COM1);

    /* enable high speed services on serial device 1 */
    smcFdc37b78xModReg (SMCFDC37B78X_COM1_MCR, SMCFDC37B78X_COM_MCROUT2,
                        SMCFDC37B78X_COM_MCROUT2_MASK); 

    /* activate Auxiliary device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);

    /* Serial COM1 IRQ */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_GP62_INDEX,
                           SMCFDC37B78X_GP62_IRQ4_OUT,
                           SMCFDC37B78X_GP_FUNC_MASK);
    
    /* configure auxiliary device to support parallel interrupts */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_IRQMUX_IDX,
                           SMCFDC37B78X_IRQ_PARALLEL,
                           SMCFDC37B78X_IRQ_PARALLEL_MASK);
    
    smcFdc37b78xExitCfg ();
    return (OK);
    }


/*******************************************************************************
*
* smcFdc37b78xEnbCom2 - enables COM2 on superIO
*
* This routine will enable everything required for COM2 device
*
* RETURNS: OK/ERROR
*/

LOCAL STATUS smcFdc37b78xEnbCom2
    (
    VOID
    )
    {
    smcFdc37b78xEnterCfg ();

    /* configure and activate serial device 2 */
    smcFdc37b78xCfgDev (SMCFDC37B78X_COM2, SMCFDC37B78X_COM2_IOHIGH,
                        SMCFDC37B78X_COM2_IOLOW, SMCFDC37B78X_INTR_COM2);

    /* enable high speed services on serial device 2 */    
    smcFdc37b78xModReg (SMCFDC37B78X_COM2_MCR, SMCFDC37B78X_COM_MCROUT2,
                        SMCFDC37B78X_COM_MCROUT2_MASK);

    /* activate Auxiliary device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);

    /* Serial COM2 IRQ */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_GP61_INDEX,
                           SMCFDC37B78X_GP61_IRQ3_OUT,
                           SMCFDC37B78X_GP_FUNC_MASK);
    
    /* configure auxiliary device to support parallel interrupts */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_IRQMUX_IDX,
                           SMCFDC37B78X_IRQ_PARALLEL,
                           SMCFDC37B78X_IRQ_PARALLEL_MASK);
    
    smcFdc37b78xExitCfg ();
    return (OK);
    }


/*******************************************************************************
*
* smcFdc37b78xEnbLpt1 - enables LPT1 on superIO
*
* This routine will enable everything required for LPT1 device
*
* RETURNS: OK/ERROR
*/

LOCAL STATUS smcFdc37b78xEnbLpt1
    (
    VOID
    )
    {
    smcFdc37b78xEnterCfg ();

    /* configure and activate parallel device */
    smcFdc37b78xCfgDev (SMCFDC37B78X_LPT1, SMCFDC37B78X_LPT1_IOHIGH,
                        SMCFDC37B78X_LPT1_IOLOW, SMCFDC37B78X_INTR_LPT1);

    /* activate Auxiliary device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);

    /* Parallel Port IRQ */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_GP65_INDEX,
                           SMCFDC37B78X_GP65_IRQ7_OUT,
                           SMCFDC37B78X_GP_FUNC_MASK); 

    
    /* configure auxiliary device to support parallel interrupts */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_IRQMUX_IDX,
                           SMCFDC37B78X_IRQ_PARALLEL,
                           SMCFDC37B78X_IRQ_PARALLEL_MASK);

    smcFdc37b78xExitCfg ();
    return (OK);
    }


/*******************************************************************************
*
* smcFdc37b78xEnbFdd - enables FDD on superIO
*
* This routine will enable everything required for FDD device
*
* RETURNS: OK/ERROR
*/

LOCAL STATUS smcFdc37b78xEnbFdd
    (
    VOID
    )
    {
    smcFdc37b78xEnterCfg ();

    /* activate floppy device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_FDD, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);

    /* activate Auxiliary device */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_LOGDEV_ACTIVATE,
                           SMCFDC37B78X_ACT_DEV, SMCFDC37B78X_MASK_ALL);

    /* Floppy Disk Drive IRQ */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_GP64_INDEX,
                           SMCFDC37B78X_GP64_IRQ6_OUT,
                           SMCFDC37B78X_GP_FUNC_MASK);

    /* configure auxiliary device to support parallel interrupts */
    smcFdc37b78xCfgDevReg (SMCFDC37B78X_AUX, SMCFDC37B78X_IRQMUX_IDX,
                           SMCFDC37B78X_IRQ_PARALLEL,
                           SMCFDC37B78X_IRQ_PARALLEL_MASK);
    
    smcFdc37b78xExitCfg ();
    return (OK);
    }

/*******************************************************************************
*
* smcFdc37b78xDevCreate - set correct IO port addresses for Super I/O chip
*
* This routine will initialize smcFdc37b78xIoPorts data structure. These ioports
* can either be changed on-the-fly or overriding SMCFDC37B78X_CONFIG_PORT, 
* SMCFDC37B78X_INDEX_PORT and SMCFDC37B78X_DATA_PORT. This is a necassary step
* in intialization of superIO chip and logical devices embedded in it.
*
* RETURNS: NONE
*/

VOID smcFdc37b78xDevCreate
    (
    SMCFDC37B78X_IOPORTS *smcFdc37b78x_iop
    )
    {

    if (smcFdc37b78x_iop == NULL)
        {
        smcFdc37b78xIopPtr = &smcFdc37b78xIoPorts;
        smcFdc37b78xIopPtr->config = SMCFDC37B78X_CONFIG_PORT;
        smcFdc37b78xIopPtr->index  = SMCFDC37B78X_INDEX_PORT;
        smcFdc37b78xIopPtr->data   = SMCFDC37B78X_DATA_PORT;
        }
    else
        {
        memcpy (&smcFdc37b78xIoPorts, smcFdc37b78x_iop,
                sizeof (SMCFDC37B78X_IOPORTS));
        }
    }

/*******************************************************************************
*
* smcFdc37b78xInit - initializes Super I/O chip Library
*
* This routine will initialize serial, keyboard, floppy disk,
* parallel port and gpio pins as a part super i/o intialization
*
* RETURNS: NONE
*/

VOID smcFdc37b78xInit
    (
    int devInitMask
    )
    {
    if (devInitMask & SMCFDC37B78X_FDD_EN)
        {
        smcFdc37b78xEnbFdd ();
        }

    if (devInitMask & SMCFDC37B78X_KBD_EN)
        {
        smcFdc37b78xEnbKbd ();
        }

    if (devInitMask & SMCFDC37B78X_COM1_EN)
        {
        smcFdc37b78xEnbCom1 ();
        }

    if (devInitMask & SMCFDC37B78X_COM2_EN)
        {
        smcFdc37b78xEnbCom2 ();
        }

    if (devInitMask & SMCFDC37B78X_LPT1_EN)
        {
        smcFdc37b78xEnbLpt1 ();
        }
    }

/*******************************************************************************
*
* smcFdc37b78xKbdInit - initializes the keyboard controller
*
* This routine will initialize keyboard controller
*
* RETURNS: OK/ERROR
*/

STATUS smcFdc37b78xKbdInit
    (
    VOID
    )
    {
    /* Self Test */
    SMCFDC37B78X_KBD_WRT_CTLSTS(SMCFDC37B78X_KBD_CCMD_SELFTEST);   
    if (smcFdc37b78xKbdRdy (SMCFDC37B78X_KBD_CTLSTS_OBF) != OK)
        return (ERROR);
    /* Self Test PASSED ? */
    if (SMCFDC37B78X_KBD_RD_DATA() != SMCFDC37B78X_KBD_SELFTEST_PASS) 
        return (ERROR);

    /* Interface Test */
    SMCFDC37B78X_KBD_WRT_CTLSTS(SMCFDC37B78X_KBD_CCMD_IFCTEST); 
    if (smcFdc37b78xKbdRdy (SMCFDC37B78X_KBD_CTLSTS_OBF) != OK)
        return (ERROR);
    /* Interface Test PASSED ? */
    if (SMCFDC37B78X_KBD_RD_DATA() != SMCFDC37B78X_KBD_IFCTEST_PASS)
        return (ERROR);
    
    /* Write to output port 2 */
    SMCFDC37B78X_KBD_WRT_CTLSTS(SMCFDC37B78X_KBD_CCMD_WRTPORT2);
    if (smcFdc37b78xKbdRdy (SMCFDC37B78X_KBD_CTLSTS_IBF) == OK)
        return (ERROR);
    /* P24 ENABLED */
    SMCFDC37B78X_KBD_WRT_DATA(SMCFDC37B78X_KBD_IRQ_KSC_EN);

    return (OK);
    }