📄 m68360timer.c
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** SEE ALSO: sysAuxClkConnect(), sysAuxClkDisable(), sysAuxClkRateSet()*/void sysAuxClkEnable (void) { UINT32 tempDiv = SYS_CPU_FREQ / (auxClkTicksPerSecond << 8); if ((!sysAuxClkRunning) && (tempDiv <= USHRT_MAX * 16)) { /* start, reset, but disable timer 2 */ *M360_CPM_TGCR(AUX_TMR_BASE) &= ~(TMR_TGCR_RST2 | TMR_TGCR_STP2); *M360_CPM_TCN2(AUX_TMR_BASE) = 0x0; /* reset timer count */ if (tempDiv <= USHRT_MAX) { *M360_CPM_TRR2(AUX_TMR_BASE) = (UINT16) tempDiv; *M360_CPM_TMR2(AUX_TMR_BASE) = TMR_TMR_ICLK_CLK | TMR_TMR_ORI | TMR_TMR_FRR | (TMR_TMR_PS & 0xff00); } else { *M360_CPM_TRR2(AUX_TMR_BASE) = (UINT16) (tempDiv / 16); *M360_CPM_TMR2(AUX_TMR_BASE) = TMR_TMR_ICLK_CLK16 | TMR_TMR_ORI | TMR_TMR_FRR | (TMR_TMR_PS & 0xff00); } *M360_CPM_TER2(AUX_TMR_BASE) = 0xffff; /* clear event */ *M360_CPM_CIMR(AUX_TMR_BASE) |= CPIC_CIXR_TMR2; /* unmask interupt */ *M360_CPM_TGCR(AUX_TMR_BASE) |= TMR_TGCR_RST2; /* enable timer 2 */ sysAuxClkRunning = TRUE; } }/********************************************************************************* sysAuxClkRateGet - get the auxiliary clock rate** This routine returns the interrupt rate of the auxiliary clock.** RETURNS: The number of ticks per second of the auxiliary clock.** SEE ALSO: sysAuxClkEnable(), sysAuxClkRateSet()*/int sysAuxClkRateGet (void) { return (auxClkTicksPerSecond); }/********************************************************************************* sysAuxClkRateSet - set the auxiliary clock rate** This routine sets the interrupt rate of the auxiliary clock.* It does not enable auxiliary clock interrupts.** RETURNS: OK, or ERROR if the tick rate is invalid or the timer cannot be set.** SEE ALSO: sysAuxClkEnable(), sysAuxClkRateGet()*/STATUS sysAuxClkRateSet ( int ticksPerSecond /* number of clock interrupts per second */ ) { if (ticksPerSecond < AUX_CLK_RATE_MIN || ticksPerSecond > AUX_CLK_RATE_MAX) return (ERROR); auxClkTicksPerSecond = ticksPerSecond; if (sysAuxClkRunning) { sysAuxClkDisable (); sysAuxClkEnable (); } return (OK); }#ifdef INCLUDE_TIMESTAMP/********************************************************************************* sysTimestampInt - timestamp timer interrupt handler** This rountine handles the timestamp timer interrupt. A user routine is* called, if one was connected by sysTimestampConnect().** RETURNS: N/A** SEE ALSO: sysTimestampConnect()*/LOCAL void sysTimestampInt (void) { *M360_CPM_TER4(SYS_TMR_BASE) |= TMR_TER_REF; /* clear TMR4 reference bit */ *M360_CPM_CISR(SYS_TMR_BASE) = CPIC_CIXR_TMR4; /* clear TMR4 interrupt register bit */ if (sysTimestampRoutine != NULL) /* call user routine */ (*sysTimestampRoutine) (sysTimestampArg); }/********************************************************************************* sysTimestampConnect - connect a user routine to the timestamp timer interrupt** This routine specifies the user interrupt routine to be called at each* timestamp timer interrupt. It does not enable the timestamp timer itself.** RETURNS: OK, or ERROR if sysTimestampInt() interrupt handler is not used.*/STATUS sysTimestampConnect ( FUNCPTR routine, /* routine called at each timestamp timer interrupt */ int arg /* argument with which to call routine */ ) { sysTimestampRoutine = routine; sysTimestampArg = arg; return (OK); }/********************************************************************************* sysTimestampEnable - initialize and enable the timestamp timer**/STATUS sysTimestampEnable (void) { if (sysTimestampRunning) { *M360_CPM_TCN3(SYS_TMR_BASE) = (UINT32) 0; /* clear the counter */ return (OK); } (void) intConnect (INUM_TO_IVEC (INT_VEC_TMR4(SYS_TMR_BASE)), (VOIDFUNCPTR) sysTimestampInt, NULL); sysTimestampRunning = TRUE; /* cascade timer 3 and 4 in order to get a 32 bit timer */ *M360_CPM_TGCR(SYS_TMR_BASE) |= TMR_TGCR_CAS4; /* start, reset, but disable timers 3 and 4 */ *M360_CPM_TGCR(SYS_TMR_BASE) &= ~(TMR_TGCR_RST4 | TMR_TGCR_RST3 | TMR_TGCR_STP4 | TMR_TGCR_STP3 ); /* When timers 3 and 4 are in cascade mode, TMR4 is the mode register for * the cascaded 32 bit timer, while TMR3 is ignored. * Use prescaler of zero to divide the clock (SYS_CPU_FREQ) by 1. */ *M360_CPM_TMR4(SYS_TMR_BASE) = 0x0000 | TMR_TMR_ICLK_CLK | TMR_TMR_ORI | TMR_TMR_FRR; *M360_CPM_TMR3(SYS_TMR_BASE) = 0x0; *((UINT32 *)M360_CPM_TRR3(SYS_TMR_BASE)) = (UINT32) sysTimestampPeriod (); *((UINT32 *)M360_CPM_TCN3(SYS_TMR_BASE)) = (UINT32) 0; *M360_CPM_TER4(SYS_TMR_BASE) = (UINT16) 0xffff; *M360_CPM_CIMR(SYS_TMR_BASE) |= CPIC_CIXR_TMR4; *M360_CPM_TGCR(SYS_TMR_BASE) |= TMR_TGCR_RST4 | TMR_TGCR_RST3; /* enable */ return (OK); }/********************************************************************************* sysTimestampDisable - turn off auxiliary clock interrupts** This routine disables auxiliary clock interrupts.** RETURNS: N/A** SEE ALSO: sysTimestampEnable()*/STATUS sysTimestampDisable (void) { if (sysTimestampRunning) { *M360_CPM_CIMR(SYS_TMR_BASE) &= ~CPIC_CIXR_TMR4; /* disable interrupt */ *M360_CPM_CIMR(SYS_TMR_BASE) &= ~CPIC_CIXR_TMR3; /* disable interrupt */ *M360_CPM_TGCR(SYS_TMR_BASE) |= TMR_TGCR_STP4; /* stop timer */ *M360_CPM_TGCR(SYS_TMR_BASE) |= TMR_TGCR_STP3; /* stop timer */ sysTimestampRunning = FALSE; /* clock is no longer running */ } return (OK); }/********************************************************************************* sysTimestampPeriod - get the timestamp timer period** This routine returns the period of the timestamp timer in ticks.* The period, or terminal count, is the number of ticks to which the timestamp* timer will count before rolling over and restarting the counting process.** RETURNS: The period of the timestamp timer in counter ticks.*/UINT32 sysTimestampPeriod (void) { return (0xffffffff); /* highest period -> freerunning */ }/********************************************************************************* sysTimestampFreq - get the timestamp timer clock frequency** This routine returns the frequency of the timer clock, in ticks per second.* The rate of the timestamp timer should be set explicitly within the BSP,* in the sysHwInit() routine.** RETURNS: The timestamp timer clock frequency, in ticks per second.*/UINT32 sysTimestampFreq (void) { UINT32 divider; /* * Get the prescaler value from TMR4. TMR3 is ignored in cascade mode. */ divider = (*M360_CPM_TMR4(SYS_TMR_BASE) >> 8) + 1; return (SYS_CPU_FREQ / divider); }/********************************************************************************* sysTimestamp - get the timestamp timer tick count** This routine returns the current value of the timestamp timer tick counter.* The tick count can be converted to seconds by dividing by the return of* sysTimestampFreq().** This routine should be called with interrupts locked. If interrupts are* not already locked, sysTimestampLock() should be used instead.** RETURNS: The current timestamp timer tick count.** SEE ALSO: sysTimestampLock()*/UINT32 sysTimestamp (void) { return (*((UINT32 *) M360_CPM_TCN3(SYS_TMR_BASE))); }/********************************************************************************* sysTimestampLock - get the timestamp timer tick count** This routine returns the current value of the timestamp timer tick counter.* The tick count can be converted to seconds by dividing by the return of* sysTimestampFreq().** This routine locks interrupts for cases where it is necessary to stop the* tick counter in order to read it, or when two independent counters must* be read. If interrupts are already locked, sysTimestamp() should be* used instead.** RETURNS: The current timestamp timer tick count.** SEE ALSO: sysTimestamp()*/UINT32 sysTimestampLock (void) { return (*((UINT32 *) M360_CPM_TCN3(SYS_TMR_BASE))); }#endif /* INCLUDE_TIMESTAMP */
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