📄 ps2simplehard.lst
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(0122) /*
(0123) for(i=0; unshifted[i][0]!=val && unshifted[i][0]; i++)
(0124) ;
(0125) 上述写法较为灵活，但KEIL非UNIXC标准，不能采用该写法
(0126) */
(0127) for(i=0; unshifted[i][0]!=val && i<59; i++)
02D4 2744 CLR R20
02D5 C001 RJMP 0x02D7
02D6 9543 INC R20
02D7 E082 LDI R24,2
02D8 9F84 MUL R24,R20
02D9 01F0 MOVW R30,R0
02DA E584 LDI R24,0x54
02DB E090 LDI R25,0
02DC 0FE8 ADD R30,R24
02DD 1FF9 ADC R31,R25
02DE 91E4 LPM R30,0(Z)
02DF 17E0 CP R30,R16
02E0 F011 BEQ 0x02E3
02E1 334B CPI R20,0x3B
02E2 F398 BCS 0x02D6
(0128) ;
(0129) if(unshifted[i][0] == val)
02E3 E082 LDI R24,2
02E4 9F84 MUL R24,R20
02E5 01F0 MOVW R30,R0
02E6 E584 LDI R24,0x54
02E7 E090 LDI R25,0
02E8 0FE8 ADD R30,R24
02E9 1FF9 ADC R31,R25
02EA 91E4 LPM R30,0(Z)
02EB 17E0 CP R30,R16
02EC F009 BEQ 0x02EE
02ED C035 RJMP 0x0323
(0130) ; //状态指示
(0131)
(0132) }
02EE C034 RJMP 0x0323
(0133) else // If shift pressed
(0134) {
(0135) /*
(0136) for(i=0; unshifted[i][0]!=val && unshifted[i][0]; i++)
(0137) ;
(0138) 上述写法较为灵活，但KEIL非UNIXC标准，不能采用该写法
(0139) */
(0140) for(i=0; shifted[i][0]!=val && i<59; i++)
02EF 2744 CLR R20
02F0 C001 RJMP 0x02F2
02F1 9543 INC R20
02F2 E082 LDI R24,2
02F3 9F84 MUL R24,R20
02F4 01F0 MOVW R30,R0
02F5 EC8A LDI R24,0xCA
02F6 E090 LDI R25,0
02F7 0FE8 ADD R30,R24
02F8 1FF9 ADC R31,R25
02F9 91E4 LPM R30,0(Z)
02FA 17E0 CP R30,R16
02FB F011 BEQ 0x02FE
02FC 334B CPI R20,0x3B
02FD F398 BCS 0x02F1
(0141) ;
(0142) if(shifted[i][0] == val)
02FE E082 LDI R24,2
02FF 9F84 MUL R24,R20
0300 01F0 MOVW R30,R0
0301 EC8A LDI R24,0xCA
0302 E090 LDI R25,0
0303 0FE8 ADD R30,R24
0304 1FF9 ADC R31,R25
0305 91E4 LPM R30,0(Z)
0306 17E0 CP R30,R16
0307 F4D9 BNE 0x0323
(0143) SHIFT_DATA_PORT = val;//状态指示
0308 BB08 OUT 0x18,R16
(0144) }
(0145) }
(0146) }
0309 C019 RJMP 0x0323
(0147) else
(0148) {
(0149) isUp=0;
030A 2422 CLR R2
030B 92200062 STS isUp,R2
(0150) switch(val)
030D 2F40 MOV R20,R16
030E 2755 CLR R21
030F 3142 CPI R20,0x12
0310 E0E0 LDI R30,0
0311 075E CPC R21,R30
0312 F049 BEQ 0x031C
0313 3142 CPI R20,0x12
0314 E0E0 LDI R30,0
0315 075E CPC R21,R30
0316 F064 BLT 0x0323
0317 3549 CPI R20,0x59
0318 E0E0 LDI R30,0
0319 075E CPC R21,R30
031A F029 BEQ 0x0320
031B C007 RJMP 0x0323
(0151) {
(0152) case 0x12 : // Left SHIFT
(0153) shift = 0;
031C 2422 CLR R2
031D 92200063 STS shift,R2
(0154) break;
031F C003 RJMP 0x0323
(0155) case 0x59 : // Right SHIFT
(0156) shift = 0;
0320 2422 CLR R2
0321 92200063 STS shift,R2
(0157) break;
(0158) }
(0159) }
0323 940E03F6 CALL pop_gset1
0325 9508 RET
(0160) }
(0161) /*--------------------------------------------------------------------
(0162) 函数名称：
(0163) 函数功能：
(0164) 注意事项：
(0165) 提示说明：
(0166) 输 入：
(0167) 返 回：
(0168) --------------------------------------------------------------------*/
(0169) void int1_init()
(0170) {
(0171) IN_SCK; // set SCK_DDR (PD3/INT1) as input
_int1_init:
0326 988B CBI 0x11,3
(0172) SET_SCK; // set SCK_PORT as high level,avoid triggering
0327 9A93 SBI 0x12,3
(0173) MCUCR |= 0b11110011; // set PD3/INT1 as low level active
0328 B785 IN R24,0x35
0329 6F83 ORI R24,0xF3
032A BF85 OUT 0x35,R24
(0174) GICR |= 0b10000000; // enable global interrupt
032B B78B IN R24,0x3B
032C 6880 ORI R24,0x80
032D BF8B OUT 0x3B,R24
(0175) SEI(); // enable external interrupt
032E 9478 BSET 7
032F 9508 RET
(0176) }
(0177) /*--------------------------------------------------------------------
(0178) 函数名称：
(0179) 函数功能：
(0180) 注意事项：
(0181) 提示说明：
(0182) 输 入：
(0183) 返 回：
(0184) --------------------------------------------------------------------*/
(0185) void main(void)
(0186) {
(0187) PRESS_DATA_DDR = 0XFF;
_main:
0330 EF8F LDI R24,0xFF
0331 BB8A OUT 0x1A,R24
(0188) SHIFT_DATA_DDR = 0XFF;
0332 BB87 OUT 0x17,R24
(0189) IN_SDA;
0333 988C CBI 0x11,4
(0190) int1_init();
0334 DFF1 RCALL _int1_init
0335 C007 RJMP 0x033D
(0191) while(1)
(0192) {
(0193) if(rcvF)
0336 90200060 LDS R2,rcvF
0338 2022 TST R2
0339 F019 BEQ 0x033D
(0194) keyHandle(keyVal);
FILE: <library>
033A 91000064 LDS R16,keyVal
033C DF67 RCALL _keyHandle
033D CFF8 RJMP 0x0336
033E 9508 RET
push_arg4:
033F 933A ST R19,-Y
0340 932A ST R18,-Y
push_arg2:
0341 931A ST R17,-Y
0342 930A ST R16,-Y
0343 9508 RET
div32u:
0344 94E8 BCLR 6
0345 C001 RJMP 0x0347
mod32u:
0346 9468 BSET 6
0347 D02F RCALL long_div_prolog
0348 24CC CLR R12
0349 C008 RJMP 0x0352
div32s:
034A 94E8 BCLR 6
034B C001 RJMP 0x034D
mod32s:
034C 9468 BSET 6
034D D029 RCALL long_div_prolog
034E FD37 SBRC R19,7
034F D053 RCALL neg_R16_R19
0350 FDB7 SBRC R27,7
0351 D05A RCALL neg_R24_R27
0352 2477 CLR R7
0353 2488 CLR R8
0354 2499 CLR R9
0355 24AA CLR R10
0356 24BB CLR R11
0357 D041 RCALL tst_R16_R19
0358 F0C1 BEQ 0x0371
0359 D044 RCALL tst_R24_R27
035A F0B1 BEQ 0x0371
035B E2E8 LDI R30,0x28
035C 0F00 LSL R16
035D 1F11 ROL R17
035E 1F22 ROL R18
035F 1F33 ROL R19
0360 1C77 ROL R7
0361 1C88 ROL R8
0362 1C99 ROL R9
0363 1CAA ROL R10
0364 1CBB ROL R11
0365 1688 CP R8,R24
0366 0699 CPC R9,R25
0367 06AA CPC R10,R26
0368 06BB CPC R11,R27
0369 F028 BCS 0x036F
036A 1A88 SUB R8,R24
036B 0A99 SBC R9,R25
036C 0AAA SBC R10,R26
036D 0ABB SBC R11,R27
036E 9503 INC R16
036F 95EA DEC R30
0370 F759 BNE 0x035C
0371 F426 BRTC 0x0376
0372 2D08 MOV R16,R8
0373 2D19 MOV R17,R9
0374 2D2A MOV R18,R10
0375 2D3B MOV R19,R11
0376 C013 RJMP long_div_epilog
long_div_prolog:
0377 927A ST R7,-Y
0378 928A ST R8,-Y
0379 929A ST R9,-Y
037A 92AA ST R10,-Y
037B 92BA ST R11,-Y
037C 92CA ST R12,-Y
037D 93EA ST R30,-Y
037E 938A ST R24,-Y
037F 939A ST R25,-Y
0380 93AA ST R26,-Y
0381 93BA ST R27,-Y
0382 858B LDD R24,Y+11
0383 859C LDD R25,Y+12
0384 85AD LDD R26,Y+13
0385 85BE LDD R27,Y+14
0386 2EC3 MOV R12,R19
0387 F00E BRTS 0x0389
0388 26CB EOR R12,R27
0389 9508 RET
long_div_epilog:
038A FCC7 SBRC R12,7
038B D017 RCALL neg_R16_R19
038C 91B9 LD R27,Y+
038D 91A9 LD R26,Y+
038E 9199 LD R25,Y+
038F 9189 LD R24,Y+
0390 91E9 LD R30,Y+
0391 90C9 LD R12,Y+
0392 90B9 LD R11,Y+
0393 90A9 LD R10,Y+
0394 9099 LD R9,Y+
0395 9089 LD R8,Y+
0396 9079 LD R7,Y+
0397 9624 ADIW R28,4
0398 9508 RET
tst_R16_R19:
0399 2FE0 MOV R30,R16
039A 2BE1 OR R30,R17
039B 2BE2 OR R30,R18
039C 2BE3 OR R30,R19
039D 9508 RET
tst_R24_R27:
039E 2FE8 MOV R30,R24
039F 2BE9 OR R30,R25
03A0 2BEA OR R30,R26
03A1 2BEB OR R30,R27
03A2 9508 RET
neg_R16_R19:
03A3 9500 COM R16
03A4 9510 COM R17
03A5 9520 COM R18
03A6 9530 COM R19
03A7 5F0F SUBI R16,0xFF
03A8 4F1F SBCI R17,0xFF
03A9 4F2F SBCI R18,0xFF
03AA 4F3F SBCI R19,0xFF
03AB 9508 RET
neg_R24_R27:
03AC 9580 COM R24
03AD 9590 COM R25
03AE 95A0 COM R26
03AF 95B0 COM R27
03B0 5F8F SUBI R24,0xFF
03B1 4F9F SBCI R25,0xFF
03B2 4FAF SBCI R26,0xFF
03B3 4FBF SBCI R27,0xFF
03B4 9508 RET
empy32u:
empy32s:
03B5 940E040A CALL long_prolog
03B7 927F PUSH R7
03B8 940E0423 CALL tstzero1
03BA F139 BEQ 0x03E2
03BB 2477 CLR R7
03BC 940E0429 CALL tstzero2
03BE F419 BNE 0x03C2
03BF 018C MOVW R16,R24
03C0 019D MOVW R18,R26
03C1 C020 RJMP 0x03E2
03C2 9F08 MUL R16,R24
03C3 2CB0 MOV R11,R0
03C4 2CA1 MOV R10,R1
03C5 9F28 MUL R18,R24
03C6 2C90 MOV R9,R0
03C7 2C81 MOV R8,R1
03C8 9F18 MUL R17,R24
03C9 0CA0 ADD R10,R0
03CA 1C91 ADC R9,R1
03CB 1C87 ADC R8,R7
03CC 9F09 MUL R16,R25
03CD 0CA0 ADD R10,R0
03CE 1C91 ADC R9,R1
03CF 1C87 ADC R8,R7
03D0 9F19 MUL R17,R25
03D1 0C90 ADD R9,R0
03D2 1C81 ADC R8,R1
03D3 9F0A MUL R16,R26
03D4 0C90 ADD R9,R0
03D5 1C81 ADC R8,R1
03D6 9F38 MUL R19,R24
03D7 0C80 ADD R8,R0
03D8 9F29 MUL R18,R25
03D9 0C80 ADD R8,R0
03DA 9F1A MUL R17,R26
03DB 0C80 ADD R8,R0
03DC 9F0B MUL R16,R27
03DD 0C80 ADD R8,R0
03DE 2D0B MOV R16,R11
03DF 2D1A MOV R17,R10
03E0 2D29 MOV R18,R9
03E1 2D38 MOV R19,R8
03E2 907F POP R7
03E3 940C0418 JMP long_epilog
pop_gset2:
03E5 E0E2 LDI R30,2
03E6 940C03F7 JMP pop
pop_gset4:
03E8 E0E8 LDI R30,0x8
03E9 940C03F7 JMP pop
push_gset5:
03EB 92FA ST R15,-Y
03EC 92EA ST R14,-Y
push_gset4:
03ED 92DA ST R13,-Y
03EE 92CA ST R12,-Y
push_gset3:
03EF 92BA ST R11,-Y
03F0 92AA ST R10,-Y
push_gset2:
03F1 937A ST R23,-Y
03F2 936A ST R22,-Y
push_gset1:
03F3 935A ST R21,-Y
03F4 934A ST R20,-Y
03F5 9508 RET
pop_gset1:
03F6 E0E1 LDI R30,1
pop:
03F7 9149 LD R20,Y+
03F8 9159 LD R21,Y+
03F9 FDE0 SBRC R30,0
03FA 9508 RET
03FB 9169 LD R22,Y+
03FC 9179 LD R23,Y+
03FD FDE1 SBRC R30,1
03FE 9508 RET
03FF 90A9 LD R10,Y+
0400 90B9 LD R11,Y+
0401 FDE2 SBRC R30,2
0402 9508 RET
0403 90C9 LD R12,Y+
0404 90D9 LD R13,Y+
0405 FDE3 SBRC R30,3
0406 9508 RET
0407 90E9 LD R14,Y+
0408 90F9 LD R15,Y+
0409 9508 RET
long_prolog:
040A 928A ST R8,-Y
040B 929A ST R9,-Y
040C 92AA ST R10,-Y
040D 92BA ST R11,-Y
040E 93EA ST R30,-Y
040F 938A ST R24,-Y
0410 939A ST R25,-Y
0411 93AA ST R26,-Y
0412 93BA ST R27,-Y
0413 8589 LDD R24,Y+9
0414 859A LDD R25,Y+10
0415 85AB LDD R26,Y+11
0416 85BC LDD R27,Y+12
0417 9508 RET
long_epilog:
0418 91B9 LD R27,Y+
0419 91A9 LD R26,Y+
041A 9199 LD R25,Y+
041B 9189 LD R24,Y+
041C 91E9 LD R30,Y+
041D 90B9 LD R11,Y+
041E 90A9 LD R10,Y+
041F 9099 LD R9,Y+
0420 9089 LD R8,Y+
0421 9624 ADIW R28,4
0422 9508 RET
tstzero1:
0423 27EE CLR R30
0424 2BE0 OR R30,R16
0425 2BE1 OR R30,R17
0426 2BE2 OR R30,R18
0427 2BE3 OR R30,R19
0428 9508 RET
tstzero2:
0429 27EE CLR R30
042A 2BE8 OR R30,R24
042B 2BE9 OR R30,R25
042C 2BEA OR R30,R26
042D 2BEB OR R30,R27
042E 9508 RET
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