📄 at24cxx.lst
字号:
(0012) 圆版时间: 2005-06-25
(0013)
(0014) 开发人员: SEE（中文名不告诉你～怕你骂我）
(0015)
(0016) 说 明： 若用于商业用途，请保留此段文字或注明代码来源
(0017)
(0018) 深 圳 微 雪 电 子 保 留 所 有 的 版 权
(0019) *********************************************************************/
(0020)
(0021) /*01010101010101010101010101010101010101010101010101010101010101010101
(0022) ----------------------------------------------------------------------
(0023) 版本更新记录：
(0024) 版 本: Version 1.1
(0025) 圆版时间: 2005-03-25
(0026) ----------------------------------------------------------------------
(0027) 接入模块： AT24CXX
(0028) 接口说明： 见程序
(0029) ----------------------------------------------------------------------
(0030) 注意事项：
(0031) *
(0032) ----------------------------------------------------------------------
(0033) 10101010101010101010101010101010101010101010101010101010101010101010*/
(0034)
(0035) #include <iom16v.h>
(0036)
(0037) #define RD_DADR 0xA1 //read device-address
(0038) #define WR_DADR 0xA0 //write device-address
(0039) #include "D:\ICC_H\AT24CXX.H"
(0040)
(0041) #define DISP_DDR DDRA
(0042) #define DISP_PORT PORTA
(0043)
(0044) /*--------------------------------------------------------------------
(0045) 函数名称：
(0046) 函数功能：
(0047) 注意事项：
(0048) 提示说明：
(0049) 输 入：
(0050) 返 回：
(0051) --------------------------------------------------------------------*/
(0052) void errDisp()
(0053) {
(0054) DISP_PORT = 0X55;
_errDisp:
0223 E585 LDI R24,0x55
0224 BB8B OUT 0x1B,R24
(0055) delay50ms(4);
0225 E004 LDI R16,4
0226 E010 LDI R17,0
0227 DFBC RCALL _delay50ms
(0056) DISP_PORT = 0X00;
0228 2422 CLR R2
0229 BA2B OUT 0x1B,R2
(0057) delay50ms(4);
022A E004 LDI R16,4
022B E010 LDI R17,0
022C DFB7 RCALL _delay50ms
(0058) DISP_PORT = 0XAA;
022D EA8A LDI R24,0xAA
022E BB8B OUT 0x1B,R24
(0059) delay50ms(4);
022F E004 LDI R16,4
0230 E010 LDI R17,0
0231 DFB2 RCALL _delay50ms
(0060) DISP_PORT = 0X00;
0232 2422 CLR R2
0233 BA2B OUT 0x1B,R2
(0061) delay50ms(4);
0234 E004 LDI R16,4
0235 E010 LDI R17,0
(0062) }
0236 CFAD RJMP _delay50ms
(0063) /*--------------------------------------------------------------------
(0064) 函数全称：
(0065) 函数功能：
(0066) 注意事项：
(0067) 提示说明：假设系统时钟为16M，则TWI波特率=CLK/(16+2*(TWBR)*4)=400K
(0068) 输 入：
(0069) 返 回：
(0070) --------------------------------------------------------------------*/
(0071) void twi_init() //TWI(I2C)初始化
(0072) {
(0073) TWBR = 0X03; //设置TWI波特率
_twi_init:
0237 E083 LDI R24,3
0238 B980 OUT 0x00,R24
(0074) TWSR &= 0XFC; //设置TWI预分频 为 1
0239 B181 IN R24,0x01
023A 7F8C ANDI R24,0xFC
023B B981 OUT 0x01,R24
(0075) }
023C 9508 RET
_main:
t --> Y+0
pRdDat --> R20
WrDat --> R10
adr --> R22
023D 9721 SBIW R28,1
(0076) /*--------------------------------------------------------------------
(0077) 函数名称：
(0078) 函数功能：
(0079) 注意事项：
(0080) 提示说明：
(0081) 输 入：
(0082) 返 回：
(0083) --------------------------------------------------------------------*/
(0084) void main(void)
(0085) {
(0086) uint8 adr,WrDat,t;
(0087) uint8 *pRdDat=&t; //随便给"*pRdDat"一个具体地址，以免内存发生错误
023E 01AE MOVW R20,R28
(0088)
(0089) DISP_DDR = 0XFF;
023F EF8F LDI R24,0xFF
0240 BB8A OUT 0x1A,R24
(0090) twi_init();
0241 DFF5 RCALL _twi_init
(0091)
(0092) adr=0x20;
0242 E260 LDI R22,0x20
(0093) WrDat=0x33;
0243 E383 LDI R24,0x33
0244 2EA8 MOV R10,R24
(0094) if( AT24CXX_Write(adr,WrDat)!=AT24CXX_ERR) //AT24CXX写成功？
0245 2F28 MOV R18,R24
0246 2F06 MOV R16,R22
0247 DFB2 RCALL _AT24CXX_Write
0248 2300 TST R16
0249 F071 BEQ 0x0258
(0095) {
(0096) delay50ms(1); //等待EERPOM写完
024A E001 LDI R16,1
024B E010 LDI R17,0
024C DF97 RCALL _delay50ms
(0097) if( AT24CXX_Read(adr,pRdDat)!=AT24CXX_ERR ) //AT24CXX读成功？
024D 019A MOVW R18,R20
024E 2F06 MOV R16,R22
024F DFBD RCALL _AT24CXX_Read
0250 2300 TST R16
0251 F021 BEQ 0x0256
(0098) DISP_PORT=*pRdDat;
0252 01FA MOVW R30,R20
0253 8020 LDD R2,Z+0
0254 BA2B OUT 0x1B,R2
0255 C003 RJMP 0x0259
(0099) else
(0100) errDisp();
0256 DFCC RCALL _errDisp
(0101) }
0257 C001 RJMP 0x0259
(0102) else
(0103) errDisp();
0258 DFCA RCALL _errDisp
(0104) while(1);
0259 CFFF RJMP 0x0259
(0105) }
FILE: <library>
025A 9621 ADIW R28,1
025B 9508 RET
push_arg4:
025C 933A ST R19,-Y
025D 932A ST R18,-Y
push_arg2:
025E 931A ST R17,-Y
025F 930A ST R16,-Y
0260 9508 RET
div32u:
0261 94E8 BCLR 6
0262 C001 RJMP 0x0264
mod32u:
0263 9468 BSET 6
0264 D02F RCALL long_div_prolog
0265 24CC CLR R12
0266 C008 RJMP 0x026F
div32s:
0267 94E8 BCLR 6
0268 C001 RJMP 0x026A
mod32s:
0269 9468 BSET 6
026A D029 RCALL long_div_prolog
026B FD37 SBRC R19,7
026C D053 RCALL neg_R16_R19
026D FDB7 SBRC R27,7
026E D05A RCALL neg_R24_R27
026F 2477 CLR R7
0270 2488 CLR R8
0271 2499 CLR R9
0272 24AA CLR R10
0273 24BB CLR R11
0274 D041 RCALL tst_R16_R19
0275 F0C1 BEQ 0x028E
0276 D044 RCALL tst_R24_R27
0277 F0B1 BEQ 0x028E
0278 E2E8 LDI R30,0x28
0279 0F00 LSL R16
027A 1F11 ROL R17
027B 1F22 ROL R18
027C 1F33 ROL R19
027D 1C77 ROL R7
027E 1C88 ROL R8
027F 1C99 ROL R9
0280 1CAA ROL R10
0281 1CBB ROL R11
0282 1688 CP R8,R24
0283 0699 CPC R9,R25
0284 06AA CPC R10,R26
0285 06BB CPC R11,R27
0286 F028 BCS 0x028C
0287 1A88 SUB R8,R24
0288 0A99 SBC R9,R25
0289 0AAA SBC R10,R26
028A 0ABB SBC R11,R27
028B 9503 INC R16
028C 95EA DEC R30
028D F759 BNE 0x0279
028E F426 BRTC 0x0293
028F 2D08 MOV R16,R8
0290 2D19 MOV R17,R9
0291 2D2A MOV R18,R10
0292 2D3B MOV R19,R11
0293 C013 RJMP long_div_epilog
long_div_prolog:
0294 927A ST R7,-Y
0295 928A ST R8,-Y
0296 929A ST R9,-Y
0297 92AA ST R10,-Y
0298 92BA ST R11,-Y
0299 92CA ST R12,-Y
029A 93EA ST R30,-Y
029B 938A ST R24,-Y
029C 939A ST R25,-Y
029D 93AA ST R26,-Y
029E 93BA ST R27,-Y
029F 858B LDD R24,Y+11
02A0 859C LDD R25,Y+12
02A1 85AD LDD R26,Y+13
02A2 85BE LDD R27,Y+14
02A3 2EC3 MOV R12,R19
02A4 F00E BRTS 0x02A6
02A5 26CB EOR R12,R27
02A6 9508 RET
long_div_epilog:
02A7 FCC7 SBRC R12,7
02A8 D017 RCALL neg_R16_R19
02A9 91B9 LD R27,Y+
02AA 91A9 LD R26,Y+
02AB 9199 LD R25,Y+
02AC 9189 LD R24,Y+
02AD 91E9 LD R30,Y+
02AE 90C9 LD R12,Y+
02AF 90B9 LD R11,Y+
02B0 90A9 LD R10,Y+
02B1 9099 LD R9,Y+
02B2 9089 LD R8,Y+
02B3 9079 LD R7,Y+
02B4 9624 ADIW R28,4
02B5 9508 RET
tst_R16_R19:
02B6 2FE0 MOV R30,R16
02B7 2BE1 OR R30,R17
02B8 2BE2 OR R30,R18
02B9 2BE3 OR R30,R19
02BA 9508 RET
tst_R24_R27:
02BB 2FE8 MOV R30,R24
02BC 2BE9 OR R30,R25
02BD 2BEA OR R30,R26
02BE 2BEB OR R30,R27
02BF 9508 RET
neg_R16_R19:
02C0 9500 COM R16
02C1 9510 COM R17
02C2 9520 COM R18
02C3 9530 COM R19
02C4 5F0F SUBI R16,0xFF
02C5 4F1F SBCI R17,0xFF
02C6 4F2F SBCI R18,0xFF
02C7 4F3F SBCI R19,0xFF
02C8 9508 RET
neg_R24_R27:
02C9 9580 COM R24
02CA 9590 COM R25
02CB 95A0 COM R26
02CC 95B0 COM R27
02CD 5F8F SUBI R24,0xFF
02CE 4F9F SBCI R25,0xFF
02CF 4FAF SBCI R26,0xFF
02D0 4FBF SBCI R27,0xFF
02D1 9508 RET
empy32u:
empy32s:
02D2 940E032B CALL long_prolog
02D4 927F PUSH R7
02D5 940E0344 CALL tstzero1
02D7 F139 BEQ 0x02FF
02D8 2477 CLR R7
02D9 940E034A CALL tstzero2
02DB F419 BNE 0x02DF
02DC 018C MOVW R16,R24
02DD 019D MOVW R18,R26
02DE C020 RJMP 0x02FF
02DF 9F08 MUL R16,R24
02E0 2CB0 MOV R11,R0
02E1 2CA1 MOV R10,R1
02E2 9F28 MUL R18,R24
02E3 2C90 MOV R9,R0
02E4 2C81 MOV R8,R1
02E5 9F18 MUL R17,R24
02E6 0CA0 ADD R10,R0
02E7 1C91 ADC R9,R1
02E8 1C87 ADC R8,R7
02E9 9F09 MUL R16,R25
02EA 0CA0 ADD R10,R0
02EB 1C91 ADC R9,R1
02EC 1C87 ADC R8,R7
02ED 9F19 MUL R17,R25
02EE 0C90 ADD R9,R0
02EF 1C81 ADC R8,R1
02F0 9F0A MUL R16,R26
02F1 0C90 ADD R9,R0
02F2 1C81 ADC R8,R1
02F3 9F38 MUL R19,R24
02F4 0C80 ADD R8,R0
02F5 9F29 MUL R18,R25
02F6 0C80 ADD R8,R0
02F7 9F1A MUL R17,R26
02F8 0C80 ADD R8,R0
02F9 9F0B MUL R16,R27
02FA 0C80 ADD R8,R0
02FB 2D0B MOV R16,R11
02FC 2D1A MOV R17,R10
02FD 2D29 MOV R18,R9
02FE 2D38 MOV R19,R8
02FF 907F POP R7
0300 940C0339 JMP long_epilog
pop_gset2:
0302 E0E2 LDI R30,2
0303 940C030C JMP pop
pop_gset4:
0305 E0E8 LDI R30,0x8
0306 940C030C JMP pop
push_gset1:
0308 935A ST R21,-Y
0309 934A ST R20,-Y
030A 9508 RET
pop_gset1:
030B E0E1 LDI R30,1
pop:
030C 9149 LD R20,Y+
030D 9159 LD R21,Y+
030E FDE0 SBRC R30,0
030F 9508 RET
0310 9169 LD R22,Y+
0311 9179 LD R23,Y+
0312 FDE1 SBRC R30,1
0313 9508 RET
0314 90A9 LD R10,Y+
0315 90B9 LD R11,Y+
0316 FDE2 SBRC R30,2
0317 9508 RET
0318 90C9 LD R12,Y+
0319 90D9 LD R13,Y+
031A FDE3 SBRC R30,3
031B 9508 RET
031C 90E9 LD R14,Y+
031D 90F9 LD R15,Y+
031E 9508 RET
push_gset2:
031F 937A ST R23,-Y
0320 936A ST R22,-Y
0321 940C0308 JMP push_gset1
push_gset3:
0323 92BA ST R11,-Y
0324 92AA ST R10,-Y
0325 940C031F JMP push_gset2
push_gset4:
0327 92DA ST R13,-Y
0328 92CA ST R12,-Y
0329 940C0323 JMP push_gset3
long_prolog:
032B 928A ST R8,-Y
032C 929A ST R9,-Y
032D 92AA ST R10,-Y
032E 92BA ST R11,-Y
032F 93EA ST R30,-Y
0330 938A ST R24,-Y
0331 939A ST R25,-Y
0332 93AA ST R26,-Y
0333 93BA ST R27,-Y
0334 8589 LDD R24,Y+9
0335 859A LDD R25,Y+10
0336 85AB LDD R26,Y+11
0337 85BC LDD R27,Y+12
0338 9508 RET
long_epilog:
0339 91B9 LD R27,Y+
033A 91A9 LD R26,Y+
033B 9199 LD R25,Y+
033C 9189 LD R24,Y+
033D 91E9 LD R30,Y+
033E 90B9 LD R11,Y+
033F 90A9 LD R10,Y+
0340 9099 LD R9,Y+
0341 9089 LD R8,Y+
0342 9624 ADIW R28,4
0343 9508 RET
tstzero1:
0344 27EE CLR R30
0345 2BE0 OR R30,R16
0346 2BE1 OR R30,R17
0347 2BE2 OR R30,R18
0348 2BE3 OR R30,R19
0349 9508 RET
tstzero2:
034A 27EE CLR R30
034B 2BE8 OR R30,R24
034C 2BE9 OR R30,R25
034D 2BEA OR R30,R26
034E 2BEB OR R30,R27
034F 9508 RET
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