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📄 dsc.c

📁 一个不错的硬盘播放器程序,包含VFD显示程序,红外线遥控程序,硬盘读写程序,及解码程序等.
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void DSC_mute_on() {    volatile unsigned int *ptr = (unsigned int *) x1c060000;    int i, foo;    shadow_cchip_ctl |= 0x20;    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);    for (i=0; i<60000; i++)	/* wait for pin VREFM turn high */	foo = *ptr;		/* wait 360 ns; total wait 20ms */}#endif#ifndef PLAYONLY#if (!CUST71 || POWER_ON)void DSC_powerdown(){    int clkctl = 0x70;			/* PLL, PCLK2X, divider 0, boot	*/    mvd[riface_irqmask] = 0;		/* Disable all interrupts	*/#ifdef ES3207A    DSC_mute_on();#endif    shadow_cchip_ctl &= ~1;		/* Disable DVE			*/    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);    DSC_cmd(dsc_dvectl3,   0x0);					/* Power down video		*/#ifdef CLKDIV    shadow_cchip_ctl = 0x38;		/* Audio mute, warm boot, power	*					 * saving, disable MIC/audio	*/    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);#ifdef IR_PHILIPS    clkctl |= ((IR_ctlbit & 3) << 1);	/* Record the last control bit	*/#endif    DSC_cmd(dsc_clkctl, clkctl);#else    shadow_cchip_ctl = 0x28;		/* Audio mute, cold boot, power	*					 * saving, disable MIC/audio	*/    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);    DSC_cmd(dsc_clkctl, 0x44);		/* Power down 3210		*/#endif    while (1);}#endif /* POWER_ON */#endif/* * This routine powers up 3210. 3207/9 will reset 3210 so this routine * will never return. */#if (!CUST71 || POWER_ON)void DSC_powerup(){    int clkctl = 0x71;			/* PLL, PCLK2X, divider 1, boot	*/    mvd[riface_irqmask] = 0;		/* Disable all interrupts	*/#ifdef CLKDIV    shadow_cchip_ctl = 0x30;		/* Audio mute, warm boot	*/    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);#ifdef IR_PHILIPS    clkctl |= ((IR_ctlbit & 3) << 1);	/* Record the last control bit	*/#endif    DSC_cmd(dsc_clkctl, clkctl);#else    DSC_cmd(dsc_clkctl, 0x14);		/* Turn on PCLK2X		*/    shadow_cchip_ctl = 0x30;		/* Audio mute, warm boot	*/    DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);    DSC_cmd(dsc_clkctl, 0x70);		/* Power up 3210		*/#endif    while (1);}#endif  /* POWER_ON *//* * Initialize 3207 */void DSC_init(){    DSC_toggle();			/* Just in case			*/#ifndef DVD_VCD#ifdef C80    SET_MUTEON;#endif#if NO_MICRO && (!CUST71 || POWER_ON)    /* If A/C is just turned on, we want to power down to standby mode	*/    if (DSC_status == DSC_STATUS_ACON) {	/* init the game and vcd20 save memory */	int *ptr;#ifdef PLAY20	ptr = RISC_ptr_realtime;	*ptr-- = 0;	/* resume info */	*ptr-- = 0;	/* game score */	*ptr = 11;	/* game score */#endif	DSC_powerdown();    }#endif /* POWER_ON */#endif /* none DVD_VCD */#ifdef PLAYONLY    /* For playonly machine, A/C on means power on! */    if (DSC_status == DSC_STATUS_ACON)      DSC_powerup();#endif    if (IS_POWER_DOWN) {	/* In power-down mode. Turn off few parts of 3207 */#ifdef DVD_VCD	DSC_cmd(dsc_audioacnt0h, 0x16);#else	DSC_cmd(dsc_audioacnt0h, 0x06);	/* Disable MCLK output		*/#endif#ifdef CLKDIV	DSC_cmd(dsc_clkctl, 0x30);      /* PLL, PCLK2X, divider 0	*/#else	shadow_cchip_ctl = 0x28;	/* Audio mute, power saving,	*					 * disable MIC/audio		*/	DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);	DSC_cmd(dsc_clkctl, 0x04);      /* Shut pclk and pclk2x         */#endif#if (!CUST71 || POWER_ON)#ifdef C80	SET_POWER_OFF;#endif#endif    } else {	DSC_status = DSC_STATUS_RUNNING;/* With 8051, A/C on goes to	*					 * run state, so fake it!	*/#ifdef ES3207A	shadow_cchip_ctl = 0x30;	/* Warm and Audio mute		*/#else	shadow_cchip_ctl = 0x10;	/* Warm and Audio mute		*/#endif	DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);	DSC_cmd(dsc_dvectl4, 0x30);	/* enable sync outputs		*/#ifdef SVIDEO#ifdef SVIDEO_SELECT	if (EAUX11_HIGH) {	    DSC_cmd(dsc_dvectl3, 0x07);	    svideo_setting = 1;	    /* enable composite video dac only */	} else {	    DSC_cmd(dsc_dvectl3, 0x01);	    svideo_setting = 0;	}	/* enable composite + s-video   */#else	DSC_cmd(dsc_dvectl3, 0x01);					/* enable composite + s-video	*/#endif#else	DSC_cmd(dsc_dvectl3, 0x07);					/* enable composite video dac only */#endif	/* SVIDEO */	DSC_cmd(dsc_clkctl, 0x39);	/* enable dve, PLL, PCLK2X, PCLK*					 * Divider set to 1 (running)	*/	DSC_cmd(dsc_audioadc2, 0x00 | AUDIOADC2_RESET);					/* Reset A2D to minimize noise	*/#ifdef ECHO	DSC_cmd(dsc_audioxmt1, 0x69);					/* Invert ATFS; output ACLK;	*					 * MSB first; down sampling	*					 * mute zero (VA and later)	*/#else  /* no echo */#ifdef CUST3	DSC_cmd(dsc_audioxmt1, 0x62);					/* Invert ATFS; external ACLK	*					 * LSB first			*					 * mute zero (VA and later)	*/#else	DSC_cmd(dsc_audioxmt1, 0x60);					/* Invert ATFS; external ACLK	*					 * MSB first (irrelevant)	*					 * mute zero (VA and later)	*/#endif /* end ifdef CUST3 */#endif /* end ifdef ECHO */	DSC_cmd(dsc_audiodbg, 0x01);#ifdef ES3207A				/* When we are using 3207 DAC	*/#ifdef FS384	/* Generate and drive 16.9344MHz clock */#ifdef CUST3	DSC_cmd(dsc_audioacnt0h, 0x16);	/* disable MCLK			*/#else	DSC_cmd(dsc_audioacnt0h, 0x76);	/* 3207 outputs clock		*/#endif	DSC_cmd(dsc_audioacnt0l, 0x20);	/* 16.9344 MHz			*/	DSC_cmd(dsc_audioacnt1h, 0x0c);	DSC_cmd(dsc_audioacnt1l, 0x5c);#else  /* not FS384 */	/* Generate and drive 11.2896MHz clock */#ifdef DVD_VCD	DSC_cmd(dsc_audioacnt0h, 0x16);	/* disable MCLK			*/#else	if (DSC_version == 0) {	    DSC_cmd(dsc_audioacnt0h, 0x66); /* 3207 outputs clock	*/	} else {	    DSC_cmd(dsc_audioacnt0h, 0xf6); /* 3207 outputs clock	*/	    DSC_cmd(dsc_audioapllm, 0x7c); /* 44.1K, 256fs, 11.2896MHz.	*/	    DSC_cmd(dsc_audioaplln, 0x30);	}#endif	DSC_cmd(dsc_audioacnt0l, 0x20);	/* 11.2896 MHz			*/	DSC_cmd(dsc_audioacnt1h, 0x07);	DSC_cmd(dsc_audioacnt1l, 0x7a);#endif /*  end of #ifdef FS384 */	DSC_cmd(dsc_audiorcv1, 0x80 | AUDIORCV1_DITHER);					/* Right adjusted & reset       */#ifdef FS384	DSC_cmd(dsc_audiorcv2, 0x11);	/* 24b cycle frame (384*FS)	*/#else	DSC_cmd(dsc_audiorcv2, 0x10);	/* 16b cycle frame (256*FS)	*/#endif	DSC_cmd(dsc_audiorcv1, 0x90 | AUDIORCV1_DITHER);					/* Enable (disable reset)	*/#ifndef ZERO_BUFFER	shadow_cchip_ctl |= 0x1;	/* Enable video DAC only	*/#else	/*	 * When zero buffer is used, we'll not call DSC_reset_audio,	 * so we need to turn on audio DAC once and for all.	 */	shadow_cchip_ctl |= 0x3;	/* Enable video+audio DAC	*/#endif		DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);#else  /* NOT ES3207A */	/* When using external audio DAC */#ifdef ECHO	/* Generate and drive 11.2896MHz clock */	if (DSC_version == 0) {	    DSC_cmd(dsc_audioacnt0h, 0x66); /* 3207 outputs clock	*/	} else {	    DSC_cmd(dsc_audioacnt0h, 0xf6); /* 3207 outputs clock	*/	    DSC_cmd(dsc_audioapllm, 0x7c);  /* 44.1K, 256fs, 11.2896MHz.*/	    DSC_cmd(dsc_audioaplln, 0x30);	}	DSC_cmd(dsc_audioacnt0l, 0x20);	/* 11.2896 MHz			*/	DSC_cmd(dsc_audioacnt1h, 0x07);	DSC_cmd(dsc_audioacnt1l, 0x7a);#else	DSC_cmd(dsc_audioacnt0h, 0x06);	/* Disable 3207's clock		*/#endif	shadow_cchip_ctl |= 0x21;	/* Eable the external DAC (i.e.	*					 * disable the mute pin)	*/	DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);#if (C80 && POWER_ON)	SET_POWER_ON;#endif#endif	/* ES3207A */#ifdef ECHO	/* Enable MIC port early so we have time to charge up cap.	*/	shadow_cchip_ctl |= 0x4;	DSC_cmd(dsc_cchip_ctl, shadow_cchip_ctl);#endif    }#ifndef DVD_VCD /* fix me ASAP */    /*      * Initialize a 2 second watch dog timer. 3207 operates at 54MHz,     * so 2 second is (n+1)*8/54, and n is 12.5. The initial clock     * setting has to be (0x7f-0xd)|0x80     */    DSC_cmd(dsc_watchdog, 0xf2);#endif}/* * Turn off 3207/9's TV encoder */#ifndef CUST71void DSC_encoder_off(){    DSC_cmd(dsc_dvectl3, 0x0);    }#endifPRIVATE int la_trigger;		/* For logic analyzer *//* * This routine will be called inside interrupt handler. With 3207, we'll * be reset by 3207; without 3207, we'll just jump to start up code. */void DSC_dead(trigger)int trigger;{    /* Sit here and wait for 3207 to reset us. */    while (1) la_trigger = trigger;}#else/* * This routine will be called inside interrupt handler. With 3207, we'll * be reset by 3207; without 3207, we'll just jump to start up code. */void DSC_dead(trigger)int trigger;{    /*      * Jump to startup code. Startup code is at 0xcffff80, but code     * uses DWORD address, which makes it 0x33fffe0.     */    asm("addi    r0,#0x33f,r22");    asm("lsl     r22,r22,#16");    asm("addi    r22,#0xffe0,r22");    asm("jspci   r22,#0,r0");    asm("nop");    asm("nop");}#endif

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