📄 util.c
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/* Copyright 1996-1997, ESS Technology, Inc. */
/* SCCSID @(#)util.c 1.81 2/17/98 */
#include "common.h"
#include "buffer.h"
#include "constvar.h"
#include "debug.h"
#include "dsc.h"
#include "low.h"
#include "mvd.h"
#include "sysinfo.h"
#include "timedef.h"
#include "util.h"
#include "vcxi.h"
#include "tdm.h"
#include "echo.h"
#include "ir.h"
#include "micro.h"
#include "vp.h"
#include "kara.h"
#include "const.h"
#include "Hm612ndi.h"
/*
* Remote control depends on timer to get signal width. For convenience,
* we need the least significant 20 bits of starting timer value to be
* all 0's. Therefore, INTERVAL and multiplication factors are both
* set to 1024 instead of 1000.
*/
#define INTERVAL 500 /* In msec (i.e. timer will be .5 sec) */
/*
* Real-time clock is always at DRAM location 0x1c. The format is: 00hhmmss
* where hh is hour (0-23), mm is minute (0-59), ss is half second (0-119)
*
* Since this variable is always changing, I'll make sure the cache copy
* is consistent with the DRAM version even though we only use the DRAM
* version (otherwise, old cache data may destroy DRAM data by accident)
*/
unsigned int *RISC_ptr_realtime = (unsigned int *) 0x1200001c;
unsigned int *RISC_cache_realtime = (unsigned int *) 0x1c;
/* the format is 0x00ttmmss */
unsigned int *VCD_ptr_resume_info = (unsigned int *) 0x12000018;
unsigned int *VCD_cache_resume_info = (unsigned int *) 0x18;
KEYDEBUGVAR(watchdog, 0);
/************************************************************************
Timer2 interrupt service.
************************************************************************/
void RISC_timer2_interrupt_service(void)
{
register unsigned int tmp = *RISC_ptr_realtime;
mvd[riface_clear_timer2] = 0; /* clear timer irq */
/* Timer reloaded automatically */
++gTBT10msTimer;
if (gBuzzerTm){
pBuzzer2Khz;
}
if (++g2Timer2000ms < 2000) return;
g2Timer2000ms = 0;
#ifdef DSC
DSC_toggle(); /* Tell 3207 that we are not dead! */
if (IS_POWER_DOWN) {
/*
* In the powerdown mode, there is no screen interrupt. I have
* to use timer interrupt to keep glbTimer moving. Otherwise,
* many waiting loop may hang due to glbTimer not moving.
*/
glbTimer += (60 * INTERVAL / 1000);
}
#else
#ifdef CUST4
{
extern int power_up;
if (power_up) {
/* During powerup stage, there is no video interrupt. To update *
* glbTimer, we use timer2 interrupt instead */
glbTimer += (60 * INTERVAL / 1000);
}
}
#endif
#endif
tmp++;
if ((tmp & 0xff) >= 120) {
/* Increment minute after 60 seconds */
tmp &= 0xffffff00;
tmp += 0x100;
if ((tmp & 0xff00) >= 0x3c00) {
/* Increment hour after 60 minutes */
tmp &= 0xffff0000;
tmp += 0x10000;
if (tmp >= 0x180000)
tmp = 0;
}
}
*RISC_cache_realtime = *RISC_ptr_realtime = tmp;
#ifdef NO_MICRO
if (REMOTE_VALID) {
/* We will do a longjump if the input key is POWER
key and the current_task is not 0. The user can
use the POWER key to power off machine if we
are looping in decoding task. */
#if (POWER_ON || !CUST71) /* for code cutting */
if ((current_task != 0) && micro_is_power_key(codeIR)) {
#else
if (current_task != 0) {
#endif
longjmp(err_buf, 1);
}
#ifdef VCDROM
if (VCD_30 && micro_is_reset_key(codeIR)) {
extern jmp_buf vcd30_power_buf;
longjmp(vcd30_power_buf, 1);
}
#endif
}
#endif
#if defined(WATCHDOG) && !defined(MVD_BOARD)
{
extern int xfer_mode;
#ifdef DVD_VCD
if (!vcx_pause)
#else
if (!vcx_pause && (xfer_mode == 5))
#endif
{
/*
* We consider that system is dead if there are no
* xport or huffman xfer for both audio and video
* since last timer interrupt.
*/
int system_dead =
!(VBV_ABV_xport_xfer_count &&
(VBV_ABV_huffman_xfer_count || TDM_isCDDA));
if (current_task && system_dead) {
#ifdef ECHO
/*
* When ECHO is on, the original system dead condition
* no longer holds. When the current_task is 6 (i.e. echo)
* we may not have any TDM/HUFF data.
*
* In every timer interrupt, we'll take note of the
* current ECHO_cnt. If between two timer interrupts,
* the ECHO_cnt stays the same, and the current task
* is ECHO, then we are really stucked in ECHO task.
*/
if ((current_task != 6) || (ECHO_cnt == ECHO_last_cnt))
#endif /* ECHO */
{
KEYDEBUGINC(1, watchdog);
longjmp(err_buf, 1);
}
}
VBV_ABV_xport_xfer_count = VBV_ABV_huffman_xfer_count = 0;
#ifdef ECHO
ECHO_last_cnt = ECHO_cnt;
#endif /* ECHO */
}
}
#endif
}
/**************************************************************************
buscon_irq_enable/disable is now a subroutine
**************************************************************************/
#ifndef BUSCON_IRQ_USE_MACRO
void buscon_irq_enable(int ch_runbit)
{
do {} while (!(mvd[buscon_dma_status] & ch_runbit));
mvd[riface_irqsuppress] = 0; asm("nop"); asm("nop");
gbl_buscon_irqmasks |= ch_runbit;
mvd[buscon_dma_irqmasks] = gbl_buscon_irqmasks;
}
void buscon_irq_disable(int ch_runbit)
{
mvd[riface_irqsuppress] = 0; asm("nop"); asm("nop");
gbl_buscon_irqmasks &= ~ch_runbit;
mvd[buscon_dma_irqmasks] = gbl_buscon_irqmasks;
}
#endif
/**************************************************************************
Start timer2.
**************************************************************************/
void RISC_start_timer2(void)
{
#ifdef DSC
if (IS_POWER_DOWN) timer2_period = 0x0 - (INTERVAL * IDLECLK * 100);
else timer2_period = 0x0 - (INTERVAL * CPUCLK * 100);
#else
timer2_period = 0x0 - (INTERVAL * CPUCLK * 100);
#endif /* DSC */
mvd[riface_clear_timer2] = 0; /* clear timer irq */
/*
mvd[riface_timer2] = timer2_period;
mvd[riface_timer2] = 0xffffbe00;
*/
mvd[riface_timer2] = 0xffffbe00;
*RISC_ptr_realtime = 0;
/* Mask off junk */
*RISC_cache_realtime = (*RISC_ptr_realtime &= x00ffffff);
enable_int(tim2);
}
#ifndef MKROM
/**************************************************************************
Read the risc gateway fifo.
**************************************************************************/
void risc_fifo_read(int *p, int n)
{
while (n-- > 0) {
get_riscfifo(*p);
p++;
}
}
#endif
/**************************************************************************
Write to the risc gateway fifo.
**************************************************************************/
void risc_fifo_write(int *p, int n)
{
while (n-- > 0) {
put_riscfifo(*p);
p++;
}
gbl_gate_control |= flush_r2b;
mvd[gate_control] = gbl_gate_control; /* Flush r2b gateway fifo */
}
#if 0 /* NO one uses this right now */
/*****************************************************************************
Flush the cache.
*****************************************************************************/
void RISC_flush(int start, int n)
{
int i, j;
volatile int k;
int first, last;
first = (start << 2) & 0xffff;
last = ((start + n) << 2) & 0xffff;
for (i = 0; i< 8192; i += 2048) {
for (j = first + i; j < last + i; j += 16) {
k = *((int *)j);
}
}
}
#endif
/*****************************************************************************
Move a block of memory from sram to dram.
*****************************************************************************/
void sram_to_dram(dst, srcp, n)
int dst; /* dword addr in DRAM */
int *srcp; /* source ptr in SRAM */
int n; /* block size in dwords */
{
int i, *dstp = (int *)dram(dst);
while (n--) {
*dstp++ = *srcp++;
for (i = 0; i < 32; i++)
asm("nop");
}
}
/*****************************************************************************
Move a block of memory from sram(actually it can be dram too) to dram.
This one is quicker if you have a large block.
*****************************************************************************/
void RISC_to_dram(dst, srcp, n)
int dst; /* dword addr in DRAM */
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