📄 c_kernel.c
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}
//_____________________DEBUG_____________TASK_____
Debug_descr =p_gdt;
/* Second entry is kernel TSS descriptor*/
set_tss_descriptor(p_gdt++,sizeof(TSS_SEGMENT)-1,
( long)16*(long)_DS+(int)&TSS_Debug,DPL_USER);
set_tss(&TSS_Debug,SelKCS,SelKDS,
(long)(SEGSIZE-1), nullSel);
// set_data_descriptor(p_gdt++,SEGSIZE-1,
// KERNELBASE+ (_MAXPROCESS+1)*SEGSIZE,DPL_SYS);
TSS_Debug.t3EFlags= 0x002; /* Set tss is tailored for user we must correct */
TSS_Debug.t3ESP = 0x0ffff;
TSS_Debug.t3EIP = (unsigned int)DebugTask;
TSS_Debug.t3SS0 = SelKDS;
TSS_Debug.t3SS1 = SelKDS;
TSS_Debug.t3SS2 = SelKDS;
//______________DEBUG____________________TASK______________
}
//********************************************************//
//** Setup_IDT 1993 **//
//** **//
//********************************************************//
set_gate_descriptor(&IDT[RECEIVE],
0L,SelKernel, TYPE_TASK_GATE,DPL_USER,PRESENT);
set_gate_descriptor(&IDT[SEND],
0L,SelKernel,TYPE_TASK_GATE ,DPL_USER,PRESENT);
/* Only those hw- interrupts are gated to kernel which can cause
context switch */
/* CLOCKINT stands here for any hardware int possible to cause context switch */
set_gate_descriptor(&IDT[CLOCKINT],
0L,SelKernel,TYPE_TASK_GATE,DPL_USER,PRESENT);
set_gate_descriptor(&IDT[DEBUGINT],
0L,SelDebug,TYPE_TASK_GATE,DPL_USER,PRESENT);
/* See Intel manuals for bitfields in descriptors */
int set_descriptor( SEGMENT_DESCR *segdesc,
unsigned long limit,
unsigned long base,
unsigned int type,
unsigned int segment,
unsigned int DPL,
unsigned int present,
unsigned int X
)
{
segdesc->limit_0 = limit & 0xffff; /* Set limit */
segdesc->limit_16= limit >> 16;
segdesc->base_0 = base & 0xffff;
segdesc->base_16 = (base & 0xff0000) >> 16;
segdesc->base_24 = (base & 0xff000000) >> 24;
segdesc->type = type ;
segdesc->segment = segment ;
/* Set Descriptor Privilege Level */
segdesc->DPL = DPL ;
segdesc->present = present ; /* Set present bit */
segdesc->avail = 0;
segdesc->unused = 0;
segdesc->X = X;
segdesc->granul = 0;
return(TRUE);
}
//********************************************************//
//** set_gate_descriptor 1993 **//
//** **//
//********************************************************//
int set_gate_descriptor(GATE_DESCR *gatedesc,
unsigned long offset,
SELECTOR selector,
unsigned int type,
unsigned int DPL,
unsigned int present
)
{ long int z;
gatedesc->offset_0 = offset & 0xffff;
z = (offset & 0x000f0000);
gatedesc->offset_16 = (int)( z >> 16);
gatedesc->selector = selector;
gatedesc->type = type ;
gatedesc->DPL = DPL ;
gatedesc->present = present;
return(TRUE);
}
//********************************************************//
//** set-TSS-descriptor **//
//** **//
//********************************************************//
int set_tss_descriptor(SEGMENT_DESCR *segdesc,
unsigned long limit,
unsigned long base,
unsigned int dpl
)
{
set_descriptor(segdesc, limit, base, TYPE_TSS,SEG_SYS,dpl,PRESENT,X_BIT_TSS);
return(TRUE);
}
//********************************************************//
//** set-code-descriptor **//
//** **//
//********************************************************//
int set_code_descriptor(SEGMENT_DESCR *segdesc,
unsigned long limit,
unsigned long base ,
unsigned int dpl
)
{
set_descriptor(segdesc, limit, base,TYPE_CODE ,SEG_DC,dpl,PRESENT,X_BIT_C);
return(TRUE);
}
//********************************************************//
//** set-data-descriptor **//
//** **//
//********************************************************//
int set_data_descriptor(SEGMENT_DESCR *segdesc,
unsigned long limit,
unsigned long base,
unsigned int dpl
)
{
set_descriptor(segdesc, limit, base,TYPE_DATA ,SEG_DC,dpl,PRESENT,X_BIT_D );
return(TRUE);
}
//********************************************************//
//** set-tss **//
//** **//
//********************************************************//
int set_tss( TSS_SEGMENT *tss_seg,
SELECTOR codesel,
SELECTOR datasel,
long stack,
SELECTOR sel_LDT
)
{
tss_seg->t3BackLink =0; //** TSS backlink
tss_seg->d1 =0; //** Reserved
tss_seg->t3ESP0 =(unsigned long)stack; //** Stack 0 pointer (CPL=0)
tss_seg->t3SS0 =(unsigned int) datasel; //** Stack 0 segment
tss_seg->d2 =0; //** Reserved
tss_seg->t3ESP1 =(unsigned long)stack; //** Stack 1 pointer (CPL=1)
tss_seg->t3SS1 =(unsigned int) datasel; //** Stack 1 segment
tss_seg->d3 =0; //** Reserved
tss_seg->t3ESP2 =(unsigned long)stack; //** Stack 2 pointer (CPL=2)
tss_seg->t3SS2 =(unsigned int) datasel; //** Stack 2 segment
tss_seg->d4 =0; //** Reserved
tss_seg->t3CR3 =0L; //** CR3
tss_seg->t3EIP =0L; //** Instruction pointer
tss_seg->t3EFlags =0x03202; //** Extended flags, interrupts off
tss_seg->t3EAX =0L; //** Task general registers
tss_seg->t3ECX =0L;
tss_seg->t3EDX =0L;
tss_seg->t3EBX =0L;
tss_seg->t3ESP =(unsigned long)stack-DPL_3_STACK_OFFSET;
tss_seg->t3EBP =0L;
tss_seg->t3ESI =0L;
tss_seg->t3EDI =0L;
tss_seg->t3ES =(unsigned int) datasel;/*datasel;*/ //** Task segment registers
tss_seg->d5 =0; //** Reserved
tss_seg->t3CS =(unsigned int) codesel;
tss_seg->d6 =0; //** Reserved
tss_seg->t3SS =(unsigned int) datasel;
tss_seg->d7 =0; //** Reserved
tss_seg->t3DS =(unsigned int) datasel;
tss_seg->d8 =0; //** Reserved
tss_seg->t3FS =(unsigned int) SelScreen; /* Screen selector */
tss_seg->d9 =0; //** Reserved
tss_seg->t3GS =(unsigned int) SelShm; /* Shared memory selector */
tss_seg->d10 =0; //** Reserved
tss_seg->t3LDT =(unsigned int) sel_LDT; //** Task local descriptor table
tss_seg->d11 =0; //** Reserved
tss_seg->t3Trap =0; //** Holds debug trap bit (T)
tss_seg->d12 =0; //** Reserved
tss_seg->t3IOOfs =sizeof(TSS_SEGMENT); //** I/O map address offset
tss_seg->terminator =0xff; //** Terminator 0FFh
return(TRUE);
}
/* Check have we now processes ready to run*/
/**********************************************************/
/* 注： 这里可能是 schedule() 函数体，我没有对代码进行修改 */
/********************************************************* /
while( ( AP >= 0 ) || ( ( ACOUNT > 0) && ( AP == -1 ) ) )
{ /* Either old active process " AP" or some else*/
if( (ACOUNT > 0 ) && ( AP == -1 ) )
{
--ACOUNT; /* Decrement READY process count */
while(++AP <_MAXPROC) /* Find highest priority ready process */
if(PCB[AP].STATE == READY )break; /* Finding high priority process takes*/
/* small amount of processing time */
PCB[AP].STATE=RUNNING;
TSS_Addr[1] =Sel_TSS[AP]; /* Set Task state segment as jump adders */
}
asm jmp dword ptr [TSS_Addr];/* Context switch is made by jump to TSS*/
/* Servicing of software system call "receive message"*/
void Receive(int Box,int Timeout)
{
if( MailBox[Box].WaitCount >0 || MailBox[Box].Head == MailBox[Box].Tail )/* Must wait? */
{
++MailBox[Box].WaitCount; /* We must wait- message (sleeping) */
PCB[AP].TIMEOUT = TCOUNT + Timeout; /* Store timeout time */
PCB[AP].MBptr = Box; /* Pointer to Box from PCB*/
PCB[AP].STATE = WAITING; /* Process now waiting*/
AP = -1; /* ACTIVE PROCESS IS NO MORE ACTIVE */
Schedule();
}
else { if( MailBox[Box].Head != MailBox[Box].Tail)
PCB[AP].Message = GetBuff(&MailBox[Box]);
} /* There was message waiting */
}
/* system call send message service */
void Send(int Box, int Message)
{
static iy,iold;
if( MailBox[Box].WaitCount > 0 ) /* There are waiting processes? */
{
MailBox[Box].WaitCount--;
for( iy = 0 ;iy <_MAXPROC ; iy++) /* Seek highest priority waiting process */
if(PCB[iy].MBptr == Box )
{
iold = iy; /* Save found process */
iy =_MAXPROC; /* Out of the loop */
PCB[iold].STATE = READY; /* Found process ready to schedule */
ACOUNT++; /* Increment active process count*/
PCB[iold].TIMEOUT = -1; /* Clear timeout */
PCB[iold].Message = Message; /* Give message to the waiting process */
PCB[iold].MBptr = -1; /* Process is no more waiting any message queue*/
}
if( iold < AP )
{
PCB[AP].STATE = READY; /* Active process is now only READY */
ACOUNT++;
AP = -1; /* No active process */
Schedule();
}
}
else { PutBuff(&MailBox[Box],Message);
/* Save message in the circular buffer of the box */
}
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