sngks32csio.h

刚开始学习44b

/* sngks32cSio.h - header file for Samsung KS32C serial driver */

/* Copyright 1984-2001 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01c,16jul02,m_h  C++ protection
01b,26apr01,m_h  convert tabs to spaces for readability
01a,12apr01,m_h  created from snds100 template.
*/

#ifndef __INCsngks32cSioh
#define __INCsngks32cSioh

#ifdef __cplusplus
extern "C" {
#endif

#include "sioLib.h"
#include "sngks32c.h"

/* Register offsets from Base Address*/
#define S3C44B0_ULCON0			0x0100000	/*UART Line Control Registers*/
#define S3C44B0_ULCON1			0x0104000
#define S3C44B0_UCON0			0x0100004	/*UART 0 Control Register */
#define S3C44B0_UCON1			0x0104004	/*UART 1 Control Register */
#define S3C44B0_UFCON0			0x0100008
#define S3C44B0_UFCON1			0x0104008
#define S3C44B0_UMCON0			0x010000c
#define S3C44B0_UMCON1			0x010400c
#define S3C44B0_UTRSTAT0		0x0100010	/*UART Transmit Buffer Register*/
#define S3C44B0_UTRSTAT1		0x0104010
#define S3C44B0_UERSTAT0		0x0100014
#define S3C44B0_UERSTAT1		0x0104014
#define S3C44B0_UFSTAT0		0x0100018
#define S3C44B0_UFSTAT1		0x0104018
#define S3C44B0_UMSTAT0		0x010001c
#define S3C44B0_UMSTAT1		0x010401c
#define S3C44B0_UBRDIV0		0x0100028
#define S3C44B0_UBRDIV1		0x0104028

#define S3C44B0_UTXH0			0x0100020
#define S3C44B0_UTXH1			0x0104020
#define S3C44B0_URXH0			0x0100024
#define S3C44B0_URXH1			0x0104024
#define S3C44B0_WrUTXH0(ch)		0x0100020=(unsigned char)(ch)
#define S3C44B0_WrUTXH1(ch)		0x0104020=(unsigned char)(ch)
#define S3C44B0_RdURXH0()		0x0100024
#define S3C44B0_RdURXH1()		0x0104024

/* Register offsets from Base Address*/


/* Bit definitions within ULCON0/1 Line Control Register*/
										/* BIT*/
#define NORMAL_MODE	0x00			/* 6   普通模式*/
#define IR_MODE			0x40			/* 6   红外模式*/
#define PARITY_NONE 	0x00			/* 5:3 无奇偶校验*/
#define PARITY_ODD 		0x20			/* 5:3 奇校验*/
#define PARITY_EVEN		0x28			/* 5:3 偶校验*/
#define ONE_STOP		0x00			/* 2   One stop bit per frame*/
#define TWO_STOP		0x04			/* 2   Two stop bit per frame*/
#define WORD_LEN_5		0x00			/* 1:0 确定数据位的为5*/
#define WORD_LEN_6		0x01			/* 1:0 确定数据位的为6*/
#define WORD_LEN_7		0x02			/* 1:0 确定数据位的为7*/
#define WORD_LEN_8		0x03			/* 1:0 确定数据位的为8*/

/* Bit definitions within UCON0/1 Control Register*/
										/* BIT  FUCON		*/
#define UCON_TX_INT_PULSE		0x000	/* 	9     Set Pulse*/
#define UCON_TX_INT_LEVEL		0x200	/* 	9     Set Level*/
#define UCON_RX_INT_PULSE		0x000	/* 	8 	Set Pulse*/
#define UCON_RX_INT_LEVEL		0x100	/* 	8 	Set Level*/

#define UCON_TIME_ERR_DIS	       0x00	/* 	7 	不允许Rx超时中断*/
#define UCON_TIME_ERR_ENB	       0x80	/* 	7 	允许Rx超时中断*/
#define UCON_RX_ERR_DIS		0x00	/* 	6 	不允许UART错误中断*/
#define UCON_RX_ERR_ENB		0x40	/* 	6 	允许UART错误中断*/
#define UCON_LOOP_NOR_MODE	0x00	/* 	5 	Normal operation*/
#define UCON_LOOP_BACK_MODE	0x20	/* 	5 	loop back 模式*/
#define UCON_SEND_NOR_SIG		0x00	/* 	4 	Normal transmit*/
#define UCON_SEND_BREAK_SIG	0x10	/* 	4 	Send break*/

#define UCON_TRANS_DIS			0x00	/* 3:2 	Disable*/
#define UCON_TRANS_MODE		0x04	/* 3:2 	中断请求模式*/
#define UCON_RECEV_DIS			0x00	/* 1:0 	Disable*/
#define UCON_RECEV_MODE		0x01	/* 1:0 	中断请求模式*/

#define UCON_RX_TX_RESET 		0x245	/* Rx and Tx Reset复位基值 */

/* Bit definitions within USTAT0/1 Status Register*/

											/* BIT  FUCON */
#define USTAT_TRA_SHIFT_EMPTY  0x04	/* 2 Parity Error*/
#define USTAT_TRA_BUF_READY   	0x02	/* 1 发送缓冲寄存器为空,能发送*/
#define USTAT_REC_BUF_READY  	0x01	/* 0 Receive Data Buffer*/

/* UART Baud Rate Divisor Time Constant Value */

#define S3C44B0_CNT0_1200		( (int)(MCLK/16./1200 + 0.5) -1 )		/* Baud_Rate 1200*/
#define S3C44B0_CNT0_2400		( (int)(MCLK/16./2400 + 0.5) -1 )		/* Baud_Rate 2400*/
#define S3C44B0_CNT0_4800		( (int)(MCLK/16./4800 + 0.5) -1 )	/* Baud_Rate 4800*/
#define S3C44B0_CNT0_9600		( (int)(MCLK/16./9600 + 0.5) -1 )		/* Baud_Rate 9600*/
#define S3C44B0_CNT0_19200		( (int)(MCLK/16./19200 + 0.5) -1 )		/* Baud_Rate 19200*/
#define S3C44B0_CNT0_38400		( (int)(MCLK/16./38400 + 0.5) -1 )		/* Baud_Rate 38400*/
#define S3C44B0_CNT0_57600		( (int)(MCLK/16./57600 + 0.5) -1 )		/* Baud_Rate 57600*/
#define S3C44B0_CNT0_115200	( (int)(MCLK/16./115200 + 0.5) -1 )		/* Baud_Rate 115200*/
#define S3C44B0_CNT0_230400	( (int)(MCLK/16./230400 + 0.5) -1 )		/* Baud_Rate 230400*/
#define S3C44B0_CNT0_460800	( (int)(MCLK/16./460800 + 0.5) -1 )		/* Baud_Rate 460800*/

#define S3C44B0_CNT1_VAL	0x00			/* Baud Rate Divisor Value*/

/* device and channel structures */

typedef struct
    {
    /* must be first */

    SIO_CHAN        sio;        /* standard SIO_CHAN element */

    /* callbacks */

    STATUS            (*getTxChar) ();
    STATUS            (*putRcvChar) ();
    void *            getTxArg;
    void *            putRcvArg;

    /* register addresses */

    UINT32 *          regs;        /*UART Registers*/

    /*  interrupts */
    UINT8             intLevelRx;     /* recv interrupt Level for this device*/
    UINT8             intLevelTx;     /* transmit interrupt Level for this device*/
  

    /* misc */
    UINT32            regDelta;       /* register address spacing */
    uint_t            options;        /* Hardware options */
    int               mode;           /* current mode (interrupt or poll) */
    int               baudRate;       /* input clock frequency */

    } SNGKS32C_CHAN;

/* function prototypes */

#if defined(__STDC__)

extern void    sngks32cDevInit  (SNGKS32C_CHAN *pChan); 
extern void    sngks32cDevInit2 (SNGKS32C_CHAN *pChan); 
extern void    sngks32cIntRcv   (SNGKS32C_CHAN *pChan);
extern void    sngks32cIntTx    (SNGKS32C_CHAN *pChan);

#else   /* __STDC__ */

extern void    sngks32cDevInit  ();
extern void    sngks32cDevInit2 ();
extern void    sngks32cIntRcv   ();
extern void    sngks32cIntTx    ();


#endif  /* __STDC__ */

#ifdef __cplusplus
}
#endif

#endif  /* __INCsngks32cSioh */