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📄 stm8s_uart3.ls

📁 STM8S105 BLDC源代码
💻 LS
📖 第 1 页 / 共 3 页
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1796                     ; 622       status = SET;
1798  0267 2021          	jp	LC007
1799                     ; 627       status = RESET;
1800  0269               L147:
1801                     ; 630   else if (UART3_FLAG == UART3_FLAG_SBK)
1803  0269 1e02          	ldw	x,(OFST+1,sp)
1804  026b a30101        	cpw	x,#257
1805  026e 2609          	jrne	L157
1806                     ; 632     if ((UART3->CR2 & (u8)UART3_FLAG) != (u8)0x00)
1808  0270 c65245        	ld	a,21061
1809  0273 1503          	bcp	a,(OFST+2,sp)
1810  0275 2717          	jreq	L567
1811                     ; 635       status = SET;
1813  0277 2011          	jp	LC007
1814                     ; 640       status = RESET;
1815  0279               L157:
1816                     ; 643   else if ((UART3_FLAG == UART3_FLAG_LHDF) || (UART3_FLAG == UART3_FLAG_LSF))
1818  0279 a30302        	cpw	x,#770
1819  027c 2705          	jreq	L367
1821  027e a30301        	cpw	x,#769
1822  0281 260f          	jrne	L167
1823  0283               L367:
1824                     ; 645     if ((UART3->CR6 & (u8)UART3_FLAG) != (u8)0x00)
1826  0283 c65249        	ld	a,21065
1827  0286 1503          	bcp	a,(OFST+2,sp)
1828  0288 2704          	jreq	L567
1829                     ; 648       status = SET;
1831  028a               LC007:
1835  028a a601          	ld	a,#1
1838  028c 2001          	jra	L747
1839  028e               L567:
1840                     ; 653       status = RESET;
1844  028e 4f            	clr	a
1845  028f               L747:
1846                     ; 671   return  status;
1850  028f 5b03          	addw	sp,#3
1851  0291 81            	ret	
1852  0292               L167:
1853                     ; 658     if ((UART3->SR & (u8)UART3_FLAG) != (u8)0x00)
1855  0292 c65240        	ld	a,21056
1856  0295 1503          	bcp	a,(OFST+2,sp)
1857  0297 27f5          	jreq	L567
1858                     ; 661       status = SET;
1860  0299 20ef          	jp	LC007
1861                     ; 666       status = RESET;
1896                     ; 708 void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG)
1896                     ; 709 {
1897                     	switch	.text
1898  029b               _UART3_ClearFlag:
1900  029b 89            	pushw	x
1901       00000000      OFST:	set	0
1904                     ; 710   assert_param(IS_UART3_CLEAR_FLAG_OK(UART3_FLAG));
1906                     ; 713   if (UART3_FLAG == UART3_FLAG_RXNE)
1908  029c a30020        	cpw	x,#32
1909  029f 2606          	jrne	L5101
1910                     ; 715     UART3->SR = (u8)~(UART3_SR_RXNE);
1912  02a1 35df5240      	mov	21056,#223
1914  02a5 201c          	jra	L7101
1915  02a7               L5101:
1916                     ; 718   else if (UART3_FLAG == UART3_FLAG_LBDF)
1918  02a7 1e01          	ldw	x,(OFST+1,sp)
1919  02a9 a30210        	cpw	x,#528
1920  02ac 2606          	jrne	L1201
1921                     ; 720     UART3->CR4 &= (u8)(~UART3_CR4_LBDF);
1923  02ae 72195247      	bres	21063,#4
1925  02b2 200f          	jra	L7101
1926  02b4               L1201:
1927                     ; 723   else if (UART3_FLAG == UART3_FLAG_LHDF)
1929  02b4 a30302        	cpw	x,#770
1930  02b7 2606          	jrne	L5201
1931                     ; 725     UART3->CR6 &= (u8)(~UART3_CR6_LHDF);
1933  02b9 72135249      	bres	21065,#1
1935  02bd 2004          	jra	L7101
1936  02bf               L5201:
1937                     ; 730     UART3->CR6 &= (u8)(~UART3_CR6_LSF);
1939  02bf 72115249      	bres	21065,#0
1940  02c3               L7101:
1941                     ; 733 }
1944  02c3 85            	popw	x
1945  02c4 81            	ret	
2027                     ; 760 ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT)
2027                     ; 761 {
2028                     	switch	.text
2029  02c5               _UART3_GetITStatus:
2031  02c5 89            	pushw	x
2032  02c6 89            	pushw	x
2033       00000002      OFST:	set	2
2036                     ; 762   ITStatus pendingbitstatus = RESET;
2038                     ; 763   u8 itpos = 0;
2040                     ; 764   u8 itmask1 = 0;
2042                     ; 765   u8 itmask2 = 0;
2044                     ; 766   u8 enablestatus = 0;
2046                     ; 769   assert_param(IS_UART3_GET_IT_OK(UART3_IT));
2048                     ; 772   itpos = (u8)((u8)1 << (u8)((u8)UART3_IT & (u8)0x0F));
2050  02c7 9f            	ld	a,xl
2051  02c8 a40f          	and	a,#15
2052  02ca 5f            	clrw	x
2053  02cb 97            	ld	xl,a
2054  02cc a601          	ld	a,#1
2055  02ce 5d            	tnzw	x
2056  02cf 2704          	jreq	L26
2057  02d1               L46:
2058  02d1 48            	sll	a
2059  02d2 5a            	decw	x
2060  02d3 26fc          	jrne	L46
2061  02d5               L26:
2062  02d5 6b01          	ld	(OFST-1,sp),a
2063                     ; 774   itmask1 = (u8)((u8)UART3_IT >> (u8)4);
2065  02d7 7b04          	ld	a,(OFST+2,sp)
2066  02d9 4e            	swap	a
2067  02da a40f          	and	a,#15
2068  02dc 6b02          	ld	(OFST+0,sp),a
2069                     ; 776   itmask2 = (u8)((u8)1 << itmask1);
2071  02de 5f            	clrw	x
2072  02df 97            	ld	xl,a
2073  02e0 a601          	ld	a,#1
2074  02e2 5d            	tnzw	x
2075  02e3 2704          	jreq	L66
2076  02e5               L07:
2077  02e5 48            	sll	a
2078  02e6 5a            	decw	x
2079  02e7 26fc          	jrne	L07
2080  02e9               L66:
2081  02e9 6b02          	ld	(OFST+0,sp),a
2082                     ; 781   if (UART3_IT == UART3_IT_PE)
2084  02eb 1e03          	ldw	x,(OFST+1,sp)
2085  02ed a30100        	cpw	x,#256
2086  02f0 260c          	jrne	L3701
2087                     ; 784     enablestatus = (u8)((u8)UART3->CR1 & itmask2);
2089  02f2 c65244        	ld	a,21060
2090  02f5 1402          	and	a,(OFST+0,sp)
2091  02f7 6b02          	ld	(OFST+0,sp),a
2092                     ; 787     if (((UART3->SR & itpos) != (u8)0x00) && enablestatus)
2094  02f9 c65240        	ld	a,21056
2096                     ; 790       pendingbitstatus = SET;
2098  02fc 2020          	jp	LC010
2099                     ; 795       pendingbitstatus = RESET;
2100  02fe               L3701:
2101                     ; 799   else if (UART3_IT == UART3_IT_LBDF)
2103  02fe a30346        	cpw	x,#838
2104  0301 260c          	jrne	L3011
2105                     ; 802     enablestatus = (u8)((u8)UART3->CR4 & itmask2);
2107  0303 c65247        	ld	a,21063
2108  0306 1402          	and	a,(OFST+0,sp)
2109  0308 6b02          	ld	(OFST+0,sp),a
2110                     ; 804     if (((UART3->CR4 & itpos) != (u8)0x00) && enablestatus)
2112  030a c65247        	ld	a,21063
2114                     ; 807       pendingbitstatus = SET;
2116  030d 200f          	jp	LC010
2117                     ; 812       pendingbitstatus = RESET;
2118  030f               L3011:
2119                     ; 815   else if (UART3_IT == UART3_IT_LHDF)
2121  030f a30412        	cpw	x,#1042
2122  0312 2616          	jrne	L3111
2123                     ; 818     enablestatus = (u8)((u8)UART3->CR6 & itmask2);
2125  0314 c65249        	ld	a,21065
2126  0317 1402          	and	a,(OFST+0,sp)
2127  0319 6b02          	ld	(OFST+0,sp),a
2128                     ; 820     if (((UART3->CR6 & itpos) != (u8)0x00) && enablestatus)
2130  031b c65249        	ld	a,21065
2132  031e               LC010:
2133  031e 1501          	bcp	a,(OFST-1,sp)
2134  0320 271a          	jreq	L3211
2135  0322 7b02          	ld	a,(OFST+0,sp)
2136  0324 2716          	jreq	L3211
2137                     ; 823       pendingbitstatus = SET;
2139  0326               LC009:
2143  0326 a601          	ld	a,#1
2145  0328 2013          	jra	L1011
2146                     ; 828       pendingbitstatus = RESET;
2147  032a               L3111:
2148                     ; 834     enablestatus = (u8)((u8)UART3->CR2 & itmask2);
2150  032a c65245        	ld	a,21061
2151  032d 1402          	and	a,(OFST+0,sp)
2152  032f 6b02          	ld	(OFST+0,sp),a
2153                     ; 836     if (((UART3->SR & itpos) != (u8)0x00) && enablestatus)
2155  0331 c65240        	ld	a,21056
2156  0334 1501          	bcp	a,(OFST-1,sp)
2157  0336 2704          	jreq	L3211
2159  0338 7b02          	ld	a,(OFST+0,sp)
2160                     ; 839       pendingbitstatus = SET;
2162  033a 26ea          	jrne	LC009
2163  033c               L3211:
2164                     ; 844       pendingbitstatus = RESET;
2169  033c 4f            	clr	a
2170  033d               L1011:
2171                     ; 848   return  pendingbitstatus;
2175  033d 5b04          	addw	sp,#4
2176  033f 81            	ret	
2221                     ; 884 void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT)
2221                     ; 885 {
2222                     	switch	.text
2223  0340               _UART3_ClearITPendingBit:
2225  0340 89            	pushw	x
2226  0341 88            	push	a
2227       00000001      OFST:	set	1
2230                     ; 886   u8 dummy = 0;
2232  0342 0f01          	clr	(OFST+0,sp)
2233                     ; 887   assert_param(IS_UART3_CLEAR_IT_OK(UART3_IT));
2235                     ; 890   if (UART3_IT == UART3_IT_RXNE)
2237  0344 a30255        	cpw	x,#597
2238  0347 2606          	jrne	L1511
2239                     ; 892     UART3->SR = (u8)~(UART3_SR_RXNE);
2241  0349 35df5240      	mov	21056,#223
2243  034d 2011          	jra	L3511
2244  034f               L1511:
2245                     ; 895   else if (UART3_IT == UART3_IT_LBDF)
2247  034f 1e02          	ldw	x,(OFST+1,sp)
2248  0351 a30346        	cpw	x,#838
2249  0354 2606          	jrne	L5511
2250                     ; 897     UART3->CR4 &= (u8)~(UART3_CR4_LBDF);
2252  0356 72195247      	bres	21063,#4
2254  035a 2004          	jra	L3511
2255  035c               L5511:
2256                     ; 902     UART3->CR6 &= (u8)(~UART3_CR6_LHDF);
2258  035c 72135249      	bres	21065,#1
2259  0360               L3511:
2260                     ; 904 }
2263  0360 5b03          	addw	sp,#3
2264  0362 81            	ret	
2277                     	xref	_CLK_GetClockFreq
2278                     	xdef	_UART3_ClearITPendingBit
2279                     	xdef	_UART3_GetITStatus
2280                     	xdef	_UART3_ClearFlag
2281                     	xdef	_UART3_GetFlagStatus
2282                     	xdef	_UART3_SetAddress
2283                     	xdef	_UART3_SendBreak
2284                     	xdef	_UART3_SendData9
2285                     	xdef	_UART3_SendData8
2286                     	xdef	_UART3_ReceiveData9
2287                     	xdef	_UART3_ReceiveData8
2288                     	xdef	_UART3_WakeUpConfig
2289                     	xdef	_UART3_ReceiverWakeUpCmd
2290                     	xdef	_UART3_LINCmd
2291                     	xdef	_UART3_LINConfig
2292                     	xdef	_UART3_LINBreakDetectionConfig
2293                     	xdef	_UART3_ITConfig
2294                     	xdef	_UART3_Cmd
2295                     	xdef	_UART3_Init
2296                     	xdef	_UART3_DeInit
2297                     	xref.b	c_lreg
2298                     	xref.b	c_x
2317                     	xref	c_lursh
2318                     	xref	c_lsub
2319                     	xref	c_smul
2320                     	xref	c_ludv
2321                     	xref	c_rtol
2322                     	xref	c_llsh
2323                     	xref	c_ltor
2324                     	end

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