📄 stm8s_tim2.ls
字号:
2332 026c L1711:
2333 ; 923 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1P);
2335 026c 72135308 bres 21256,#1
2336 ; 925 }
2339 0270 81 ret
2375 ; 945 void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
2375 ; 946 {
2376 switch .text
2377 0271 _TIM2_OC2PolarityConfig:
2381 ; 948 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
2383 ; 951 if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
2385 0271 4d tnz a
2386 0272 2705 jreq L3121
2387 ; 953 TIM2->CCER1 |= TIM2_CCER1_CC2P;
2389 0274 721a5308 bset 21256,#5
2392 0278 81 ret
2393 0279 L3121:
2394 ; 957 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2P);
2396 0279 721b5308 bres 21256,#5
2397 ; 959 }
2400 027d 81 ret
2436 ; 979 void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity)
2436 ; 980 {
2437 switch .text
2438 027e _TIM2_OC3PolarityConfig:
2442 ; 982 assert_param(IS_TIM2_OC_POLARITY_OK(TIM2_OCPolarity));
2444 ; 985 if (TIM2_OCPolarity != TIM2_OCPOLARITY_HIGH)
2446 027e 4d tnz a
2447 027f 2705 jreq L5321
2448 ; 987 TIM2->CCER2 |= TIM2_CCER2_CC3P;
2450 0281 72125309 bset 21257,#1
2453 0285 81 ret
2454 0286 L5321:
2455 ; 991 TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3P);
2457 0286 72135309 bres 21257,#1
2458 ; 993 }
2461 028a 81 ret
2506 ; 1016 void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState)
2506 ; 1017 {
2507 switch .text
2508 028b _TIM2_CCxCmd:
2510 028b 89 pushw x
2511 00000000 OFST: set 0
2514 ; 1019 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
2516 ; 1020 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
2518 ; 1022 if (TIM2_Channel == TIM2_CHANNEL_1)
2520 028c 9e ld a,xh
2521 028d 4d tnz a
2522 028e 2610 jrne L3621
2523 ; 1025 if (NewState != DISABLE)
2525 0290 9f ld a,xl
2526 0291 4d tnz a
2527 0292 2706 jreq L5621
2528 ; 1027 TIM2->CCER1 |= TIM2_CCER1_CC1E;
2530 0294 72105308 bset 21256,#0
2532 0298 2029 jra L1721
2533 029a L5621:
2534 ; 1031 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1E);
2536 029a 72115308 bres 21256,#0
2537 029e 2023 jra L1721
2538 02a0 L3621:
2539 ; 1035 else if (TIM2_Channel == TIM2_CHANNEL_2)
2541 02a0 7b01 ld a,(OFST+1,sp)
2542 02a2 4a dec a
2543 02a3 2610 jrne L3721
2544 ; 1038 if (NewState != DISABLE)
2546 02a5 7b02 ld a,(OFST+2,sp)
2547 02a7 2706 jreq L5721
2548 ; 1040 TIM2->CCER1 |= TIM2_CCER1_CC2E;
2550 02a9 72185308 bset 21256,#4
2552 02ad 2014 jra L1721
2553 02af L5721:
2554 ; 1044 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2E);
2556 02af 72195308 bres 21256,#4
2557 02b3 200e jra L1721
2558 02b5 L3721:
2559 ; 1050 if (NewState != DISABLE)
2561 02b5 7b02 ld a,(OFST+2,sp)
2562 02b7 2706 jreq L3031
2563 ; 1052 TIM2->CCER2 |= TIM2_CCER2_CC3E;
2565 02b9 72105309 bset 21257,#0
2567 02bd 2004 jra L1721
2568 02bf L3031:
2569 ; 1056 TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3E);
2571 02bf 72115309 bres 21257,#0
2572 02c3 L1721:
2573 ; 1059 }
2576 02c3 85 popw x
2577 02c4 81 ret
2622 ; 1090 void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode)
2622 ; 1091 {
2623 switch .text
2624 02c5 _TIM2_SelectOCxM:
2626 02c5 89 pushw x
2627 00000000 OFST: set 0
2630 ; 1093 assert_param(IS_TIM2_CHANNEL_OK(TIM2_Channel));
2632 ; 1094 assert_param(IS_TIM2_OCM_OK(TIM2_OCMode));
2634 ; 1096 if (TIM2_Channel == TIM2_CHANNEL_1)
2636 02c6 9e ld a,xh
2637 02c7 4d tnz a
2638 02c8 2610 jrne L1331
2639 ; 1099 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC1E);
2641 02ca 72115308 bres 21256,#0
2642 ; 1102 TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
2644 02ce c65305 ld a,21253
2645 02d1 a48f and a,#143
2646 02d3 1a02 or a,(OFST+2,sp)
2647 02d5 c75305 ld 21253,a
2649 02d8 2023 jra L3331
2650 02da L1331:
2651 ; 1104 else if (TIM2_Channel == TIM2_CHANNEL_2)
2653 02da 7b01 ld a,(OFST+1,sp)
2654 02dc 4a dec a
2655 02dd 2610 jrne L5331
2656 ; 1107 TIM2->CCER1 &= (u8)(~TIM2_CCER1_CC2E);
2658 02df 72195308 bres 21256,#4
2659 ; 1110 TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
2661 02e3 c65306 ld a,21254
2662 02e6 a48f and a,#143
2663 02e8 1a02 or a,(OFST+2,sp)
2664 02ea c75306 ld 21254,a
2666 02ed 200e jra L3331
2667 02ef L5331:
2668 ; 1115 TIM2->CCER2 &= (u8)(~TIM2_CCER2_CC3E);
2670 02ef 72115309 bres 21257,#0
2671 ; 1118 TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_OCM)) | (u8)TIM2_OCMode);
2673 02f3 c65307 ld a,21255
2674 02f6 a48f and a,#143
2675 02f8 1a02 or a,(OFST+2,sp)
2676 02fa c75307 ld 21255,a
2677 02fd L3331:
2678 ; 1120 }
2681 02fd 85 popw x
2682 02fe 81 ret
2716 ; 1138 void TIM2_SetCounter(u16 Counter)
2716 ; 1139 {
2717 switch .text
2718 02ff _TIM2_SetCounter:
2722 ; 1141 TIM2->CNTRH = (u8)(Counter >> 8);
2724 02ff 9e ld a,xh
2725 0300 c7530a ld 21258,a
2726 ; 1142 TIM2->CNTRL = (u8)(Counter);
2728 0303 9f ld a,xl
2729 0304 c7530b ld 21259,a
2730 ; 1144 }
2733 0307 81 ret
2767 ; 1162 void TIM2_SetAutoreload(u16 Autoreload)
2767 ; 1163 {
2768 switch .text
2769 0308 _TIM2_SetAutoreload:
2773 ; 1166 TIM2->ARRH = (u8)(Autoreload >> 8);
2775 0308 9e ld a,xh
2776 0309 c7530d ld 21261,a
2777 ; 1167 TIM2->ARRL = (u8)(Autoreload);
2779 030c 9f ld a,xl
2780 030d c7530e ld 21262,a
2781 ; 1169 }
2784 0310 81 ret
2818 ; 1187 void TIM2_SetCompare1(u16 Compare1)
2818 ; 1188 {
2819 switch .text
2820 0311 _TIM2_SetCompare1:
2824 ; 1190 TIM2->CCR1H = (u8)(Compare1 >> 8);
2826 0311 9e ld a,xh
2827 0312 c7530f ld 21263,a
2828 ; 1191 TIM2->CCR1L = (u8)(Compare1);
2830 0315 9f ld a,xl
2831 0316 c75310 ld 21264,a
2832 ; 1193 }
2835 0319 81 ret
2869 ; 1211 void TIM2_SetCompare2(u16 Compare2)
2869 ; 1212 {
2870 switch .text
2871 031a _TIM2_SetCompare2:
2875 ; 1214 TIM2->CCR2H = (u8)(Compare2 >> 8);
2877 031a 9e ld a,xh
2878 031b c75311 ld 21265,a
2879 ; 1215 TIM2->CCR2L = (u8)(Compare2);
2881 031e 9f ld a,xl
2882 031f c75312 ld 21266,a
2883 ; 1217 }
2886 0322 81 ret
2920 ; 1235 void TIM2_SetCompare3(u16 Compare3)
2920 ; 1236 {
2921 switch .text
2922 0323 _TIM2_SetCompare3:
2926 ; 1238 TIM2->CCR3H = (u8)(Compare3 >> 8);
2928 0323 9e ld a,xh
2929 0324 c75313 ld 21267,a
2930 ; 1239 TIM2->CCR3L = (u8)(Compare3);
2932 0327 9f ld a,xl
2933 0328 c75314 ld 21268,a
2934 ; 1241 }
2937 032b 81 ret
2973 ; 1263 void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler)
2973 ; 1264 {
2974 switch .text
2975 032c _TIM2_SetIC1Prescaler:
2977 032c 88 push a
2978 00000000 OFST: set 0
2981 ; 1266 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC1Prescaler));
2983 ; 1269 TIM2->CCMR1 = (u8)((TIM2->CCMR1 & (u8)(~TIM2_CCMR_ICxPSC)) | (u8)TIM2_IC1Prescaler);
2985 032d c65305 ld a,21253
2986 0330 a4f3 and a,#243
2987 0332 1a01 or a,(OFST+1,sp)
2988 0334 c75305 ld 21253,a
2989 ; 1270 }
2992 0337 84 pop a
2993 0338 81 ret
3029 ; 1291 void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler)
3029 ; 1292 {
3030 switch .text
3031 0339 _TIM2_SetIC2Prescaler:
3033 0339 88 push a
3034 00000000 OFST: set 0
3037 ; 1294 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC2Prescaler));
3039 ; 1297 TIM2->CCMR2 = (u8)((TIM2->CCMR2 & (u8)(~TIM2_CCMR_ICxPSC)) | (u8)TIM2_IC2Prescaler);
3041 033a c65306 ld a,21254
3042 033d a4f3 and a,#243
3043 033f 1a01 or a,(OFST+1,sp)
3044 0341 c75306 ld 21254,a
3045 ; 1298 }
3048 0344 84 pop a
3049 0345 81 ret
3085 ; 1319 void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler)
3085 ; 1320 {
3086 switch .text
3087 0346 _TIM2_SetIC3Prescaler:
3089 0346 88 push a
3090 00000000 OFST: set 0
3093 ; 1323 assert_param(IS_TIM2_IC_PRESCALER_OK(TIM2_IC3Prescaler));
3095 ; 1325 TIM2->CCMR3 = (u8)((TIM2->CCMR3 & (u8)(~TIM2_CCMR_ICxPSC)) | (u8)TIM2_IC3Prescaler);
3097 0347 c65307 ld a,21255
3098 034a a4f3 and a,#243
3099 034c 1a01 or a,(OFST+1,sp)
3100 034e c75307 ld 21255,a
3101 ; 1326 }
3104 0351 84 pop a
3105 0352 81 ret
3157 ; 1344 u16 TIM2_GetCapture1(void)
3157 ; 1345 {
3158 switch .text
3159 0353 _TIM2_GetCapture1:
3161 0353 5204 subw sp,#4
3162 00000004 OFST: set 4
3165 ; 1347 u16 tmpccr1 = 0;
3167 ; 1348 u8 tmpccr1l=0, tmpccr1h=0;
3171 ; 1350 tmpccr1h = TIM2->CCR1H;
3173 0355 c6530f ld a,21263
3174 0358 6b02 ld (OFST-2,sp),a
3175 ; 1351 tmpccr1l = TIM2->CCR1L;
3177 035a c65310 ld a,21264
3178 035d 6b01 ld (OFST-3,sp),a
3179 ; 1353 tmpccr1 = (u16)(tmpccr1l);
3181 035f 5f clrw x
3182 0360 97 ld xl,a
3183 0361 1f03 ldw (OFST-1,sp),x
3184 ; 1354 tmpccr1 |= (u16)((u16)tmpccr1h << 8);
3186 0363 5f clrw x
3187 0364 7b02 ld a,(OFST-2,sp)
3188 0366 97 ld xl,a
3189 0367 7b04 ld a,(OFST+0,sp)
3190 0369 01 rrwa x,a
3191 036a 1a03 or a,(OFST-1,sp)
3192 036c 01 rrwa x,a
3193 ; 1356 return (u16)tmpccr1;
3197 036d 5b04 addw sp,#4
3198 036f 81 ret
3250 ; 1375 u16 TIM2_GetCapture2(void)
3250 ; 1376 {
3251 switch .text
3252 0370 _TIM2_GetCapture2:
3254 0370 5204 subw sp,#4
3255 00000004 OFST: set 4
3258 ; 1378 u16 tmpccr2 = 0;
3260 ; 1379 u8 tmpccr2l=0, tmpccr2h=0;
3264 ; 1381 tmpccr2h = TIM2->CCR2H;
3266 0372 c65311 ld a,21265
3267 0375 6b02 ld (OFST-2,sp),a
3268 ; 1382 tmpccr2l = TIM2->CCR2L;
3270 0377 c65312 ld a,21266
3271 037a 6b01 ld (OFST-3,sp),a
3272 ; 1384 tmpccr2 = (u16)(tmpccr2l);
3274 037c 5f clrw x
3275 037d 97 ld xl,a
3276 037e 1f03 ldw (OFST-1,sp),x
3277 ; 1385 tmpccr2 |= (u16)((u16)tmpccr2h << 8);
3279 0380 5f clrw x
3280 0381 7b02 ld a,(OFST-2,sp)
3281 0383 97 ld xl,a
3282 0384 7b04 ld a,(OFST+0,sp)
3283 0386 01 rrwa x,a
3284 0387 1a03 or a,(OFST-1,sp)
3285 0389 01 rrwa x,a
3286 ; 1387 return (u16)tmpccr2;
3290 038a 5b04 addw sp,#4
3291 038c 81 ret
3343 ; 1406 u16 TIM2_GetCapture3(void)
3343 ; 1407 {
3344 switch .text
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -