dm9k8.c

DM9000的linux驱动源代码：Linux Base Driver for DM9008A adapter Version 1.0

/*
  dm9k8c: Version 1.0 05/2005 
  
        A Davicom DM9008A 10M ONLY Ethernet driver for Linux.

	This program is free software; you can redistribute it and/or
	modify it under the terms of the GNU General Public License
	as published by the Free Software Foundation; either version 2
	of the License, or (at your option) any later version.

	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
	GNU General Public License for more details.


  (C)Copyright 1997-2005 DAVICOM Semiconductor,Inc. All Rights Reserved.

2005/05  Bill  v1.0  Create	

*/

#if defined(MODVERSIONS)
#include <linux/modversions.h>
#endif
				
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/version.h>
#include <asm/dma.h>
#include <linux/spinlock.h>
#include <linux/crc32.h>

/* Board/System/Debug information/definition ---------------- */

#define DM9K8_ID		0x90000A46
/*-------register name-----------------------*/
#define DM9K8_NCR		0x00	/* Network control Reg.*/
#define DM9K8_NSR		0x01	/* Network Status Reg.*/
#define DM9K8_TCR		0x02	/* TX control Reg.*/
#define DM9K8_RXCR		0x05	/* RX control Reg.*/
#define DM9K8_BPTR		0x08
#define DM9K8_EPCR		0x0b
#define DM9K8_EPAR		0x0c
#define DM9K8_EPDRL		0x0d
#define DM9K8_EPDRH		0x0e
#define DM9K8_GPR		0x1f	/* General purpose register */
#define DM9K8_TCR2		0x2d
#define DM9K8_SMCR		0x2f 	/* Special Mode Control Reg.*/
#define DM9K8_ETXCSR		0x30	/* Early Transmit control/status Reg.*/
#define	DM9K8_TCCR		0x31	/* Checksum cntrol Reg. */
#define DM9K8_RCSR		0x32	/* Receive Checksum status Reg.*/
#define DM9K8_MRCMDX		0xf0
#define DM9K8_MRCMD		0xf2
#define DM9K8_MDRAH		0xf4
#define DM9K8_MDRAL		0xf5
#define DM9K8_MWCMD		0xf8
#define DM9K8_TXPLL		0xfc
#define DM9K8_TXPLH		0xfd
#define DM9K8_ISR		0xfe
#define DM9K8_IMR		0xff
/*---------------------------------------------*/
#define DM9K8_REG05		0x30	/* SKIP_CRC/SKIP_LONG */ 
#define DM9K8_REGFF		0xA3	/* IMR */
#define DM9K8_DISINTR		0x80

#define DM9K8_PHY		0x40	/* PHY address 0x01 */
#define DM9K8_PKT_RDY		0x01	/* Packet ready to receive */
#define DM9K8_MIN_IO		0x300
#define DM9K8_MAX_IO		0x370

#define DM9K8_VID_L		0x28
#define DM9K8_VID_H		0x29
#define DM9K8_PID_L		0x2A
#define DM9K8_PID_H		0x2B

#define DM9K8_RX_INTR		0x01
#define DM9K8_TX_INTR		0x02
#define DM9K8_LINK_INTR		0x20

#define DM9K8_BYTE_MODE		2
#define DM9K8_WORD_MODE		0

#define TRUE			1
#define FALSE			0

#define DM9K8_TIMER_WUT  jiffies+(HZ*2)	/* timer wakeup time : 2 second */
#define DM9K8_TX_TIMEOUT (HZ*2)		/* tx packet time-out time 1.5 s" */

#if defined(DM9K8_DEBUG)
#define DM9K8_DBUG(dbug_now, msg, vaule)\
if (dm9K8_debug||dbug_now) printk(KERN_ERR "dm9K8: %s %x\n", msg, vaule)
#else
#define DM9K8_DBUG(dbug_now, msg, vaule)\
if (dbug_now) printk(KERN_ERR "dm9K8: %s %x\n", msg, vaule)
#endif

#pragma pack(push, 1)
typedef struct _RX_DESC
{
	u8 rxbyte;
	u8 status;
	u16 length;
}RX_DESC;

typedef union{
	u8 buf[4];
	RX_DESC desc;
} rx_t;
#pragma pack(pop)

enum DM9K8_PHY_mode {
	DM9K8_10MHD   = 0, 
	DM9K8_10MFD   = 1,
	DM9K8_AUTO    = 2, 
};

/* Structure/enum declaration ------------------------------- */
typedef struct board_info {
 
	u32 reset_counter;		/* counter: RESET */ 
	u32 reset_tx_timeout;		/* RESET caused by TX Timeout */ 

	u16 io_addr;			/* Register I/O base address */
	u16 io_data;			/* Data I/O address */
	u16 tx_pkt_cnt;

	u8 op_mode;			/* PHY operation mode */
	u8 io_mode;			/* 0:word, 2:byte */
	u8 device_wait_reset;		/* device state */
	u8 link_change;
	u8 nway;

	struct timer_list timer;
	struct net_device_stats stats;
	unsigned char srom[128];
	spinlock_t lock;

} board_info_t;

/* Global variable declaration ----------------------------- */
/*static int dm9K8_debug = 0;*/
static struct net_device * dm9K8_dev = NULL;

/* For module input parameter */
static int mode       = DM9K8_AUTO;
static int media_mode = DM9K8_AUTO;
static u8  irq        = 3;
static u16 iobase     = DM9K8_MIN_IO;

/* function declaration ------------------------------------- */
int dm9K8_probe(struct net_device *);
static int dm9K8_open(struct net_device *);
static int dm9K8_start_xmit(struct sk_buff *, struct net_device *);
static void dm9K8_tx_done(unsigned long);
static void dm9K8_packet_receive(struct net_device *);
static int dm9K8_stop(struct net_device *);
static struct net_device_stats * dm9K8_get_stats(struct net_device *); 
static int dm9K8_do_ioctl(struct net_device *, struct ifreq *, int);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
static void dm9K8_interrupt(int , void *, struct pt_regs *);
#else
static irqreturn_t dm9K8_interrupt(int , void *, struct pt_regs *);
#endif
static void dm9K8_timer(unsigned long);
static void dm9K8_init(struct net_device *);
static unsigned long cal_CRC(unsigned char *, unsigned int, u8);
static u8 ior(board_info_t *, int);
static void iow(board_info_t *, int, u8);
static u16 phy_read(board_info_t *, int);
static void phy_write(board_info_t *, int, u16);
static u16 read_srom_word(board_info_t *, int);
static void dm9K8_hash_table(struct net_device *);
#if defined(CHECKSUM)
static u8 check_rx_ready(u8);
#endif

DECLARE_TASKLET(dm9K8_tx_tasklet,dm9K8_tx_done,0);

/* DM9K8 network baord routine ---------------------------- */

/*
  Search DM9K8 board, allocate space and register it
*/
struct net_device * __init dm9K8_probe1(void)
{
	struct net_device *dev;
	int err;

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
	dev = init_etherdev(NULL, sizeof(struct board_info));
	ether_setup(dev);		
#else
	dev= alloc_etherdev(sizeof(struct board_info));
#endif

	if(!dev)
		return ERR_PTR(-ENOMEM);

     	SET_MODULE_OWNER(dev);
	err = dm9K8_probe(dev);
	if (err)
		goto out;
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
	err = register_netdev(dev);
	if (err)
		goto out1;
#endif
	return dev;
out1:
	release_region(dev->base_addr,2);
out:
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
	kfree(dev);
#else
	free_netdev(dev);
#endif
	return ERR_PTR(err);
}

int __init dm9K8_probe(struct net_device *dev)
{
	struct board_info *db;    /* Point a board information structure */
	u32 id_val;
	u16 i, dm9K8_found = FALSE;

	DM9K8_DBUG(0, "dm9K8_probe()",0);

	/* Search All DM9K8 serial NIC */
	do {
		outb(DM9K8_VID_L, iobase);
		id_val = inb(iobase + 4);
		outb(DM9K8_VID_H, iobase);
		id_val |= inb(iobase + 4) << 8;
		outb(DM9K8_PID_L, iobase);
		id_val |= inb(iobase + 4) << 16;
		outb(DM9K8_PID_H, iobase);
		id_val |= inb(iobase + 4) << 24;

		if (id_val == DM9K8_ID) {
			
			/* Request IO from system */
			if(!request_region(iobase, 2, dev->name))
				return -ENODEV;

			printk("<DM9K8> I/O: %x, IRQ: %x \n",iobase, irq);
			dm9K8_found = TRUE;

			/* Allocated board information structure */
			memset(dev->priv, 0, sizeof(struct board_info));
			db = (board_info_t *)dev->priv;
			dm9K8_dev    = dev;
			db->io_addr  = iobase;
			db->io_data = iobase + 4;

			/* driver system function */
			dev->base_addr 		= iobase;
			dev->irq 		= irq;
			dev->open 		= &dm9K8_open;
			dev->hard_start_xmit 	= &dm9K8_start_xmit;
			dev->stop 		= &dm9K8_stop;
			dev->get_stats 		= &dm9K8_get_stats;
			dev->set_multicast_list = &dm9K8_hash_table;
			dev->do_ioctl 		= &dm9K8_do_ioctl;

#if defined(CHECKSUM)
			dev->features = dev->features | NETIF_F_NO_CSUM;
#endif
			/* Read SROM content */
			for (i=0; i<64; i++)
				((u16 *)db->srom)[i] = read_srom_word(db, i);

			/* Set Node Address */
			for (i=0; i<6; i++)
				dev->dev_addr[i] = db->srom[i];


		}//end of if()
		iobase += 0x10;
	}while(!dm9K8_found && iobase <= DM9K8_MAX_IO);

	return dm9K8_found ? 0:-ENODEV;
}

/*
  Open the interface.
  The interface is opened whenever "ifconfig" actives it.
*/
static int dm9K8_open(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	DM9K8_DBUG(0, "dm9K8_open", 0);

	if (request_irq(dev->irq,&dm9K8_interrupt,SA_SHIRQ,dev->name,dev)) 
		return -EAGAIN;

	/* Initilize DM910X board */
	dm9K8_init(dev);
 
	/* Init driver variable */
	db->reset_counter 	= 0;
	db->nway		= 1;
	/* set and active a timer process */
	init_timer(&db->timer);
	db->timer.expires 	= DM9K8_TIMER_WUT * 2;
	db->timer.data 		= (unsigned long)dev;
	db->timer.function 	= &dm9K8_timer;
	add_timer(&db->timer);	
	
	netif_start_queue(dev);

	return 0;
}

/* Set PHY operationg mode
*/
static void set_PHY_mode(board_info_t *db)
{
	u16 phy_reg0 = 0x1200;		/* Auto-negotiation & Restart Auto-negotiation */
	u16 phy_reg4 = 0x061;		/* Default flow control disable*/

	if (!db->nway)
	{	
		phy_write(db,0,0);
		return;
	}
	if ( !(db->op_mode & DM9K8_AUTO) ) // op_mode didn't auto sense */
	{ 
		switch(db->op_mode) {
			case DM9K8_10MHD:  phy_reg4 = 0x21; 
                        	           phy_reg0 = 0x1000;
					   break;
			case DM9K8_10MFD:  phy_reg4 = 0x41; 
					   phy_reg0 = 0x1100;
                                	   break;
			default: 
					   break;
		} // end of switch
	
	} // end of if
	phy_write(db, 0, phy_reg0);
	phy_write(db, 4, phy_reg4);
}

/* 
	Initilize dm9K8 board
*/
static void dm9K8_init(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	DM9K8_DBUG(0, "dm9K8_init_dm9K8()", 0);

	/* set the internal PHY power-on, GPIOs normal, and wait 2ms */
	iow(db, DM9K8_GPR, 0);	/* GPR (reg_1Fh)bit GPIO0=0 pre-activate PHY */
	udelay(20);		/* wait 2ms for PHY power-on ready */

	/* do a software reset and wait 20us */
	iow(db, DM9K8_NCR, 3);
	udelay(20);		/* wait 20us at least for software reset ok */
	iow(db, DM9K8_NCR, 3);	/* NCR (reg_00h) bit[0] RST=1 & Loopback=1, reset on. Added by SPenser */
	udelay(20);		/* wait 20us at least for software reset ok */

	/* I/O mode */
	db->io_mode = ior(db, DM9K8_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */

	/* Set PHY */
	db->op_mode = media_mode;
	set_PHY_mode(db);

	/* Program operating register */
	iow(db, DM9K8_NCR, 0);
	iow(db, DM9K8_TCR, 0);		/* TX Polling clear */
	iow(db, DM9K8_BPTR, 0x3f);	/* Less 3kb, 600us */
	iow(db, DM9K8_SMCR, 0);		/* Special Mode */
	iow(db, DM9K8_NSR, 0x2c);	/* clear TX status */
	iow(db, DM9K8_ISR, 0x0f); 	/* Clear interrupt status */

#if defined(CHECKSUM)
	iow(db, DM9K8_TCCR, 0x07);	/* TX UDP/TCP/IP checksum enable */
	iow(db, DM9K8_RCSR, 0x02);	/*Receive checksum enable */
#endif

#if defined(ETRANS)
	iow(db, DM9K8_TCR2, 0x10);
	iow(db, DM9K8_ETXCSR, 0x83);
#endif
 
	/* Set address filter table */
	dm9K8_hash_table(dev);

	/* Activate DM9008A */
	iow(db, DM9K8_RXCR, DM9K8_REG05 | 1);	/* RX enable */
	iow(db, DM9K8_IMR, DM9K8_REGFF); 	// Enable TX/RX interrupt mask
 
	/* Init Driver variable */
	db->tx_pkt_cnt 		= 0;
	db->link_change		= 0; 
	dev->trans_start 	= 0;
	
	netif_carrier_on(dev);
	spin_lock_init(&db->lock);

}

/*
  Hardware start transmission.
  Send a packet to media from the upper layer.
*/
static int dm9K8_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	char * data_ptr;
	int i, tmplen;

	if (db->tx_pkt_cnt >= 2) return 1;
	
	/* packet counting */
	db->tx_pkt_cnt++;

	db->stats.tx_packets++;
	db->stats.tx_bytes+=skb->len;

	if (db->tx_pkt_cnt >= 2)
		netif_stop_queue(dev);


	/* Disable all interrupt */
	iow(db, DM9K8_IMR, DM9K8_DISINTR);
	
	/* Set TX length to reg. 0xfc & 0xfd */
	iow(db, DM9K8_TXPLL, (skb->len & 0xff));
	iow(db, DM9K8_TXPLH, (skb->len >> 8) & 0xff);

	/* Move data to TX SRAM */
	data_ptr = (char *)skb->data;

	outb(DM9K8_MWCMD, db->io_addr); // Write data into SRAM trigger

	switch(db->io_mode)
	{
		case DM9K8_BYTE_MODE:
			for (i = 0; i < skb->len; i++)
				outb((data_ptr[i] & 0xff), db->io_data);
			break;
		case DM9K8_WORD_MODE:
			tmplen = (skb->len + 1) / 2;
			for (i = 0; i < tmplen; i++)
         			outw(((u16 *)data_ptr)[i], db->io_data);
         		break;
	}
	
#if !defined(ETRANS)
	/* Issue TX polling command */
	iow(db, DM9K8_TCR, 0x1); /* Cleared after TX complete*/
#endif

	/* Saved the time stamp */
	dev->trans_start = jiffies;

	/* Free this SKB */
	dev_kfree_skb(skb);

	/* Re-enable interrupt */
	iow(db, DM9K8_IMR, DM9K8_REGFF);
	return 0;
}

/*
  Stop the interface.
  The interface is stopped when it is brought.
*/
static int dm9K8_stop(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	DM9K8_DBUG(0, "dm9K8_stop", 0);

	/* deleted timer */
	del_timer(&db->timer);

	netif_stop_queue(dev); 

	/* free interrupt */
	free_irq(dev->irq, dev);

	/* RESET devie */
	phy_write(db, 0x00, 0x8000);	/* PHY RESET */
	iow(db, DM9K8_GPR, 0x01); 	/* Power-Down PHY */
	iow(db, DM9K8_IMR, DM9K8_DISINTR);	/* Disable all interrupt */
	iow(db, DM9K8_RXCR, 0x00);	/* Disable RX */

	/* Dump Statistic counter */
#if FALSE
	printk("\nRX FIFO OVERFLOW %lx\n", db->stats.rx_fifo_errors);
	printk("RX CRC %lx\n", db->stats.rx_crc_errors);
	printk("RX LEN Err %lx\n", db->stats.rx_length_errors);
	printk("RESET %x\n", db->reset_counter);