📄 li_charge_main.asm
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include define.asm
;-----------------------------------------------
;******************Program code segment**********
;-----------------------------------------------
.code
org 0
jmp start
org 8
jmp isr
org 010h
start:
mov a,#0h
b0mov intrq,a
b0bclr FGIE ;//disable Interrupt gain
clr PFLAG ;pflag = x,x,x,x,x,c,dc,z
mov A,#0h ;Clear watchdog timer and initial system mode
b0mov OSCM,A
bset Fclkmd ;切换到低速时钟
bset Fstphx ;停止高速时钟
mov a,#5ah
b0mov wdtr,a ;clr wdt
; call delay_10ms
call PortInitial
call delay_10ms
call PortInitial
call SysInitial
call RAMInitial
call VariableInitial
b0bset fgie ;开中断
main:
mov a,#5ah
b0mov wdtr,a ;clr wdt
call voltage_adc
call state_judge
call voltage_judge
call disp_data_prepare
call display
jmp main
;-------------------------------------------------
voltage_adc:
; b0bts1 f_adt
; jmp ad_end
setb Fgchs
setb Fadenb
mov a,#93h
b0mov adm,a
call delay100us
b0bset Fads
b0bts1 Feoc
jmp $-1
xch a,vc
b0bts0 fz
jmp $+4
add vc,a
rrcm vc
mov a,#94h
b0mov adm,a
call delay100us
b0bset ads
b0bts1 eoc
jmp $-1
xch a,vb
b0bts0 fz
jmp $+4
add vb,a
rrcm vb
clr adm ;disable ad
voltage_adc_end:
ret
;-----------------------------------------------------------
state_judge:
b0mov a,vb
sub a,vc
b0bts1 fc
jmp state_judge_next
sub a,#ad_rel
b0bts0 fc
jmp $+5
b0bset f_empty
bclr f_charge
bclr f_discharge
jmp state_judge_end
b0bset f_discharge
bclr f_charge
bclr f_empty
jmp state_judge_end
state_judge_next:
b0mov a,vc
sub a,vb
sub a,#ad_rel
b0bts0 fc
jmp $+5
b0bset f_empty
bclr f_chagre
bclr f_discharge
jmp state_judge_end
b0bset f_charge
bclr f_discharge
bclr f_empty
state_judge_end:
ret
;------------------------------------------------
voltage_judge:
mov a,#6
b0mov voltage,a
b0mov a,vb
sub a,#ad85
b0bts0 fc
jmp voltage_end
decms voltage ;5
b0mov a,vb
sub a,#ad80
b0bts0 fc
jmp voltage_judeg_end
decms voltage ;4
b0mov a,vb
sub a,#ad77
b0bts0 fc
jmp voltage_judge_end
decms voltage ;3
b0mov a,vb
sub a,#ad76
b0bts0 fc
jmp voltage_judge_end
decms voltage ;2
b0mov a,vb
sub a,#ad75
b0bts0 fc
jmp voltage_judge_end
decms voltage ;1
b0mov a,vb
sub a,#ad74
b0bts0 fc
jmp voltage_judge_end
decms voltage ;0
nop
voltage_judge_end:
ret
;-------------------------------------------------------------------
display_prepare:
b0mov a,voltage
add a,pcl
jmp display0
jmp display1
jmp display2
jmp display3
jmp display4
jmp diaplay5
jmp display6
display0:
; b0bts0 f_display
; jmp display0_1 ;fanxiang
bset com_p
bset s2_p
bset s3_p
bset s4_p
bset s5_p
bset s6_p
b0bts1 f_charge
jmp display0_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s1_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s1_p
bclr plu_p
jmp display
display0_next:
bclr s1_p
b0bts1 f_discharge
jmp display0_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display0_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
/*
display0_1: ;fanxiang
bclr com_p
bclr s2_p
bclr s3_p
bclr s4_p
bclr s5_p
bclr s6_p
b0bts1 f_charge
jmp display0_next
bclr mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s1_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s1_p
bclr plu_p
jmp display
display0_next:
bset s1_p
b0bts1 f_discharge
jmp display0_next1
bclr plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display0_next1:
bset plu_p
bset mob_p
jmp display_prepare_end
*/
display1:
; b0bts0 f_display
; jmp display1_1 ;fanxiang
bset com_p
bclr s1_p
bset s3_p
bset s4_p
bset s5_p
bset s6_p
b0bts1 f_charge
jmp display1_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s2_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s2_p
bclr plu_p
jmp display
display1_next:
bclr s2_p
b0bts1 f_discharge
jmp display1_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display1_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
display2:
; b0bts0 f_display
; jmp display2_1 ;fanxiang
bset com_p
bclr s1_p
bclr s2_p
bset s4_p
bset s5_p
bset s6_p
b0bts1 f_charge
jmp display2_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s3_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s3_p
bclr plu_p
jmp display
display2_next:
bclr s3_p
b0bts1 f_discharge
jmp display2_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display2_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
display3:
; b0bts0 f_display
; jmp display3_1 ;fanxiang
bset com_p
bclr s1_p
bclr s2_p
bclr s3_p
bset s5_p
bset s6_p
b0bts1 f_charge
jmp display3_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s4_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s4_p
bclr plu_p
jmp display
display3_next:
bclr s4_p
b0bts1 f_discharge
jmp display3_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display3_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
display4:
; b0bts0 f_display
; jmp display4_1 ;fanxiang
bset com_p
bclr s1_p
bclr s2_p
bclr s3_p
bclr s4_p
bset s6_p
b0bts1 f_charge
jmp display4_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s5_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s5_p
bclr plu_p
jmp display
display4_next:
bclr s5_p
b0bts1 f_discharge
jmp display4_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display4_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
display5:
;; b0bts0 f_display
;; jmp display5_1 ;fanxiang
bset com_p
bclr s1_p
bclr s2_p
bclr s3_p
bclr s4_p
bclr s5_p
b0bts1 f_charge
jmp display5_next
bset mob_p
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+5
bset f_lcd
bset s6_p
bset plu_p
jmp display_prepare_end
bclr f_lcd
bclr s6_p
bclr plu_p
jmp display
display5_next:
bclr s6_p
b0bts1 f_discharge
jmp display5_next1
bset plu_p
b0bts0 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
jmp display_p
display5_next1:
bclr plu_p
bclr mob_p
jmp display_prepare_end
display6:
bset comp
bclr s1_p
bclr s2_p
bclr s3_p
bclr s4_p
bclr s5_p
bclr s6_p
bclr plu_p
b0bts0 f_discharge
jmp $+3
bclr mob_p
jmp display_prepare_end
b0bts1 f_500ms
jmp display_prepare_end
bclr f_500ms
b0bts0 f_lcd
jmp $+4
bset f_lcd
bset mob_p
jmp display_prepare_end
bclr f_lcd
bclr mob_p
; jmp display_prepare_end
display_prepare_end:
ret
;-----------------------------------------------------------
diaplay:
b0bts0 f_display
jmp display_next
b0bset f_display
b0mov a,p0_buf
b0mov p0,a
b0mov a,p4_buf
b0mov p4,a
b0mov a,p5_buf
b0mov p5,a
jmp display_end
display_next:
bclr f_display
b0mov a,p0_buf
xor a,#0ffh
b0mov p0,a
b0mov a,p4_buf
xor a,#0ffh
b0mov p4,a
b0mov a,p5_buf
xor a,#0ffh
b0mov p5,a
display_end:
ret
include initial.asm
include tint.asm
endp
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