📄 bsp.lst
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\ ??LED_Off_3:
\ 00000098 0C8002E0 DC32 0xe002800c
300
301 /*
302 *********************************************************************************************************
303 * TICKER INITIALIZATION
304 *
305 * Description : This function is called to initialize uC/OS-II's tick source (typically a timer generating
306 * interrupts every 1 to 100 mS).
307 *
308 * Arguments : none
309 *********************************************************************************************************
310 */
311
\ In segment CODE, align 4, keep-with-next
312 void Tmr_TickInit (void)
313 {
314 /* VIC TIMER #0 Initialization */
315 VICIntSelect &= ~(1 << VIC_TIMER0); /* Enable interrupts */
\ Tmr_TickInit:
\ 00000000 1048 LDR R0,??Tmr_TickInit_0 ;; 0xfffff00c
\ 00000002 0168 LDR R1,[R0, #+0]
\ 00000004 1022 MOVS R2,#+16
\ 00000006 9143 BICS R1,R1,R2
\ 00000008 0160 STR R1,[R0, #+0]
316 VICVectAddr2 = (INT32U)Tmr_TickISR_Handler; /* Set the vector address */
\ 0000000A .... LDR R0,??DataTable7 ;; 0xfffff108
\ 0000000C 0E49 LDR R1,??Tmr_TickInit_0+0x4 ;; Tmr_TickISR_Handler
\ 0000000E 0160 STR R1,[R0, #+0]
317 VICVectCntl2 = 0x20 | VIC_TIMER0; /* Enable vectored interrupts */
\ 00000010 0E48 LDR R0,??Tmr_TickInit_0+0x8 ;; 0xfffff208
\ 00000012 2421 MOVS R1,#+36
\ 00000014 0160 STR R1,[R0, #+0]
318 VICIntEnable = (1 << VIC_TIMER0); /* Enable Interrupts */
\ 00000016 0E48 LDR R0,??Tmr_TickInit_0+0xC ;; 0xfffff010
\ 00000018 0260 STR R2,[R0, #+0]
319
320 T0TCR = 0; /* Disable timer 0. */
\ 0000001A 0E48 LDR R0,??Tmr_TickInit_0+0x10 ;; 0xe0004004
\ 0000001C 0021 MOVS R1,#+0
\ 0000001E 0160 STR R1,[R0, #+0]
321 T0PC = 0; /* Prescaler is set to no division. */
\ 00000020 0D48 LDR R0,??Tmr_TickInit_0+0x14 ;; 0xe0004010
\ 00000022 0160 STR R1,[R0, #+0]
322 T0MR0 = CPU_PERIPHERAL_CLK_FREQ / OS_TICKS_PER_SEC; /* Count up to this value. */
\ 00000024 0D48 LDR R0,??Tmr_TickInit_0+0x18 ;; 0xe0004018
\ 00000026 9021 MOVS R1,#+144
\ 00000028 0902 LSLS R1,R1,#+8 ;; #+36864
\ 0000002A 0160 STR R1,[R0, #+0]
323 T0MCR = 3; /* Reset and interrupt on MR0 (match register 0). */
\ 0000002C 0C48 LDR R0,??Tmr_TickInit_0+0x1C ;; 0xe0004014
\ 0000002E 0321 MOVS R1,#+3
\ 00000030 0160 STR R1,[R0, #+0]
324 T0CCR = 0; /* Capture is disabled. */
\ 00000032 0C48 LDR R0,??Tmr_TickInit_0+0x20 ;; 0xe0004028
\ 00000034 0021 MOVS R1,#+0
\ 00000036 0160 STR R1,[R0, #+0]
325 T0EMR = 0; /* No external match output. */
\ 00000038 0B48 LDR R0,??Tmr_TickInit_0+0x24 ;; 0xe000403c
\ 0000003A 0160 STR R1,[R0, #+0]
326 T0TCR = 1; /* Enable timer 0 */
\ 0000003C 0548 LDR R0,??Tmr_TickInit_0+0x10 ;; 0xe0004004
\ 0000003E 0121 MOVS R1,#+1
\ 00000040 0160 STR R1,[R0, #+0]
327 }
\ 00000042 7047 BX LR ;; return
\ ??Tmr_TickInit_0:
\ 00000044 0CF0FFFF DC32 0xfffff00c
\ 00000048 ........ DC32 Tmr_TickISR_Handler
\ 0000004C 08F2FFFF DC32 0xfffff208
\ 00000050 10F0FFFF DC32 0xfffff010
\ 00000054 044000E0 DC32 0xe0004004
\ 00000058 104000E0 DC32 0xe0004010
\ 0000005C 184000E0 DC32 0xe0004018
\ 00000060 144000E0 DC32 0xe0004014
\ 00000064 284000E0 DC32 0xe0004028
\ 00000068 3C4000E0 DC32 0xe000403c
328
329
330 /*
331 *********************************************************************************************************
332 * IRQ ISR HANDLER
333 *
334 * Description : This function is called by OS_CPU_IRQ_ISR() to determine the source of the interrupt
335 * and process it accordingly.
336 *
337 * Arguments : none
338 *********************************************************************************************************
339 */
340
\ In segment CODE, align 4, keep-with-next
341 void OS_CPU_IRQ_ISR_Handler (void)
342 {
\ OS_CPU_IRQ_ISR_Handler:
\ 00000000 00B5 PUSH {LR}
343 PFNCT pfnct;
344
345
346 #if 1
347 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
\ 00000002 .... LDR R0,??DataTable6 ;; 0xfffff030
\ 00000004 0068 LDR R0,[R0, #+0]
348 if (pfnct != (PFNCT)0) { /* Make sure we don't have a NULL pointer */
\ 00000006 0100 MOVS R1,R0
\ 00000008 01D0 BEQ ??OS_CPU_IRQ_ISR_Handler_0
349 (*pfnct)(); /* Execute the ISR for the interrupting device */
\ 0000000A ........ BL ??rT_BX_R0
350 }
351 #else
352 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
353 while (pfnct != (PFNCT)0) { /* Make sure we don't have a NULL pointer */
354 (*pfnct)(); /* Execute the ISR for the interrupting device */
355 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
356 }
357 #endif
358 }
\ ??OS_CPU_IRQ_ISR_Handler_0:
\ 0000000E 01BC POP {R0}
\ 00000010 0047 BX R0 ;; return
359
360
361 /*
362 *********************************************************************************************************
363 * FIQ ISR HANDLER
364 *
365 * Description : This function is called by OS_CPU_FIQ_ISR() to determine the source of the interrupt
366 * and process it accordingly.
367 *
368 * Arguments : none
369 *********************************************************************************************************
370 */
371
\ In segment CODE, align 4, keep-with-next
372 void OS_CPU_FIQ_ISR_Handler (void)
373 {
\ OS_CPU_FIQ_ISR_Handler:
\ 00000000 00B5 PUSH {LR}
374 PFNCT pfnct;
375
376
377 #if 1
378 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
\ 00000002 .... LDR R0,??DataTable6 ;; 0xfffff030
\ 00000004 0068 LDR R0,[R0, #+0]
379 if (pfnct != (PFNCT)0) { /* Make sure we don't have a NULL pointer */
\ 00000006 0100 MOVS R1,R0
\ 00000008 01D0 BEQ ??OS_CPU_FIQ_ISR_Handler_0
380 (*pfnct)(); /* Execute the ISR for the interrupting device */
\ 0000000A ........ BL ??rT_BX_R0
381 }
382 #else
383 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
384 while (pfnct != (PFNCT)0) { /* Make sure we don't have a NULL pointer */
385 (*pfnct)(); /* Execute the ISR for the interrupting device */
386 pfnct = (PFNCT)VICVectAddr; /* Read the interrupt vector from the VIC */
387 }
388 #endif
389 }
\ ??OS_CPU_FIQ_ISR_Handler_0:
\ 0000000E 01BC POP {R0}
\ 00000010 0047 BX R0 ;; return
390
391
392 /*
393 *********************************************************************************************************
394 * TIMER #0 IRQ HANDLER
395 *
396 * Description : This function handles the timer interrupt that is used to generate TICKs for uC/OS-II.
397 *
398 * Arguments : none
399 *********************************************************************************************************
400 */
401
\ In segment CODE, align 4, keep-with-next
402 void Tmr_TickISR_Handler (void)
403 {
\ Tmr_TickISR_Handler:
\ 00000000 00B5 PUSH {LR}
404 T0IR = 0xFF; /* Clear timer #0 interrupt */
\ 00000002 0548 LDR R0,??Tmr_TickISR_Handler_0 ;; 0xe0004000
\ 00000004 FF21 MOVS R1,#+255
\ 00000006 0160 STR R1,[R0, #+0]
405 OSTimeTick(); /* If the interrupt is from the tick source, call OSTimeTick() */
\ 00000008 ........ _BLF OSTimeTick,??OSTimeTick??rT
406 VICVectAddr = 0;
\ 0000000C .... LDR R0,??DataTable6 ;; 0xfffff030
\ 0000000E 0021 MOVS R1,#+0
\ 00000010 0160 STR R1,[R0, #+0]
407 }
\ 00000012 01BC POP {R0}
\ 00000014 0047 BX R0 ;; return
\ 00000016 C046 Nop
\ ??Tmr_TickISR_Handler_0:
\ 00000018 004000E0 DC32 0xe0004000
408
409
410 /*
411 *********************************************************************************************************
412 * Vectored Interrupt Controller
413 *********************************************************************************************************
414 */
415
\ In segment CODE, align 4, keep-with-next
416 void VIC_Init (void)
417 {
418 VICIntEnClear = 0xFFFFFFFF; /* Disable ALL interrupts */
\ VIC_Init:
\ 00000000 1548 LDR R0,??VIC_Init_0 ;; 0xfffff014
\ 00000002 0021 MOVS R1,#+0
\ 00000004 C943 MVNS R1,R1 ;; #-1
\ 00000006 0160 STR R1,[R0, #+0]
419 VICProtection = 0; /* Setup interrupt controller */
\ 00000008 1448 LDR R0,??VIC_Init_0+0x4 ;; 0xfffff020
\ 0000000A 0021 MOVS R1,#+0
\ 0000000C 0160 STR R1,[R0, #+0]
420
421 VICVectAddr1 = (INT32U)VIC_DummyWDT; /* Set the vector address */
\ 0000000E 1448 LDR R0,??VIC_Init_0+0x8 ;; 0xfffff104
\ 00000010 1449 LDR R1,??VIC_Init_0+0xC ;; VIC_DummyWDT
\ 00000012 0160 STR R1,[R0, #+0]
422 VICVectAddr2 = (INT32U)VIC_DummyTIMER0;
\ 00000014 .... LDR R0,??DataTable7 ;; 0xfffff108
\ 00000016 1449 LDR R1,??VIC_Init_0+0x10 ;; VIC_DummyTIMER0
\ 00000018 0160 STR R1,[R0, #+0]
423 VICVectAddr3 = (INT32U)VIC_DummyTIMER1;
\ 0000001A 1448 LDR R0,??VIC_Init_0+0x14 ;; 0xfffff10c
\ 0000001C 1449 LDR R1,??VIC_Init_0+0x18 ;; VIC_DummyTIMER1
\ 0000001E 0160 STR R1,[R0, #+0]
424 VICVectAddr4 = (INT32U)VIC_DummyUART0;
\ 00000020 1448 LDR R0,??VIC_Init_0+0x1C ;; 0xfffff110
\ 00000022 1549 LDR R1,??VIC_Init_0+0x20 ;; VIC_DummyUART0
\ 00000024 0160 STR R1,[R0, #+0]
425 VICVectAddr5 = (INT32U)VIC_DummyUART1;
\ 00000026 1548 LDR R0,??VIC_Init_0+0x24 ;; 0xfffff114
\ 00000028 1549 LDR R1,??VIC_Init_0+0x28 ;; VIC_DummyUART1
\ 0000002A 0160 STR R1,[R0, #+0]
426 VICVectAddr6 = (INT32U)VIC_DummyPWM0;
\ 0000002C 1548 LDR R0,??VIC_Init_0+0x2C ;; 0xfffff118
\ 0000002E 1649 LDR R1,??VIC_Init_0+0x30 ;; VIC_DummyPWM0
\ 00000030 0160 STR R1,[R0, #+0]
427 VICVectAddr7 = (INT32U)VIC_DummyI2C;
\ 00000032 1648 LDR R0,??VIC_Init_0+0x34 ;; 0xfffff11c
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