📄 hal4d13.lst
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*** ERROR C202 IN LINE 216 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
217 1 }
218
219 ULONG Hal4D13_ReadInterruptRegister(void)
220 {
221 1 ULONG i = 0;
222 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_DEV_INT_SRC);
*** ERROR C202 IN LINE 222 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
223 1 i = IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 223 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
224 1 i += (((ULONG)IORD(ISP1362_BASE,D13_DATA_PORT)) << 16);
*** ERROR C202 IN LINE 224 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
225 1 return i;
226 1 }
227
228 UCHAR Hal4D13_GetEndpointStatusWInteruptClear(UCHAR bEPIndex)
229 {
230 1 UCHAR c;
231 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_RDSTS_CLRINT + bEPIndex);
*** ERROR C202 IN LINE 231 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
232 1 c = (UCHAR)(IORD(ISP1362_BASE,D13_DATA_PORT) & 0x0ff);
*** ERROR C202 IN LINE 232 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
233 1 return c;
234 1 }
235
236 UCHAR Hal4D13_GetEndpointStatusWOInteruptClear(UCHAR bEPIndex)
237 {
238 1 UCHAR c;
239 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_RDSTS + bEPIndex);
*** ERROR C202 IN LINE 239 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
240 1 c = (UCHAR)(IORD(ISP1362_BASE,D13_DATA_PORT) &0x0ff);
*** ERROR C202 IN LINE 240 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
241 1 return c;
242 1 }
243
244 void Hal4D13_SetEndpointStatus(UCHAR bEPIndex, UCHAR bStalled)
245 {
246 1 if(bStalled & 0x80)
247 1 {
248 2 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_WR_STS + bEPIndex);
C51 COMPILER V7.06 HAL4D13 08/18/2005 15:30:27 PAGE 6
*** ERROR C202 IN LINE 248 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
249 2 }
250 1 else
251 1 {
252 2 // clear endpoint stall.
253 2 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_CLR_STALL + bEPIndex);
*** ERROR C202 IN LINE 253 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
254 2 }
255 1 }
256
257 void Hal4D13_SetDMAConfig(USHORT wDMACnfg)
258 {
259 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DMA_WR_CNFG);
*** ERROR C202 IN LINE 259 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
260 1 IOWR(ISP1362_BASE,D13_DATA_PORT, wDMACnfg);
*** ERROR C202 IN LINE 260 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
261 1 }
262
263 USHORT Hal4D13_GetDMAConfig(void)
264 {
265 1 USHORT i;
266 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DMA_RD_CNFG);
*** ERROR C202 IN LINE 266 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
267 1 i = IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 267 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
268 1 return i;
269 1 }
270
271 void Hal4D13_SetDMACounter(USHORT wDMACounter)
272 {
273 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DMA_WR_COUNT);
*** ERROR C202 IN LINE 273 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
274 1 IOWR(ISP1362_BASE,D13_DATA_PORT, wDMACounter);
*** ERROR C202 IN LINE 274 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
275 1 }
276
277 USHORT Hal4D13_GetDMACounter(void)
278 {
279 1 USHORT i;
280 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DMA_RD_COUNT);
*** ERROR C202 IN LINE 280 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
281 1 i = IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 281 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
282 1 return i;
283 1 }
284
285 USHORT Hal4D13_GetDataFromChipRam(void)
286 {
287 1 USHORT i;
288 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DEV_RD_RAM);
*** ERROR C202 IN LINE 288 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
289 1 i = IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 289 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
290 1 return i;
291 1 }
292
293 void Hal4D13_SetDataToChipRam(USHORT wData)
294 {
295 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DEV_WR_RAM);
*** ERROR C202 IN LINE 295 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
296 1 IOWR(ISP1362_BASE,D13_DATA_PORT, wData);
*** ERROR C202 IN LINE 296 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
C51 COMPILER V7.06 HAL4D13 08/18/2005 15:30:27 PAGE 7
297 1 }
298
299 USHORT Hal4D13_ReadCurrentFrameNumber(void)
300 {
301 1 USHORT i;
302 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_RD_FRMNUM);
*** ERROR C202 IN LINE 302 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
303 1 i= IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 303 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
304 1 return i;
305 1 }
306
307 void Hal4D13_LockDevice(UCHAR bTrue)
308 {
309 1 USHORT c;
310 1 if(bTrue)
311 1 c = 0;
312 1 else
313 1 c = 0xAA37;
314 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT,D13CMD_DEV_LOCK );
*** ERROR C202 IN LINE 314 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
315 1 IOWR(ISP1362_BASE,D13_DATA_PORT,c);
*** ERROR C202 IN LINE 315 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
316 1 }
317
318 USHORT Hal4D13_ReadChipID(void)
319 {
320 1 USHORT i;
321 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_DEV_RD_CHIPID);
*** ERROR C202 IN LINE 321 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
322 1 i=IORD(ISP1362_BASE,D13_DATA_PORT);
*** ERROR C202 IN LINE 322 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
323 1 return i;
324 1 }
325
326 UCHAR Hal4D13_GetErrorCode(UCHAR bEPIndex)
327 {
328 1 UCHAR c;
329 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_RD_ERR+bEPIndex);
*** ERROR C202 IN LINE 329 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
330 1 c = (UCHAR)(IORD(ISP1362_BASE,D13_DATA_PORT)&0x0ff);
*** ERROR C202 IN LINE 330 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
331 1 return c;
332 1 }
333
334 UCHAR Hal4D13_GetEndpointConfig(UCHAR bEPIndex)
335 {
336 1 UCHAR c;
337 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, D13CMD_EP_RD_CNFG+bEPIndex);
*** ERROR C202 IN LINE 337 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
338 1 c = (UCHAR)(IORD(ISP1362_BASE,D13_DATA_PORT) & 0x0ff);
*** ERROR C202 IN LINE 338 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
339 1 return c;
340 1 }
341
342 void Hal4D13_SetEndpointConfig(UCHAR bEPConfig, UCHAR bEPIndex)
343 {
344 1 IOWR(ISP1362_BASE,D13_COMMAND_PORT, (USHORT)(D13CMD_EP_WR_CNFG+bEPIndex));
*** ERROR C202 IN LINE 344 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
345 1 IOWR(ISP1362_BASE,D13_DATA_PORT,(USHORT)bEPConfig);
*** ERROR C202 IN LINE 345 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
346 1 }
C51 COMPILER V7.06 HAL4D13 08/18/2005 15:30:27 PAGE 8
347
348 /*
349 // ************************************************************************
350 // Subroutines -- 3
351 // ************************************************************************
352 */
353 void Hal4D13_UnconfigDevice(void)
354 {
355 1 }
356
357 void Hal4D13_ConfigDevice(void)
358 {
359 1 }
360
361
362 void Hal4D13_SingleTransmitEP0(UCHAR * buf, USHORT len)
363 {
364 1 if( len <= EP0_PACKET_SIZE) {
365 2 Hal4D13_WriteEndpoint(EPINDEX4EP0_CONTROL_IN, buf, len);
366 2 }
367 1 }
368
369 void Hal4D13_RegAccess(void)
370 {
371 1 USHORT c;
372 1 USHORT i;
373 1 ULONG l;
374 1
375 1 Hal4D13_ResetDevice();
376 1 printf("Reseting\n");
377 1
378 1 i = Hal4D13_ReadChipID();
379 1 printf(" ChipId = %hx\n",i);
380 1
381 1 i = Hal4D13_GetDataFromChipRam();
382 1 printf(" Chip RAM = %hx\n",i);
383 1
384 1 printf("Writing 0x55AA,");
385 1 Hal4D13_SetDataToChipRam(0x55AA);
386 1 i = Hal4D13_GetDataFromChipRam();
387 1 printf(" Chip RAM = %hx\n",i);
388 1
389 1 l = Hal4D13_GetIntEnable();
390 1 printf("Hal4D13_GetIntEnable = %lx\n",l);
391 1
392 1 l = Hal4D13_ReadInterruptRegister();
393 1 printf("Hal4D13_ReadInterruptRegister = %lx\n",l);
394 1
395 1 i = Hal4D13_GetDevConfig();
396 1 printf("Hal4D13_GetDevConfig = %hx\n",i);
397 1
398 1 i = Hal4D13_GetDMAConfig();
399 1 printf("Hal4D13_GetDMAConfig = %hx\n",i);
400 1
401 1 i = Hal4D13_GetDMACounter();
402 1 printf("Hal4D13_GetDMACounter = %hx\n",i);
403 1
404 1 i = Hal4D13_ReadCurrentFrameNumber();
405 1 printf("Hal4D13_ReadCurrentFrameNumber = %hx\n",i);
406 1
407 1 c = Hal4D13_GetMode();
408 1 printf("Hal4D13_GetMode = %x\n",c);
C51 COMPILER V7.06 HAL4D13 08/18/2005 15:30:27 PAGE 9
409 1
410 1 c = Hal4D13_GetEndpointStatusWOInteruptClear(EPINDEX4EP0_CONTROL_OUT);
411 1 printf("Hal4D13_GetEndpointStatus EP0 = %x\n",c);
412 1
413 1 c = Hal4D13_GetAddress();
414 1 printf("Hal4D13_GetAddress = %x\n",c);
415 1 }
416
417 void Hal4D13_StallEP0InControlWrite(void)
418 {
419 1 Hal4D13_SetEndpointStatus(EPINDEX4EP0_CONTROL_IN, D13REG_EPSTS_STALL);
420 1 Hal4D13_SetEndpointStatus(EPINDEX4EP0_CONTROL_OUT, D13REG_EPSTS_STALL);
421 1 }
422
423 void Hal4D13_StallEP0InControlRead(void)
424 {
425 1 Hal4D13_SetEndpointStatus(EPINDEX4EP0_CONTROL_OUT, D13REG_EPSTS_STALL);
426 1 Hal4D13_SetEndpointStatus(EPINDEX4EP0_CONTROL_IN, D13REG_EPSTS_STALL);
427 1 }
428
429 BOOLEAN Hal4D13_IsSetupPktInvalid(void)
430 {
431 1 USHORT SetupPacketInvalid;
432 1 SetupPacketInvalid = Hal4D13_GetEndpointStatusWOInteruptClear(EPINDEX4EP0_CONTROL_OUT)&D13REG_EPSTS_OVWR;
433 1 return SetupPacketInvalid;
434 1 }
435
436 void Write_HC_Config_Reg(unsigned short Config)
437 {
438 1 IOWR(ISP1362_BASE,HC_COMMAND_PORT , HCCMD_WR_CNFG_REG );
*** ERROR C202 IN LINE 438 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
439 1 IOWR(ISP1362_BASE,HC_DATA_PORT , Config);
*** ERROR C202 IN LINE 439 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
440 1 }
441
442 unsigned short Read_HC_Config_Reg(void)
443 {
444 1 IOWR(ISP1362_BASE,HC_COMMAND_PORT , HCCMD_RD_CNFG_REG );
*** ERROR C202 IN LINE 444 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
445 1 return IORD(ISP1362_BASE,HC_DATA_PORT);
*** ERROR C202 IN LINE 445 OF HAL4D13.C: 'ISP1362_BASE': undefined identifier
446 1 }
447
C51 COMPILATION COMPLETE. 2 WARNING(S), 83 ERROR(S)
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