📄 processor.h
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#define PVR_403GB 0x00200100#define PVR_403GC 0x00200200#define PVR_403GCX 0x00201400#define PVR_405GP 0x40110000#define PVR_405GP_RB 0x40110040#define PVR_405GP_RC 0x40110082#define PVR_405GP_RD 0x401100C4#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */#define PVR_405CR_RA 0x40110041#define PVR_405CR_RB 0x401100C5#define PVR_405CR_RC 0x40110145 /* same as pc405gp rev e */#define PVR_405EP_RA 0x51210950#define PVR_405GPR_RB 0x50910951#define PVR_440GP_RB 0x40120440#define PVR_440GP_RC 0x40120481#define PVR_440EP_RA 0x42221850#define PVR_440EP_RB 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */#define PVR_440GR_RA 0x422218D3 /* 440EP rev B and 440GR rev A have same PVR */#define PVR_440GX_RA 0x51B21850#define PVR_440GX_RB 0x51B21851#define PVR_440GX_RC 0x51B21892#define PVR_440GX_RF 0x51B21894#define PVR_405EP_RB 0x51210950#define PVR_440SP_RA 0x53221850#define PVR_440SP_RB 0x53221891#define PVR_601 0x00010000#define PVR_602 0x00050000#define PVR_603 0x00030000#define PVR_603e 0x00060000#define PVR_603ev 0x00070000#define PVR_603r 0x00071000#define PVR_604 0x00040000#define PVR_604e 0x00090000#define PVR_604r 0x000A0000#define PVR_620 0x00140000#define PVR_740 0x00080000#define PVR_750 PVR_740#define PVR_740P 0x10080000#define PVR_750P PVR_740P#define PVR_7400 0x000C0000#define PVR_7410 0x800C0000#define PVR_7450 0x80000000#define PVR_85xx 0x80200000#define PVR_85xx_REV1 (PVR_85xx | 0x0010)#define PVR_85xx_REV2 (PVR_85xx | 0x0020)/* * For the 8xx processors, all of them report the same PVR family for * the PowerPC core. The various versions of these processors must be * differentiated by the version number in the Communication Processor * Module (CPM). */#define PVR_821 0x00500000#define PVR_823 PVR_821#define PVR_850 PVR_821#define PVR_860 PVR_821#define PVR_7400 0x000C0000#define PVR_8240 0x00810100/* * PowerQUICC II family processors report different PVR values depending * on silicon process (HiP3, HiP4, HiP7, etc.) */#define PVR_8260 PVR_8240#define PVR_8260_HIP3 0x00810101#define PVR_8260_HIP4 0x80811014#define PVR_8260_HIP7 0x80822011#define PVR_8260_HIP7R1 0x80822013#define PVR_8260_HIP7RA 0x80822014/* * System Version Register *//* System Version Register (SVR) field extraction */#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revison field */#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */#define SVR_MEM(svr) (((svr) >> 16) & 0xF) /* Member field */#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*//* * SVR_VER() Version Values */#define SVR_8540 0x8030#define SVR_8560 0x8070#define SVR_8555 0x8079#define SVR_8541 0x807A#define SVR_8548 0x8031#define SVR_8548_E 0x8039/* I am just adding a single entry for 8260 boards. I think we may be * able to combine mbx, fads, rpxlite, bseip, and classic into a single * generic 8xx as well. The boards containing these processors are either * identical at the processor level (due to the high integration) or so * wildly different that testing _machine at run time is best replaced by * conditional compilation by board type (found in their respective .h file). * -- Dan */#define _MACH_prep 0x00000001#define _MACH_Pmac 0x00000002 /* pmac or pmac clone (non-chrp) */#define _MACH_chrp 0x00000004 /* chrp machine */#define _MACH_mbx 0x00000008 /* Motorola MBX board */#define _MACH_apus 0x00000010 /* amiga with phase5 powerup */#define _MACH_fads 0x00000020 /* Motorola FADS board */#define _MACH_rpxlite 0x00000040 /* RPCG RPX-Lite 8xx board */#define _MACH_bseip 0x00000080 /* Bright Star Engineering ip-Engine */#define _MACH_yk 0x00000100 /* Motorola Yellowknife */#define _MACH_gemini 0x00000200 /* Synergy Microsystems gemini board */#define _MACH_classic 0x00000400 /* RPCG RPX-Classic 8xx board */#define _MACH_oak 0x00000800 /* IBM "Oak" 403 eval. board */#define _MACH_walnut 0x00001000 /* AMCC "Walnut" 405GP eval. board */#define _MACH_8260 0x00002000 /* Generic 8260 */#define _MACH_sandpoint 0x00004000 /* Motorola SPS Processor eval board */#define _MACH_tqm860 0x00008000 /* TQM860/L */#define _MACH_tqm8xxL 0x00010000 /* TQM8xxL */#define _MACH_hidden_dragon 0x00020000 /* Motorola Hidden Dragon eval board *//* see residual.h for these */#define _PREP_Motorola 0x01 /* motorola prep */#define _PREP_Firm 0x02 /* firmworks prep */#define _PREP_IBM 0x00 /* ibm prep */#define _PREP_Bull 0x03 /* bull prep */#define _PREP_Radstone 0x04 /* Radstone Technology PLC prep *//* * Radstone board types */#define RS_SYS_TYPE_PPC1 0#define RS_SYS_TYPE_PPC2 1#define RS_SYS_TYPE_PPC1a 2#define RS_SYS_TYPE_PPC2a 3#define RS_SYS_TYPE_PPC4 4#define RS_SYS_TYPE_PPC4a 5#define RS_SYS_TYPE_PPC2ep 6/* these are arbitrary */#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */#define _GLOBAL(n)\ .globl n;\n:/* Macros for setting and retrieving special purpose registers */#define stringify(s) tostring(s)#define tostring(s) #s#define mfdcr(rn) ({unsigned int rval; \ asm volatile("mfdcr %0," stringify(rn) \ : "=r" (rval)); rval;})#define mtdcr(rn, v) asm volatile("mtdcr " stringify(rn) ",%0" : : "r" (v))#define mfmsr() ({unsigned int rval; \ asm volatile("mfmsr %0" : "=r" (rval)); rval;})#define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v))#define mfspr(rn) ({unsigned int rval; \ asm volatile("mfspr %0," stringify(rn) \ : "=r" (rval)); rval;})#define mtspr(rn, v) asm volatile("mtspr " stringify(rn) ",%0" : : "r" (v))#define tlbie(v) asm volatile("tlbie %0 \n sync" : : "r" (v))/* Segment Registers */#define SR0 0#define SR1 1#define SR2 2#define SR3 3#define SR4 4#define SR5 5#define SR6 6#define SR7 7#define SR8 8#define SR9 9#define SR10 10#define SR11 11#define SR12 12#define SR13 13#define SR14 14#define SR15 15#ifndef __ASSEMBLY__#ifndef CONFIG_MACH_SPECIFICextern int _machine;extern int have_of;#endif /* CONFIG_MACH_SPECIFIC *//* what kind of prep workstation we are */extern int _prep_type;/* * This is used to identify the board type from a given PReP board * vendor. Board revision is also made available. */extern unsigned char ucSystemType;extern unsigned char ucBoardRev;extern unsigned char ucBoardRevMaj, ucBoardRevMin;struct task_struct;void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp);void release_thread(struct task_struct *);/* * Create a new kernel thread. */extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);/* * Bus types */#define EISA_bus 0#define EISA_bus__is_a_macro /* for versions in ksyms.c */#define MCA_bus 0#define MCA_bus__is_a_macro /* for versions in ksyms.c *//* Lazy FPU handling on uni-processor */extern struct task_struct *last_task_used_math;extern struct task_struct *last_task_used_altivec;/* * this is the minimum allowable io space due to the location * of the io areas on prep (first one at 0x80000000) but * as soon as I get around to remapping the io areas with the BATs * to match the mac we can raise this. -- Cort */#define TASK_SIZE (0x80000000UL)/* This decides where the kernel will search for a free chunk of vm * space during mmap's. */#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)typedef struct { unsigned long seg;} mm_segment_t;struct thread_struct { unsigned long ksp; /* Kernel stack pointer */ unsigned long wchan; /* Event task is sleeping on */ struct pt_regs *regs; /* Pointer to saved register state */ mm_segment_t fs; /* for get_fs() validation */ void *pgdir; /* root of page-table tree */ signed long last_syscall; double fpr[32]; /* Complete floating point set */ unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */ unsigned long fpscr; /* Floating point status */#ifdef CONFIG_ALTIVEC vector128 vr[32]; /* Complete AltiVec set */ vector128 vscr; /* AltiVec status */ unsigned long vrsave;#endif /* CONFIG_ALTIVEC */};#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)#define INIT_THREAD { \ INIT_SP, /* ksp */ \ 0, /* wchan */ \ (struct pt_regs *)INIT_SP - 1, /* regs */ \ KERNEL_DS, /*fs*/ \ swapper_pg_dir, /* pgdir */ \ 0, /* last_syscall */ \ {0}, 0, 0 \}/* * Note: the vm_start and vm_end fields here should *not* * be in kernel space. (Could vm_end == vm_start perhaps?) */#define INIT_MMAP { &init_mm, 0, 0x1000, NULL, \ PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, \ 1, NULL, NULL }/* * Return saved PC of a blocked thread. For now, this is the "user" PC */static inline unsigned long thread_saved_pc(struct thread_struct *t){ return (t->regs) ? t->regs->nip : 0;}#define copy_segments(tsk, mm) do { } while (0)#define release_segments(mm) do { } while (0)#define forget_segments() do { } while (0)unsigned long get_wchan(struct task_struct *p);#define KSTK_EIP(tsk) ((tsk)->thread.regs->nip)#define KSTK_ESP(tsk) ((tsk)->thread.regs->gpr[1])/* * NOTE! The task struct and the stack go together */#define THREAD_SIZE (2*PAGE_SIZE)#define alloc_task_struct() \ ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))#define free_task_struct(p) free_pages((unsigned long)(p),1)#define get_task_struct(tsk) atomic_inc(&mem_map[MAP_NR(tsk)].count)/* in process.c - for early bootup debug -- Cort */int ll_printk(const char *, ...);void ll_puts(const char *);#define init_task (init_task_union.task)#define init_stack (init_task_union.stack)/* In misc.c */void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);#endif /* ndef ASSEMBLY*/#ifdef CONFIG_MACH_SPECIFIC#if defined(CONFIG_8xx)#define _machine _MACH_8xx#define have_of 0#elif defined(CONFIG_OAK)#define _machine _MACH_oak#define have_of 0#elif defined(CONFIG_WALNUT)#define _machine _MACH_walnut#define have_of 0#elif defined(CONFIG_APUS)#define _machine _MACH_apus#define have_of 0#elif defined(CONFIG_GEMINI)#define _machine _MACH_gemini#define have_of 0#elif defined(CONFIG_8260)#define _machine _MACH_8260#define have_of 0#elif defined(CONFIG_SANDPOINT)#define _machine _MACH_sandpoint#elif defined(CONFIG_HIDDEN_DRAGON)#define _machine _MACH_hidden_dragon#define have_of 0#else#error "Machine not defined correctly"#endif#endif /* CONFIG_MACH_SPECIFIC */#endif /* __ASM_PPC_PROCESSOR_H */
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