regs243.h

Serial Communication Interface SCI : Transmit & Receive Interrupt

/* file 'Regs243.h' to setup the addresses of the TMS240F243
   peripheral register set 					
   version 2.0  date : 07.05.2000  Bormann
   DEFINE statements instead of pointers ( see Version	1.0)
   Advantage : no additional data-memory needed					
   
   for the Watch-Window of Code-Composer use :
   	*(int *)0x7018@data,x ; SCSR	to watch the SCSR -Register 	*/   


#define IMR			*(volatile unsigned int *)0x0004	/* CPU Interrupt Mask Register */     
#define GREG		*(volatile unsigned int *)0x0005    /* Global Data Memory Configuration Register */
#define IFR			*(volatile unsigned int *)0x0006    /* CPU Interrupt Flag Register */
                                                    
#define PIRQR0		*(volatile unsigned int *)0x7010    /* Peripheral Interrupt Request Register 0 */
#define PIRQR1		*(volatile unsigned int *)0x7011	/* Peripheral Interrupt Request Register 1 */
#define PIACKR0		*(volatile unsigned int *)0x7014 	/* Peripheral Interrupt Acknowledge Register 0 */
#define PIACKR1		*(volatile unsigned int *)0x7015	/* Peripheral Interrupt Acknowledge Register 1 */
                                                    
#define SCSR		*(volatile unsigned int *)0x7018  	/* System Control and Status Register	*/
#define DINR		*(volatile unsigned int *)0x701C	/* Device Identification Name Register	*/
#define PIVR		*(volatile unsigned int *)0x701E    /* Peripheral Interrupt Vector Register */

#define WDCNTR		*(volatile unsigned int *)0x7023	/* Watchdog Counter Register 			*/
#define WDKEY		*(volatile unsigned int *)0x7025	/* Watchdog Reset Key Register			*/
#define WDCR		*(volatile unsigned int *)0x7029    /* Watchdog Timer Control Register		*/

#define ADCTRL1		*(volatile unsigned int *)0x7032    /* ADC Control Register 1				*/
#define ADCTRL2		*(volatile unsigned int *)0x7034    /* ADC Control Register 2				*/
#define ADCFIFO1	*(volatile unsigned int *)0x7036	/* ADC Data Register FIFO1				*/
#define ADCFIFO2	*(volatile unsigned int *)0x7038    /* ADC Data Register FIFO2				*/

#define SPICCR		*(volatile unsigned int *)0x7040	/* SPI Configuration Control Register	*/
#define SPICTL		*(volatile unsigned int *)0x7041	/* SPI Operation Control Register		*/
#define SPISTS		*(volatile unsigned int *)0x7042	/* SPI Status Register					*/
#define SPIBRR		*(volatile unsigned int *)0x7044	/* SPI Baude Rate Control Register		*/
#define SPIRXEMU	*(volatile unsigned int *)0x7046	/* SPI Emulation Buffer Register 		*/
#define SPIRXBUF	*(volatile unsigned int *)0x7047	/* SPI Serial Receive Buffer Register	*/
#define SPITXBUF	*(volatile unsigned int *)0x7048	/* SPI Serial Transmit Buffer Register	*/
#define SPIDAT		*(volatile unsigned int *)0x7049	/* SPI Serial Data Register				*/
#define SPIPRI		*(volatile unsigned int *)0x704F	/* SPI Priority Control Register		*/
#define SCICCR		*(volatile unsigned int *)0x7050    /* SCI Communication Control Register	*/
#define SCICTL1		*(volatile unsigned int *)0x7051    /* SCI Control Register 1				*/
#define SCIHBAUD	*(volatile unsigned int *)0x7052   	/* SCI Baud-Select Register, High-Bits	*/
#define SCILBAUD	*(volatile unsigned int *)0x7053    /* SCI Baud-Select Register, Low-Bits	*/
#define SCICTL2		*(volatile unsigned int *)0x7054    /* SCI Control Register 2				*/
#define SCIRXST		*(volatile unsigned int *)0x7055	/* SCI Receiver Status Register			*/
#define SCIRXEMU	*(volatile unsigned int *)0x7056	/* SCI Emulation Data Buffer Register	*/			
#define SCIRXBUF	*(volatile unsigned int *)0x7057    /* SCI Receicer Data Buffer Register	*/
#define SCITXBUF	*(volatile unsigned int *)0x7059    /* SCI Transmit Data Buffer Register	*/                                                            
#define SCIPRI		*(volatile unsigned int *)0x705F    /* SCI Priority Control Register		*/

#define XINT1CR		*(volatile unsigned int *)0x7070	/* External Interrupt 1 Control Register*/
#define XINT2CR		*(volatile unsigned int *)0x7071	/* External Interrupt 2 Control Register*/
   
#define OCRA		*(volatile unsigned int *)0x7090	/* I/O Mux Control Register A			*/
#define	OCRB		*(volatile unsigned int *)0x7092    /* I/O Mux Control Register B			*/
#define PADATDIR	*(volatile unsigned int *)0x7098    /* I/O Port A Data and Direction Register */
#define PBDATDIR	*(volatile unsigned int *)0x709a    /* I/O Port B Data and Direction Register */
#define PCDATDIR	*(volatile unsigned int *)0x709c    /* I/O Port C Data and Direction Register */
#define PDDATDIR	*(volatile unsigned int *)0x709e    /* I/O Port D Data and Direction Register */

#define CAN_MDER	*(volatile unsigned int *)0x7100    /* CAN Mailbox Direction/Enable Register  */
#define CAN_TCR		*(volatile unsigned int *)0x7101    /* CAN Transmission Control Register	*/
#define CAN_RCR		*(volatile unsigned int *)0x7102    /* CAN Receicer Control Register		*/
#define CAN_MCR		*(volatile unsigned int *)0x7103    /* CAN MAster COntrol Register			*/
#define CAN_BCR2	*(volatile unsigned int *)0x7104    /* CAN Bit Configuration Register 2		*/
#define CAN_BCR1	*(volatile unsigned int *)0x7105    /* CAN Bit COnfiguration Register 1		*/
#define CAN_ESR		*(volatile unsigned int *)0x7106    /* CAN Error Status Register			*/
#define CAN_GSR		*(volatile unsigned int *)0x7107    /* CAN Global Status Register			*/
#define CAN_CEC		*(volatile unsigned int *)0x7108    /* CAN Error Counter Register			*/
#define CAN_IFR		*(volatile unsigned int *)0x7109    /* CAN Interrupt Flag Register			*/
#define CAN_IMR		*(volatile unsigned int *)0x710a    /* CAN Interrupt Mask Register			*/
#define CAN_LAM0_H	*(volatile unsigned int *)0x710b    /* CAN Local Acceptance Mask MB0 and MB1 high */
#define CAN_LAM0_L	*(volatile unsigned int *)0x710c    /* CAN Local Acceptance Mask MB0 and MB1 low  */
#define CAN_LAM1_H	*(volatile unsigned int *)0x710d    /* CAN Local Acceptance Mask MB3 and MB2 high */
#define CAN_LAM1_L	*(volatile unsigned int *)0x710e    /* CAN Local Acceptance Mask MB3 and MB2 low  */

#define CAN_MSGID0L	*(volatile unsigned int *)0x7200	/* CAN Message ID for MB0 , low		*/
#define CAN_MSGID0H	*(volatile unsigned int *)0x7201	/* CAN Message ID for MB0 , high	*/
#define CAN_MSGCTRL0 *(volatile unsigned int *)0x7202	/* CAN Message Control Field 0		*/
#define CAN_MBX0A	*(volatile unsigned int *)0x7204	/* CAN 2 of 8 Bytes of Mailbox 0	*/
#define CAN_MBX0B	*(volatile unsigned int *)0x7205	/* CAN 2 of 8 Bytes of Mailbox 0	*/
#define CAN_MBX0C	*(volatile unsigned int *)0x7206	/* CAN 2 of 8 Bytes of Mailbox 0	*/
#define CAN_MBX0D	*(volatile unsigned int *)0x7207	/* CAN 2 of 8 Bytes of Mailbox 0	*/
   
#define CAN_MSGID1L	*(volatile unsigned int *)0x7208	/* CAN Message ID for MB1 , low		*/
#define CAN_MSGID1H	*(volatile unsigned int *)0x7209	/* CAN Message ID for MB1 , high	*/
#define CAN_MSGCTRL1 *(volatile unsigned int *)0x720A	/* CAN Message Control Field 1		*/
#define CAN_MBX1A	*(volatile unsigned int *)0x720C	/* CAN 2 of 8 Bytes of Mailbox 1	*/
#define CAN_MBX1B	*(volatile unsigned int *)0x720D	/* CAN 2 of 8 Bytes of Mailbox 1	*/
#define CAN_MBX1C	*(volatile unsigned int *)0x720E	/* CAN 2 of 8 Bytes of Mailbox 1	*/
#define CAN_MBX1D	*(volatile unsigned int *)0x720F	/* CAN 2 of 8 Bytes of Mailbox 1	*/ 

#define CAN_MSGID2L	*(volatile unsigned int *)0x7210	/* CAN Message ID for MB2 , low		*/
#define CAN_MSGID2H	*(volatile unsigned int *)0x7211	/* CAN Message ID for MB2 , high	*/
#define CAN_MSGCTRL2 *(volatile unsigned int *)0x7212	/* CAN Message Control Field 2		*/
#define CAN_MBX2A	*(volatile unsigned int *)0x7214	/* CAN 2 of 8 Bytes of Mailbox 2	*/
#define CAN_MBX2B	*(volatile unsigned int *)0x7215	/* CAN 2 of 8 Bytes of Mailbox 2	*/
#define CAN_MBX2C	*(volatile unsigned int *)0x7216	/* CAN 2 of 8 Bytes of Mailbox 2	*/
#define CAN_MBX2D	*(volatile unsigned int *)0x7217	/* CAN 2 of 8 Bytes of Mailbox 2	*/

#define CAN_MSGID3L	*(volatile unsigned int *)0x7218	/* CAN Message ID for MB3 , low		*/
#define CAN_MSGID3H	*(volatile unsigned int *)0x7219	/* CAN Message ID for MB3 , high	*/
#define CAN_MSGCTRL3 *(volatile unsigned int *)0x721A	/* CAN Message Control Field 3		*/
#define CAN_MBX3A	*(volatile unsigned int *)0x721C	/* CAN 2 of 8 Bytes of Mailbox 3	*/
#define CAN_MBX3B	*(volatile unsigned int *)0x721D	/* CAN 2 of 8 Bytes of Mailbox 3	*/
#define CAN_MBX3C	*(volatile unsigned int *)0x721E	/* CAN 2 of 8 Bytes of Mailbox 3	*/
#define CAN_MBX3D	*(volatile unsigned int *)0x721F	/* CAN 2 of 8 Bytes of Mailbox 3	*/

#define CAN_MSGID4L	*(volatile unsigned int *)0x7220	/* CAN Message ID for MB4 , low		*/
#define CAN_MSGID4H	*(volatile unsigned int *)0x7221	/* CAN Message ID for MB4 , high	*/
#define CAN_MSGCTRL4 *(volatile unsigned int *)0x7222	/* CAN Message Control Field 4		*/
#define CAN_MBX4A	*(volatile unsigned int *)0x7224	/* CAN 2 of 8 Bytes of Mailbox 4	*/
#define CAN_MBX4B	*(volatile unsigned int *)0x7225	/* CAN 2 of 8 Bytes of Mailbox 4	*/
#define CAN_MBX4C	*(volatile unsigned int *)0x7226	/* CAN 2 of 8 Bytes of Mailbox 4	*/
#define CAN_MBX4D	*(volatile unsigned int *)0x7227	/* CAN 2 of 8 Bytes of Mailbox 4	*/  

#define CAN_MSGID5L	*(volatile unsigned int *)0x7228	/* CAN Message ID for MB5 , low		*/
#define CAN_MSGID5H	*(volatile unsigned int *)0x7229	/* CAN Message ID for MB5 , high	*/
#define CAN_MSGCTRL5 *(volatile unsigned int *)0x722A	/* CAN Message Control Field 5		*/
#define CAN_MBX5A	*(volatile unsigned int *)0x722C	/* CAN 2 of 8 Bytes of Mailbox 5	*/
#define CAN_MBX5B	*(volatile unsigned int *)0x722D	/* CAN 2 of 8 Bytes of Mailbox 5	*/
#define CAN_MBX5C	*(volatile unsigned int *)0x722E	/* CAN 2 of 8 Bytes of Mailbox 5	*/
#define CAN_MBX5D	*(volatile unsigned int *)0x722F	/* CAN 2 of 8 Bytes of Mailbox 5	*/   

#define GPTCON		*(volatile unsigned int *)0x7400    /* GP Timer Control Register		*/
#define T1CNT		*(volatile unsigned int *)0x7401    /* GP Timer 1 Counter Register		*/
#define T1CMPR		*(volatile unsigned int *)0x7402  	/* GP Timer 1 Compare Register		*/
#define T1PR		*(volatile unsigned int *)0x7403    /* GP Timer 1 Period Register		*/
#define T1CON		*(volatile unsigned int *)0x7404    /* GP Timer 1 Control Register		*/
#define T2CNT		*(volatile unsigned int *)0x7405    /* GP Timer 2 Counter Register		*/
#define T2CMPR		*(volatile unsigned int *)0x7406    /* GP Timer 2 Compare Register		*/
#define T2PR		*(volatile unsigned int *)0x7407    /* GP Timer 2 Period Register		*/
#define T2CON		*(volatile unsigned int *)0x7408    /* GP Timer 2 Control Register		*/

/* GP Timer 3 not for TMS 320F243
#define T3CNT		*(volatile unsigned int *)0x7409
#define T3CMPR		*(volatile unsigned int *)0x740A
#define T3PR		*(volatile unsigned int *)0x740B
#define T3CON		*(volatile unsigned int *)0x740C  */

#define COMCON		*(volatile unsigned int *)0x7411    /* Compare Control Register			*/
#define ACTR		*(volatile unsigned int *)0x7413    /* Full-Compare Action Register		*/

/* Single Compare Action not for F243 */
/* #define SACTR	*(volatile unsigned int *)0x7414    /* not for F243 !					*/

#define DBTCON		*(volatile unsigned int *)0x7415 	/* Dead-Band Timer Control Register */
#define CMPR1		*(volatile unsigned int *)0x7417    /* Full Compare Unit Compare Register 1 */
#define CMPR2		*(volatile unsigned int *)0x7418    /* Full Compare Unit Compare Register 2 */
#define CMPR3		*(volatile unsigned int *)0x7419    /* Full Compare Unit Compare Register 3 */

/* Single Compare not for F243 */
/* #define SCMPR1		*(volatile unsigned int *)0x741A */
/* #define SCMPR2		*(volatile unsigned int *)0x741B */
/* #define SCMPR3		*(volatile unsigned int *)0x741C */

#define CAPCON		*(volatile unsigned int *)0x7420	/* Capture Control Register			*/
#define CAPFIFO		*(volatile unsigned int *)0x7422	/* Capture FIFO Status Register		*/
#define CAP1FIFO	*(volatile unsigned int *)0x7423 	/* Two-Level-Deep Capture FIFO Stack 1 */
#define CAP2FIFO	*(volatile unsigned int *)0x7424 	/* Two-Level-Deep Capture FIFO Stack 2 */
#define CAP3FIFO	*(volatile unsigned int *)0x7425 	/* Two-Level-Deep Capture FIFO Stack 3 */ 
#define CAP1FBOT	*(volatile unsigned int *)0x7427 	/* Capture 1 Bottom Stack Register	 */
#define CAP2FBOT	*(volatile unsigned int *)0x7428 	/* Capture 2 Bottom Stack Register	 */
#define CAP3FBOT	*(volatile unsigned int *)0x7429 	/* Capture 3 Bottom Stack Register	 */

#define EVIMRA		*(volatile unsigned int *)0x742C    /* EV Interrupt Mask Register A		*/
#define EVIMRB		*(volatile unsigned int *)0x742D    /* EV Interrupt Mask Register B		*/
#define EVIMRC		*(volatile unsigned int *)0x742E    /* EV Interrupt Mask Register C		*/
#define EVIFRA		*(volatile unsigned int *)0x742F    /* EV Interrupt Flag Register A		*/
#define EVIFRB		*(volatile unsigned int *)0x7430    /* EV Interrupt Flag Register B		*/
#define EVIFRC		*(volatile unsigned int *)0x7431    /* EV Interrupt Flag Register C		*/

/* Interrupt Vector Register not for F243 ! */
/* #define EVIVRA		*(volatile unsigned int *)0x7432  */
/* #define EVIVRB		*(volatile unsigned int *)0x7433  */
/* #define EVIVRC		*(volatile unsigned int *)0x7434  */